diff options
| author | Pierre Ossman <pierre@ossman.eu> | 2008-12-03 21:49:37 +0100 |
|---|---|---|
| committer | Pierre Ossman <pierre@ossman.eu> | 2008-12-04 22:20:56 +0100 |
| commit | d1690f5cc096e2f735c8b407c370a1c1cd7a8afc (patch) | |
| tree | 28d23088139de1800fb7d18c692d2f1c2df1f24b /src/radeon_commonfuncs.c | |
| parent | 4d98acbca2e630056bf56cdcd0e23007fded2ced (diff) | |
Improve tearing avoidance for Xvideo in two steps
- Fix up VLINE handling to trigger whenever scanout is outside the
visible area.
- Render the video as a scissored triangle as R300+ cannot render a
quad in a single pass.
Diffstat (limited to 'src/radeon_commonfuncs.c')
| -rw-r--r-- | src/radeon_commonfuncs.c | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c index 556dba3f..7f32acde 100644 --- a/src/radeon_commonfuncs.c +++ b/src/radeon_commonfuncs.c @@ -548,13 +548,8 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) OUT_ACCEL_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D); FINISH_ACCEL(); - BEGIN_ACCEL(7); + BEGIN_ACCEL(5); OUT_ACCEL_REG(R300_SC_EDGERULE, 0xA5294A5); - OUT_ACCEL_REG(R300_SC_SCISSOR0, ((0 << R300_SCISSOR_X_SHIFT) | - (0 << R300_SCISSOR_Y_SHIFT))); - OUT_ACCEL_REG(R300_SC_SCISSOR1, ((8191 << R300_SCISSOR_X_SHIFT) | - (8191 << R300_SCISSOR_Y_SHIFT))); - if (IS_R300_3D) { /* clip has offset 1440 */ OUT_ACCEL_REG(R300_SC_CLIP_0_A, ((1088 << R300_CLIP_X_SHIFT) | @@ -575,7 +570,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) (info->ChipFamily == CHIP_FAMILY_RS300) || (info->ChipFamily == CHIP_FAMILY_R200)) { - BEGIN_ACCEL(7); + BEGIN_ACCEL(6); if (info->ChipFamily == CHIP_FAMILY_RS300) { OUT_ACCEL_REG(R200_SE_VAP_CNTL_STATUS, RADEON_TCL_BYPASS); } else { @@ -584,7 +579,6 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) OUT_ACCEL_REG(R200_PP_CNTL_X, 0); OUT_ACCEL_REG(R200_PP_TXMULTI_CTL_0, 0); OUT_ACCEL_REG(R200_SE_VTX_STATE_CNTL, 0); - OUT_ACCEL_REG(R200_RE_CNTL, 0x0); OUT_ACCEL_REG(R200_SE_VTE_CNTL, 0); OUT_ACCEL_REG(R200_SE_VAP_CNTL, R200_VAP_FORCE_W_TO_ONE | R200_VAP_VF_MAX_VTX_NUM); @@ -602,6 +596,15 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) RADEON_ROUND_MODE_ROUND | RADEON_ROUND_PREC_4TH_PIX)); FINISH_ACCEL(); + + BEGIN_ACCEL(4); + OUT_ACCEL_REG(R200_RE_SCISSOR_TL_0, ((0 << R200_SCISSOR_X_SHIFT) | + (0 << R200_SCISSOR_Y_SHIFT))); + OUT_ACCEL_REG(R200_RE_SCISSOR_BR_0, ((2047 << R200_SCISSOR_X_SHIFT) | + (2047 << R200_SCISSOR_Y_SHIFT))); + OUT_ACCEL_REG(R200_RE_AUX_SCISSOR_CNTL, R200_SCISSOR_ENABLE_0); + OUT_ACCEL_REG(R200_RE_CNTL, R200_SCISSOR_ENABLE); + FINISH_ACCEL(); } else { BEGIN_ACCEL(2); if ((info->ChipFamily == CHIP_FAMILY_RADEON) || @@ -657,10 +660,10 @@ void FUNC_NAME(RADEONWaitForVLine)(ScrnInfoPtr pScrn, PixmapPtr pPix, int crtc) if (offset == 0) { BEGIN_ACCEL(1); if (crtc == 0) - OUT_ACCEL_REG(RADEON_WAIT_UNTIL, (RADEON_WAIT_FE_CRTC_VLINE | + OUT_ACCEL_REG(RADEON_WAIT_UNTIL, (RADEON_WAIT_CRTC_VLINE | RADEON_ENG_DISPLAY_SELECT_CRTC0)); else - OUT_ACCEL_REG(RADEON_WAIT_UNTIL, (RADEON_WAIT_FE_CRTC_VLINE | + OUT_ACCEL_REG(RADEON_WAIT_UNTIL, (RADEON_WAIT_CRTC_VLINE | RADEON_ENG_DISPLAY_SELECT_CRTC1)); FINISH_ACCEL(); } |