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authorAlex Deucher <alexdeucher@gmail.com>2009-02-03 10:44:10 -0500
committerAlex Deucher <alexdeucher@gmail.com>2009-02-03 10:44:10 -0500
commitd1f071c7f1dad6babfbcfcc2cb2b722a4987f372 (patch)
tree8b1d683610782ab59c382c611f8df474c79da91a /src/radeon_modes.c
parentc88c3ef6f3db266c1aacba5297b8dfc8b66bf00e (diff)
Initial R6xx/R7xx EXA and textured video support
Diffstat (limited to 'src/radeon_modes.c')
-rw-r--r--src/radeon_modes.c22
1 files changed, 13 insertions, 9 deletions
diff --git a/src/radeon_modes.c b/src/radeon_modes.c
index e06f8ddf..0a8fa001 100644
--- a/src/radeon_modes.c
+++ b/src/radeon_modes.c
@@ -65,15 +65,19 @@ void RADEONSetPitch (ScrnInfoPtr pScrn)
align_large = info->allowColorTiling || IS_AVIVO_VARIANT;
/* FIXME: May need to validate line pitch here */
- switch (pScrn->depth / 8) {
- case 1: pitch_mask = align_large ? 255 : 127;
- break;
- case 2: pitch_mask = align_large ? 127 : 31;
- break;
- case 3:
- case 4: pitch_mask = align_large ? 63 : 15;
- break;
- }
+ if (info->ChipFamily < CHIP_FAMILY_R600) {
+ switch (pScrn->depth / 8) {
+ case 1: pitch_mask = align_large ? 255 : 127;
+ break;
+ case 2: pitch_mask = align_large ? 127 : 31;
+ break;
+ case 3:
+ case 4: pitch_mask = align_large ? 63 : 15;
+ break;
+ }
+ } else
+ pitch_mask = 255; /* r6xx/r7xx need 256B alignment for accel */
+
dummy = (pScrn->virtualX + pitch_mask) & ~pitch_mask;
pScrn->displayWidth = dummy;
info->CurrentLayout.displayWidth = pScrn->displayWidth;