diff options
| author | Eamon Walsh <ewalsh@epoch.ncsc.mil> | 2004-05-04 19:43:30 +0000 |
|---|---|---|
| committer | Eamon Walsh <ewalsh@epoch.ncsc.mil> | 2004-05-04 19:43:30 +0000 |
| commit | a0265ed13319eb27223a39c34a446b26ffa64037 (patch) | |
| tree | 08800423ddf28be3a36b597733ec784a39bb8c68 /src/radeon_reg.h | |
| parent | 397653e558b5fa4936ee6c9ac1eb6acaa9cf1cbc (diff) | |
Merge the new release from HEADXACE-SELINUX
Diffstat (limited to 'src/radeon_reg.h')
| -rw-r--r-- | src/radeon_reg.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/radeon_reg.h b/src/radeon_reg.h index 821a087e..8af5da5c 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h @@ -65,6 +65,12 @@ # define RADEON_AGP_APER_SIZE_8MB (0x3e << 0) # define RADEON_AGP_APER_SIZE_4MB (0x3f << 0) # define RADEON_AGP_APER_SIZE_MASK (0x3f << 0) +#define RADEON_STATUS_PCI_CONFIG 0x06 +# define RADEON_CAP_LIST 0x100000 +#define RADEON_CAPABILITIES_PTR_PCI_CONFIG 0x34 /* offset in PCI config*/ +# define RADEON_CAP_PTR_MASK 0xfc /* mask off reserved bits of CAP_PTR */ +# define RADEON_CAP_ID_NULL 0x00 /* End of capability list */ +# define RADEON_CAP_ID_AGP 0x02 /* AGP capability ID */ #define RADEON_AGP_COMMAND 0x0f60 /* PCI */ #define RADEON_AGP_COMMAND_PCI_CONFIG 0x0060 /* offset in PCI config*/ # define RADEON_AGP_ENABLE (1<<8) @@ -401,11 +407,16 @@ # define RADEON_DAC_FORCE_DATA_SEL_MASK (3 << 6) # define RADEON_DAC_FORCE_DATA_MASK 0x0003ff00 # define RADEON_DAC_FORCE_DATA_SHIFT 8 +#define RADEON_DAC_MACRO_CNTL 0x0d04 +# define RADEON_DAC_PDWN_R (1 << 16) +# define RADEON_DAC_PDWN_G (1 << 17) +# define RADEON_DAC_PDWN_B (1 << 18) #define RADEON_TV_DAC_CNTL 0x088c # define RADEON_TV_DAC_STD_MASK 0x0300 # define RADEON_TV_DAC_RDACPD (1 << 24) # define RADEON_TV_DAC_GDACPD (1 << 25) # define RADEON_TV_DAC_BDACPD (1 << 26) +# define RADEON_TV_DAC_BGSLEEP (1 << 26) #define RADEON_DISP_HW_DEBUG 0x0d14 # define RADEON_CRT2_DISP1_SEL (1 << 5) #define RADEON_DISP_OUTPUT_CNTL 0x0d64 |