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authorAlex Deucher <agd5f@yahoo.com>2005-06-30 00:56:01 +0000
committerAlex Deucher <agd5f@yahoo.com>2005-06-30 00:56:01 +0000
commit3ec99c9cd821aeacdd57a9bbc20c4e4ec4711790 (patch)
tree7692ca8384997b7398bc4d45012b4cec3786798e /src/radeon_reg.h
parenta7523e6c0be7a600963e9de10cf0060d16117bf6 (diff)
- Increase the priority of display 0/1 in the memory controller for r3/4xx
hardware when displaypriority is set to HIGH. Fixes display problems in high res modes. Originally reported by Aapo Tahkola.
Diffstat (limited to 'src/radeon_reg.h')
-rw-r--r--src/radeon_reg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 4048fecc..5958c1cf 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -816,6 +816,7 @@
#define RADEON_DISPLAY2_BASE_ADDR 0x33c
#define RADEON_OV0_BASE_ADDR 0x43c
#define RADEON_NB_TOM 0x15c
+#define R300_MC_INIT_MISC_LAT_TIMER 0x180
#define RADEON_MCLK_CNTL 0x0012 /* PLL */
# define RADEON_FORCEON_MCLKA (1 << 16)
# define RADEON_FORCEON_MCLKB (1 << 17)