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| author | Alex Deucher <alexdeucher@gmail.com> | 2008-07-21 23:47:45 -0400 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2008-07-21 23:47:45 -0400 |
| commit | 1c5858484da4fb1c9bc3ac3b4d7a97863ab99730 (patch) | |
| tree | c24aaa9ca5188bae1fb9f85aa838579040933d00 /src/radeon_reg.h | |
| parent | b0378bb145c8a915c943bef7d17f2cdecfccc891 (diff) | |
First pass at InitDispBandwidth() for AVIVO chips
- support for LB allocation
- MC priority bumps for display1/2 on RV515 variants and RS690
If you are having display underflow problems (flickering on sides of
screen in high res modes, etc.) on RV515 or RS690 boards, try setting:
Option "DisplayPriority" "HIGH" in your config.
- still no support for full display watermark programming yet
Something similar might be useful in rhd as well.
Diffstat (limited to 'src/radeon_reg.h')
| -rw-r--r-- | src/radeon_reg.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/radeon_reg.h b/src/radeon_reg.h index b7503032..60f12fc4 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h @@ -3422,6 +3422,7 @@ #define RS690_MC_AGP_LOCATION 0x101 #define RS690_MC_AGP_BASE 0x102 #define RS690_MC_AGP_BASE_2 0x103 +#define RS690_MC_INIT_MISC_LAT_TIMER 0x104 #define RS690_MC_STATUS 0x90 #define RS690_MC_STATUS_IDLE (1 << 0) @@ -3440,6 +3441,7 @@ # define R520_MC_STATUS_IDLE (1 << 1) #define RV515_MC_STATUS 0x08 # define RV515_MC_STATUS_IDLE (1 << 4) +#define RV515_MC_INIT_MISC_LAT_TIMER 0x09 #define AVIVO_MC_DATA 0x0074 #define RV515_MC_FB_LOCATION 0x1 @@ -3602,6 +3604,17 @@ #define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4 #define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8 +#define AVIVO_DC_LB_MEMORY_SPLIT 0x6520 +# define AVIVO_DC_LB_MEMORY_SPLIT_MASK 0x3 +# define AVIVO_DC_LB_MEMORY_SPLIT_SHIFT 0 +# define AVIVO_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF 0 +# define AVIVO_DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q 1 +# define AVIVO_DC_LB_MEMORY_SPLIT_D1_ONLY 2 +# define AVIVO_DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q 3 +# define AVIVO_DC_LB_MEMORY_SPLIT_SHIFT_MODE (1 << 2) +# define AVIVO_DC_LB_DISP1_END_ADR_SHIFT 4 +# define AVIVO_DC_LB_DISP1_END_ADR_MASK 0x7ff + #define AVIVO_D1MODE_DATA_FORMAT 0x6528 # define AVIVO_D1MODE_INTERLEAVE_EN (1 << 0) #define AVIVO_D1MODE_DESKTOP_HEIGHT 0x652c |