diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2013-10-30 15:21:26 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2013-11-04 10:02:46 -0500 |
commit | e4cd0f4392ea11c93088ad429f36eaaf9bcbf505 (patch) | |
tree | c04568fc13d40b23158288090d010f5e1a09dd5f /src | |
parent | 3b38701a72fa1cad1e4610a2f4330b3da4cc6391 (diff) |
radeon: enable tiling on SI by default (v2)
Now that mesa 9.2 is out with support for tiling
on SI asics, we can enable it here. Tiling improves
memory bandwidth utilization.
V2: update man page
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/radeon_kms.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/radeon_kms.c b/src/radeon_kms.c index 255906b8..5b85acc3 100644 --- a/src/radeon_kms.c +++ b/src/radeon_kms.c @@ -860,17 +860,17 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags) Bool colorTilingDefault = xorgGetVersion() >= XORG_VERSION_NUMERIC(1,9,4,901,0) && info->ChipFamily >= CHIP_FAMILY_R300 && - /* this ARUBA check could be removed sometime after a big mesa release + /* this check could be removed sometime after a big mesa release * with proper bit, in the meantime you need to set tiling option in * xorg configuration files */ - info->ChipFamily <= CHIP_FAMILY_ARUBA && + info->ChipFamily <= CHIP_FAMILY_HAINAN && !info->is_fast_fb; /* 2D color tiling */ if (info->ChipFamily >= CHIP_FAMILY_R600) { info->allowColorTiling2D = xf86ReturnOptValBool(info->Options, OPTION_COLOR_TILING_2D, - info->ChipFamily <= CHIP_FAMILY_ARUBA); + info->ChipFamily <= CHIP_FAMILY_HAINAN); } if (info->ChipFamily >= CHIP_FAMILY_R600) { |