Switch radeon driver to using a card type rather than having a IsPCI flag,

    allow for PCI/AGP/PCIE cards. Set PCI gart allocation to only happen on
    PCIE cards. Add Radeon PCIE card detection using capability bits.

5 files changed, 34 insertions, 24 deletions

diff --git a/src/radeon.h b/src/radeon.h
index ac5ebb00..46ea6948 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -299,7 +299,11 @@ typedef enum {
        CHIP_ERRATA_PLL_DELAY           = 0x00000004
 } RADEONErrata;
 
-
+typedef enum {
+	CARD_PCI,
+	CARD_AGP,
+	CARD_PCIE
+} RADEONCardType;
 
 typedef struct {
     CARD32 freq;
@@ -486,7 +490,7 @@ typedef struct {
     drmSize           registerSize;
     drm_handle_t         registerHandle;
 
-    Bool              IsPCI;            /* Current card is a PCI card */
+    RADEONCardType    cardType;            /* Current card is a PCI card */
     drmSize           pciSize;
     drm_handle_t         pciMemHandle;
     unsigned char     *PCI;             /* Map */
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 892e5d52..209df971 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -1053,7 +1053,7 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
        drmInfo.func		= DRM_RADEON_INIT_CP;
 
     drmInfo.sarea_priv_offset   = sizeof(XF86DRISAREARec);
-    drmInfo.is_pci              = info->IsPCI;
+    drmInfo.is_pci              = (info->cardType!=CARD_AGP);
     drmInfo.cp_mode             = info->CPMode;
     drmInfo.gart_size           = info->gartSize*1024*1024;
     drmInfo.ring_size           = info->ringSize*1024*1024;
@@ -1124,7 +1124,7 @@ static Bool RADEONDRIBufInit(RADEONInfoPtr info, ScreenPtr pScreen)
     info->bufNumBufs = drmAddBufs(info->drmFD,
 				  info->bufMapSize / RADEON_BUFFER_SIZE,
 				  RADEON_BUFFER_SIZE,
-				  info->IsPCI ? DRM_SG_BUFFER : DRM_AGP_BUFFER,
+				  (info->cardType!=CARD_AGP) ? DRM_SG_BUFFER : DRM_AGP_BUFFER,
 				  info->bufStart);
 
     if (info->bufNumBufs <= 0) {
@@ -1471,7 +1471,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
     }
 
 				/* Initialize AGP */
-    if (!info->IsPCI && !RADEONDRIAgpInit(info, pScreen)) {
+    if (info->cardType==CARD_AGP && !RADEONDRIAgpInit(info, pScreen)) {
 	xf86DrvMsg(pScreen->myNum, X_ERROR,
 		   "[agp] AGP failed to initialize. Disabling the DRI.\n" );
 	xf86DrvMsg(pScreen->myNum, X_INFO,
@@ -1482,7 +1482,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
     }
 
 				/* Initialize PCI */
-    if (info->IsPCI && !RADEONDRIPciInit(info, pScreen)) {
+    if ((info->cardType!=CARD_AGP) && !RADEONDRIPciInit(info, pScreen)) {
 	xf86DrvMsg(pScreen->myNum, X_ERROR,
 		   "[pci] PCI failed to initialize. Disabling the DRI.\n" );
 	RADEONDRICloseScreen(pScreen);
@@ -1578,7 +1578,7 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
     pRADEONDRI->depth             = pScrn->depth;
     pRADEONDRI->bpp               = pScrn->bitsPerPixel;
 
-    pRADEONDRI->IsPCI             = info->IsPCI;
+    pRADEONDRI->IsPCI             = (info->cardType!=CARD_AGP);
     pRADEONDRI->AGPMode           = info->agpMode;
 
     pRADEONDRI->frontOffset       = info->frontOffset;
@@ -1641,7 +1641,7 @@ void RADEONDRIResume(ScreenPtr pScreen)
 	return;
     }
 
-    if (!info->IsPCI) {
+    if (info->cardType==CARD_AGP) {
 	if (!RADEONSetAgpMode(info, pScreen))
 	    return;
 
@@ -2015,7 +2015,7 @@ void RADEONDRIAllocatePCIGARTTable(ScreenPtr pScreen)
     int width_bytes;
     int size_bytes;
 
-    if (!info->IsPCI || info->drmMinor<19)
+    if (info->cardType!=CARD_PCIE || info->drmMinor<19)
       return;
 
     size_bytes = RADEON_PCIGART_TABLE_SIZE;
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index c082a076..5f6dc941 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -2802,7 +2802,7 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
      *	- AGP Interface Specification Revision 2.0, Section 6.1.5
      */
 
-    info->IsPCI = TRUE;
+    info->cardType = CARD_PCI;
 
     if (pciReadLong(info->PciTag, PCI_CMD_STAT_REG) & RADEON_CAP_LIST) {
 	CARD32 cap_ptr, cap_id;
@@ -2814,7 +2814,11 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
 	while(cap_ptr != RADEON_CAP_ID_NULL) {
 	    cap_id = pciReadLong(info->PciTag, cap_ptr);
 	    if ((cap_id & 0xff)== RADEON_CAP_ID_AGP) {
-		info->IsPCI = FALSE;
+		info->cardType = CARD_AGP;
+		break;
+	    }
+	    if ((cap_id & 0xff)== RADEON_CAP_ID_EXP) {
+		info->cardType = CARD_PCIE;
 		break;
 	    }
 	    cap_ptr = (cap_id >> 8) & RADEON_CAP_PTR_MASK;
@@ -2822,19 +2826,19 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
     }
 
     xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%s card detected\n",
-	       (info->IsPCI) ? "PCI" : "AGP");
+	       (info->cardType==CARD_PCI) ? "PCI" :
+		(info->cardType==CARD_PCIE) ? "PCIE" : "AGP");
 
     if ((s = xf86GetOptValString(info->Options, OPTION_BUS_TYPE))) {
 	if (strcmp(s, "AGP") == 0) {
-	    info->IsPCI = FALSE;
+	    info->cardType = CARD_AGP;
 	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Forced into AGP mode\n");
 	} else if (strcmp(s, "PCI") == 0) {
-	    info->IsPCI = TRUE;
+	    info->cardType = CARD_PCI;
 	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Forced into PCI mode\n");
 	} else if (strcmp(s, "PCIE") == 0) {
-	    info->IsPCI = TRUE;
-	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-		       "PCI Express not supported yet, using PCI mode\n");
+	    info->cardType = CARD_PCIE;
+	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Forced into PCI Express mode\n");
 	} else {
 	    xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
 		       "Invalid BusType option, using detected type\n");
@@ -4329,7 +4333,7 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn)
 
     info->CPusecTimeout = RADEON_DEFAULT_CP_TIMEOUT;
 
-    if (!info->IsPCI) {
+    if (info->cardType==CARD_AGP) {
 	if (xf86GetOptValInteger(info->Options,
 				 OPTION_AGP_MODE, &(info->agpMode))) {
 	    if (info->agpMode < 1 || info->agpMode > RADEON_AGP_MAX_MODE) {
@@ -5326,9 +5330,10 @@ Bool RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen)
     xf86DrvMsg(scrnIndex, X_INFO,
 	       "Will use depth buffer at offset 0x%x\n",
 	       info->depthOffset);
-    xf86DrvMsg(scrnIndex, X_INFO,
-	       "Will use %d kb for PCI GART table at offset 0x%x\n",
-	       info->pciGartSize/1024, info->pciGartOffset);
+    if (info->cardType==CARD_PCIE)
+    	xf86DrvMsg(scrnIndex, X_INFO,
+	           "Will use %d kb for PCI GART table at offset 0x%x\n",
+		   info->pciGartSize/1024, info->pciGartOffset);
     xf86DrvMsg(scrnIndex, X_INFO,
 	       "Will use %d kb for textures at offset 0x%x\n",
 	       info->textureSize/1024, info->textureOffset);
@@ -5749,7 +5754,7 @@ _X_EXPORT Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
 	xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
 
 #ifdef XF86DRI
-    if (info->IsPCI && info->pciGartOffset && info->drmMinor>=19)
+    if (info->cardType==CARD_PCIE && info->pciGartOffset && info->drmMinor>=19)
     {
       drmRadeonSetParam  radeonsetparam;
       memset(&radeonsetparam, 0, sizeof(drmRadeonSetParam));
@@ -5779,7 +5784,7 @@ _X_EXPORT Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen,
 	}
     }
     if (info->directRenderingEnabled) {
-	if ((info->DispPriority == 1) && (!info->IsPCI)) {
+	if ((info->DispPriority == 1) && (info->cardType==CARD_AGP)) {
 	    /* we need to re-calculate bandwidth because of AGPMode difference. */ 
 	    RADEONInitDispBandwidth(pScrn);
 	}
diff --git a/src/radeon_exa.c b/src/radeon_exa.c
index 3224b9a9..5b81b273 100644
--- a/src/radeon_exa.c
+++ b/src/radeon_exa.c
@@ -392,7 +392,7 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen)
 	info->frontOffset = 0;
 	info->frontPitch = pScrn->displayWidth;
 
-	if (info->IsPCI && info->drmMinor >= 19) {
+	if ((info->cardType==CARD_PCIE) && info->drmMinor >= 19) {
 	    info->pciGartSize = RADEON_PCIGART_TABLE_SIZE;
 	    info->pciGartOffset = RADEON_ALIGN(info->exa.card.offScreenBase,
 					       256);
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 13f5ad0d..9ca65227 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -87,6 +87,7 @@
 #       define RADEON_CAP_PTR_MASK          0xfc /* mask off reserved bits of CAP_PTR */
 #       define RADEON_CAP_ID_NULL           0x00 /* End of capability list */
 #       define RADEON_CAP_ID_AGP            0x02 /* AGP capability ID */
+#       define RADEON_CAP_ID_EXP            0x10 /* PCI Express */
 #define RADEON_AGP_COMMAND                  0x0f60 /* PCI */
 #define RADEON_AGP_COMMAND_PCI_CONFIG       0x0060 /* offset in PCI config*/
 #       define RADEON_AGP_ENABLE            (1<<8)