diff options
| author | Dave Airlie <airlied@redhat.com> | 2008-10-10 16:18:05 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2008-10-10 16:18:05 +1000 |
| commit | 9eb2b6cd28224f0cbbabf3df451696ae1a845b9c (patch) | |
| tree | 3aac6496e93f30a98c245ed0deb58a5645a062ab /src | |
| parent | 0975e007ec7933acf9cd8ad2f281313ef8d32ac9 (diff) | |
radeon: hopefully fix plls for 30" monitors.
Only do the HIGH trick on the DCE3 cards. Tested on rv610/630/770.
Diffstat (limited to 'src')
| -rw-r--r-- | src/atombios_crtc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c index 3f2e1136..4e2395f8 100644 --- a/src/atombios_crtc.c +++ b/src/atombios_crtc.c @@ -224,7 +224,7 @@ atombios_crtc_set_pll(xf86CrtcPtr crtc, DisplayModePtr mode, int pll_flags) if (IS_AVIVO_VARIANT) { uint32_t temp; - if (mode->Clock > 200000) /* range limits??? */ + if (IS_DCE3_VARIANT && mode->Clock > 200000) /* range limits??? */ pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; else pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; |