diff options
| author | Roel Kluin <roel.kluin@gmail.com> | 2009-10-06 18:31:17 -0400 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2009-10-06 18:31:17 -0400 |
| commit | e08411af1aa8c7d4233ba593b84360397cdbb307 (patch) | |
| tree | 125468d7826ac1cffa229b21cd3876f4a96becc1 /src | |
| parent | e59ae08270711512e64b70f79b6476cc2c52d230 (diff) | |
radeon: Fix duplicated bit settings
[agd5f: adapted from kms patch]
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/legacy_output.c | 4 | ||||
| -rw-r--r-- | src/radeon_pm.c | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/legacy_output.c b/src/legacy_output.c index 73c86b99..186cd25f 100644 --- a/src/legacy_output.c +++ b/src/legacy_output.c @@ -1521,7 +1521,7 @@ RADEONInitTvDacCntl(xf86OutputPtr output, RADEONSavePtr save) R420_TV_DAC_DACADJ_MASK | R420_TV_DAC_RDACPD | R420_TV_DAC_GDACPD | - R420_TV_DAC_GDACPD | + R420_TV_DAC_BDACPD | R420_TV_DAC_TVENABLE); } else { save->tv_dac_cntl = info->SavedReg->tv_dac_cntl & @@ -1530,7 +1530,7 @@ RADEONInitTvDacCntl(xf86OutputPtr output, RADEONSavePtr save) RADEON_TV_DAC_DACADJ_MASK | RADEON_TV_DAC_RDACPD | RADEON_TV_DAC_GDACPD | - RADEON_TV_DAC_GDACPD); + RADEON_TV_DAC_BDACPD); } save->tv_dac_cntl |= (RADEON_TV_DAC_NBLANK | diff --git a/src/radeon_pm.c b/src/radeon_pm.c index fe8f2143..d5152c80 100644 --- a/src/radeon_pm.c +++ b/src/radeon_pm.c @@ -226,7 +226,7 @@ static void LegacySetClockGating(ScrnInfoPtr pScrn, Bool enable) R300_PIXCLK_TRANS_ALWAYS_ONb | R300_PIXCLK_TVO_ALWAYS_ONb | R300_P2G2CLK_ALWAYS_ONb | - R300_P2G2CLK_ALWAYS_ONb); + R300_P2G2CLK_DAC_ALWAYS_ONb); OUTPLL(pScrn, RADEON_PIXCLKS_CNTL, tmp); } else if (info->ChipFamily >= CHIP_FAMILY_RV350) { tmp = INPLL(pScrn, R300_SCLK_CNTL2); @@ -273,7 +273,7 @@ static void LegacySetClockGating(ScrnInfoPtr pScrn, Bool enable) R300_PIXCLK_TRANS_ALWAYS_ONb | R300_PIXCLK_TVO_ALWAYS_ONb | R300_P2G2CLK_ALWAYS_ONb | - R300_P2G2CLK_ALWAYS_ONb); + R300_P2G2CLK_DAC_ALWAYS_ONb); OUTPLL(pScrn, RADEON_PIXCLKS_CNTL, tmp); tmp = INPLL(pScrn, RADEON_MCLK_MISC); @@ -454,8 +454,8 @@ static void LegacySetClockGating(ScrnInfoPtr pScrn, Bool enable) RADEON_PIXCLK_TMDS_ALWAYS_ONb | R300_PIXCLK_TRANS_ALWAYS_ONb | R300_PIXCLK_TVO_ALWAYS_ONb | - R300_P2G2CLK_ALWAYS_ONb | R300_P2G2CLK_ALWAYS_ONb | + R300_P2G2CLK_DAC_ALWAYS_ONb | R300_DISP_DAC_PIXCLK_DAC2_BLANK_OFF); OUTPLL(pScrn, RADEON_PIXCLKS_CNTL, tmp); } else if (info->ChipFamily >= CHIP_FAMILY_RV350) { @@ -507,8 +507,8 @@ static void LegacySetClockGating(ScrnInfoPtr pScrn, Bool enable) RADEON_PIXCLK_TMDS_ALWAYS_ONb | R300_PIXCLK_TRANS_ALWAYS_ONb | R300_PIXCLK_TVO_ALWAYS_ONb | - R300_P2G2CLK_ALWAYS_ONb | R300_P2G2CLK_ALWAYS_ONb | + R300_P2G2CLK_DAC_ALWAYS_ONb | R300_DISP_DAC_PIXCLK_DAC2_BLANK_OFF); OUTPLL(pScrn, RADEON_PIXCLKS_CNTL, tmp); } else { |