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author | Mario Kleiner <mario.kleiner.de@gmail.com> | 2015-06-28 02:45:58 +0200 |
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committer | Michel Dänzer <michel.daenzer@amd.com> | 2015-06-29 17:08:12 +0900 |
commit | fc07c370dac4649511eb7322d05a61605a539f39 (patch) | |
tree | 1e991d4368ea0dce27d2959805e3ddaa0987ddaa /src | |
parent | ddaba449e8d6fe9fc0d97085e4045843fd8d7af9 (diff) |
Fix inconsistent default eg_tile_split in evergreen_accel.c
eg_tile_split() maps the default: switch-case to tile split
flag 6, like for a tile split size of 4096 Bytes. All other
instances of tile split mappings or reverse mappings in both
the ddx and in Mesa's radeon gallium drivers assign the default:
case to tile split flag 4, consistent with a default of 1024
Bytes.
Make this one outlier consistent with other instances of
mappings in the code to avoid surprises.
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/evergreen_accel.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/evergreen_accel.c b/src/evergreen_accel.c index 41ebc1a9..43146bbf 100644 --- a/src/evergreen_accel.c +++ b/src/evergreen_accel.c @@ -79,9 +79,9 @@ unsigned eg_tile_split(unsigned tile_split) case 128: tile_split = 1; break; case 256: tile_split = 2; break; case 512: tile_split = 3; break; + default: case 1024: tile_split = 4; break; case 2048: tile_split = 5; break; - default: case 4096: tile_split = 6; break; } return tile_split; |