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-rw-r--r--src/radeon.h3
-rw-r--r--src/radeon_dri.c15
2 files changed, 3 insertions, 15 deletions
diff --git a/src/radeon.h b/src/radeon.h
index 4f77c3b9..0fdfc7f8 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -539,9 +539,6 @@ typedef struct {
drm_handle_t fbHandle;
- drmSize registerSize;
- drm_handle_t registerHandle;
-
RADEONCardType cardType; /* Current card is a PCI card */
drmSize pciSize;
drm_handle_t pciMemHandle;
diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 0fc03e4a..fd9d41d9 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -1073,15 +1073,6 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen)
*/
static Bool RADEONDRIMapInit(RADEONInfoPtr info, ScreenPtr pScreen)
{
- /* Map registers */
- info->registerSize = info->MMIOSize;
- if (drmAddMap(info->drmFD, info->MMIOAddr, info->registerSize,
- DRM_REGISTERS, DRM_READ_ONLY, &info->registerHandle) < 0) {
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[drm] register handle = 0x%08x\n", info->registerHandle);
-
return TRUE;
}
@@ -1119,7 +1110,7 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
drmInfo.depth_pitch = info->depthPitch * drmInfo.depth_bpp / 8;
drmInfo.fb_offset = info->fbHandle;
- drmInfo.mmio_offset = info->registerHandle;
+ drmInfo.mmio_offset = -1;
drmInfo.ring_offset = info->ringHandle;
drmInfo.ring_rptr_offset = info->ringReadPtrHandle;
drmInfo.buffers_offset = info->bufHandle;
@@ -1679,8 +1670,8 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen)
pRADEONDRI->textureSize = info->textureSize;
pRADEONDRI->log2TexGran = info->log2TexGran;
- pRADEONDRI->registerHandle = info->registerHandle;
- pRADEONDRI->registerSize = info->registerSize;
+ pRADEONDRI->registerHandle = -1;
+ pRADEONDRI->registerSize = 0;
pRADEONDRI->statusHandle = info->ringReadPtrHandle;
pRADEONDRI->statusSize = info->ringReadMapSize;