diff options
| -rw-r--r-- | src/atombios_crtc.c | 4 | ||||
| -rw-r--r-- | src/legacy_crtc.c | 48 | ||||
| -rw-r--r-- | src/radeon_crtc.c | 8 |
3 files changed, 28 insertions, 32 deletions
diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c index 01266b65..54c45786 100644 --- a/src/atombios_crtc.c +++ b/src/atombios_crtc.c @@ -167,13 +167,13 @@ atombios_crtc_dpms(xf86CrtcPtr crtc, int mode) RADEONInfoPtr info = RADEONPTR(crtc->scrn); switch (mode) { case DPMSModeOn: - case DPMSModeStandby: - case DPMSModeSuspend: if (IS_DCE3_VARIANT) atombios_enable_crtc_memreq(info->atomBIOS, radeon_crtc->crtc_id, 1); atombios_enable_crtc(info->atomBIOS, radeon_crtc->crtc_id, 1); atombios_blank_crtc(info->atomBIOS, radeon_crtc->crtc_id, 0); break; + case DPMSModeStandby: + case DPMSModeSuspend: case DPMSModeOff: atombios_blank_crtc(info->atomBIOS, radeon_crtc->crtc_id, 1); atombios_enable_crtc(info->atomBIOS, radeon_crtc->crtc_id, 0); diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c index 7a3a920a..b57ba5f7 100644 --- a/src/legacy_crtc.c +++ b/src/legacy_crtc.c @@ -649,6 +649,9 @@ radeon_crtc_modeset_ioctl(xf86CrtcPtr crtc, Bool post) if (!info->directRenderingEnabled) return; + if (info->ChipFamily >= CHIP_FAMILY_R600) + return; + modeset.crtc = radeon_crtc->crtc_id; modeset.cmd = post ? _DRM_POST_MODESET : _DRM_PRE_MODESET; @@ -661,55 +664,42 @@ radeon_crtc_modeset_ioctl(xf86CrtcPtr crtc, Bool post) void legacy_crtc_dpms(xf86CrtcPtr crtc, int mode) { - int mask; + uint32_t mask; RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; RADEONEntPtr pRADEONEnt = RADEONEntPriv(crtc->scrn); unsigned char *RADEONMMIO = pRADEONEnt->MMIO; - mask = radeon_crtc->crtc_id ? (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS | RADEON_CRTC2_DISP_REQ_EN_B) : (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS); - - if (mode == DPMSModeOff) - radeon_crtc_modeset_ioctl(crtc, FALSE); + if (radeon_crtc->crtc_id) + mask = (RADEON_CRTC2_EN | + RADEON_CRTC2_DISP_DIS | + RADEON_CRTC2_VSYNC_DIS | + RADEON_CRTC2_HSYNC_DIS | + RADEON_CRTC2_DISP_REQ_EN_B); + else + mask = (RADEON_CRTC_DISPLAY_DIS | + RADEON_CRTC_HSYNC_DIS | + RADEON_CRTC_VSYNC_DIS); switch(mode) { case DPMSModeOn: if (radeon_crtc->crtc_id) { - OUTREGP(RADEON_CRTC2_GEN_CNTL, 0, ~mask); + OUTREGP(RADEON_CRTC2_GEN_CNTL, RADEON_CRTC2_EN, ~mask); } else { - OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B); + OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B)); OUTREGP(RADEON_CRTC_EXT_CNTL, 0, ~mask); } break; case DPMSModeStandby: - if (radeon_crtc->crtc_id) { - OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_HSYNC_DIS), ~mask); - } else { - OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B); - OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS), ~mask); - } - break; case DPMSModeSuspend: - if (radeon_crtc->crtc_id) { - OUTREGP(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS), ~mask); - } else { - OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B); - OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS), ~mask); - } - break; case DPMSModeOff: if (radeon_crtc->crtc_id) { OUTREGP(RADEON_CRTC2_GEN_CNTL, mask, ~mask); } else { - OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~RADEON_CRTC_DISP_REQ_EN_B); + OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN | RADEON_CRTC_DISP_REQ_EN_B)); OUTREGP(RADEON_CRTC_EXT_CNTL, mask, ~mask); } break; } - - if (mode != DPMSModeOff) { - radeon_crtc_modeset_ioctl(crtc, TRUE); - radeon_crtc_load_lut(crtc); - } } @@ -912,7 +902,6 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save, /*save->bios_4_scratch = info->SavedReg->bios_4_scratch;*/ save->crtc_gen_cntl = (RADEON_CRTC_EXT_DISP_EN - | RADEON_CRTC_EN | (format << 8) | ((mode->Flags & V_DBLSCAN) ? RADEON_CRTC_DBL_SCAN_EN @@ -1160,8 +1149,7 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save, else save->crtc2_gen_cntl = 0; - save->crtc2_gen_cntl |= (RADEON_CRTC2_EN - | (format << 8) + save->crtc2_gen_cntl |= ((format << 8) | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS | RADEON_CRTC2_DISP_DIS diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 4b687708..c78ac43b 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -77,6 +77,9 @@ radeon_crtc_dpms(xf86CrtcPtr crtc, int mode) if ((mode == DPMSModeOn) && radeon_crtc->enabled) return; + if (mode == DPMSModeOff) + radeon_crtc_modeset_ioctl(crtc, FALSE); + if (IS_AVIVO_VARIANT || info->r4xx_atom) { atombios_crtc_dpms(crtc, mode); } else { @@ -97,6 +100,11 @@ radeon_crtc_dpms(xf86CrtcPtr crtc, int mode) } } + if (mode != DPMSModeOff) { + radeon_crtc_modeset_ioctl(crtc, TRUE); + radeon_crtc_load_lut(crtc); + } + if (mode == DPMSModeOn) radeon_crtc->enabled = TRUE; else |