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-rw-r--r--README.r128160
-rw-r--r--README.r128.sgml138
-rw-r--r--man/r128.man156
-rw-r--r--src/r128.h606
-rw-r--r--src/r128_accel.c1880
-rw-r--r--src/r128_common.h169
-rw-r--r--src/r128_cursor.c311
-rw-r--r--src/r128_dga.c402
-rw-r--r--src/r128_dri.c1499
-rw-r--r--src/r128_dri.h100
-rw-r--r--src/r128_dripriv.h57
-rw-r--r--src/r128_driver.c4463
-rw-r--r--src/r128_misc.c79
-rw-r--r--src/r128_probe.c378
-rw-r--r--src/r128_probe.h73
-rw-r--r--src/r128_reg.h1533
-rw-r--r--src/r128_sarea.h194
-rw-r--r--src/r128_version.h59
-rw-r--r--src/r128_video.c1028
19 files changed, 0 insertions, 13285 deletions
diff --git a/README.r128 b/README.r128
deleted file mode 100644
index dcc27158..00000000
--- a/README.r128
+++ /dev/null
@@ -1,160 +0,0 @@
- Information for ATI Rage 128 Users
- Precision Insight, Inc., SuSE GmbH
- 13 June 2000
- ____________________________________________________________
-
- Table of Contents
-
-
- 1. Supported Hardware
- 2. Features
- 3. Technical Notes
- 4. Reported Working Video Cards
- 5. Configuration
- 6. Driver Options
- 7. Known Limitations
- 8. Authors
-
-
- ______________________________________________________________________
-
- 1. Supported Hardware
-
-
- +o ATI Rage 128 based cards
-
-
-
- 2. Features
-
-
- +o Full support (including hardware accelerated 2D drawing) for 8, 15,
- 16, 24 bit pixel depths.
-
- +o Hardware cursor support to reduce sprite flicker.
-
- +o Support for high resolution video modes up to 1800x1440 @ 70Hz.
-
- +o Support for doublescan video modes (e.g., 320x200 and 320x240).
-
- +o Support for gamma correction at all pixel depths.
-
- +o Fully programmable clock supported.
-
- +o Robust text mode restore for VT switching.
-
-
-
- 3. Technical Notes
-
-
- +o None
-
-
-
- 4. Reported Working Video Cards
-
-
- +o Rage Fury AGP 32MB
-
- +o XPERT 128 AGP 16MB
-
- +o XPERT 99 AGP 8MB
-
-
-
- 5. Configuration
-
- The driver auto-detects all device information necessary to initialize
- the card. The only lines you need in the "Device" section of your
- xorg.conf file are:
-
- Section "Device"
- Identifier "Rage 128"
- Driver "r128"
- EndSection
-
-
- or let xorgconfig do this for you.
-
- However, if you have problems with auto-detection, you can specify:
-
- +o VideoRam - in kilobytes
-
- +o MemBase - physical address of the linear framebuffer
-
- +o IOBase - physical address of the memory mapped IO registers
-
- +o ChipID - PCI DEVICE ID
-
-
-
- 6. Driver Options
-
-
- +o "hw_cursor" - request hardware cursor (default)
-
- +o "sw_cursor" - software cursor only
-
- +o "no_accel" - software rendering only
-
- +o "dac_8_bit" - use color weight 888 in 8 bpp mode (default)
-
- +o "dac_6_bit" - use color weight 666 in 8 bpp mode (VGA emulation)
-
-
-
- 7. Known Limitations
-
-
- +o None
-
-
-
- 8. Authors
-
- The X11R6.8 driver was originally part of XFree86 4.4 rc2.
-
- The XFree86 4 driver was ported from XFree86 3.3.x and enhanced by:
-
- +o Rickard E. (Rik) Faith <faith@precisioninsight.com>
-
- +o Kevin E. Martin <kevin@precisioninsight.com>
-
- The XFree86 4 driver was funded by ATI and was donated to The XFree86
- Project by:
-
- Precision Insight, Inc.
- Cedar Park, TX
- USA
-
-
- The XFree86 3.3.x driver used for the port was written by:
-
- +o Rickard E. (Rik) Faith <faith@precisioninsight.com>
-
- +o Kevin E. Martin <kevin@precisioninsight.com>
-
- The XFree86 3.3.x driver was funded by ATI and was donated to The
- XFree86 Project by Precision Insight, Inc. It was based in part on
- an earlier driver that was written by:
-
- +o Alan Hourihane <alanh@fairlite.demon.co.uk>
-
- +o Dirk Hohndel <hohndel@suse.de>
-
- This early driver was funded and donated to The XFree86 Project by:
-
- SuSE GmbH
- Schanzaekerstr. 10
- 90443 Nuernberg
- Germany
-
-
-
- http://www.precisioninsight.com
-
- http://www.suse.com
-
-
-
diff --git a/README.r128.sgml b/README.r128.sgml
deleted file mode 100644
index 8d7f4480..00000000
--- a/README.r128.sgml
+++ /dev/null
@@ -1,138 +0,0 @@
-<!DOCTYPE linuxdoc PUBLIC "-//Xorg//DTD linuxdoc//EN"[
-<!ENTITY % defs SYSTEM "defs.ent"> %defs;
-]>
-
-<article>
-<title>Information for ATI Rage 128 Users
-<author>Precision Insight, Inc., SuSE GmbH
-<date>13 June 2000
-
-<ident>
-</ident>
-
-<toc>
-
-<sect>Supported Hardware
-<p>
-<itemize>
- <item>ATI Rage 128 based cards
-</itemize>
-
-
-<sect>Features
-<p>
-<itemize>
- <item>Full support (including hardware accelerated 2D drawing) for 8, 15,
- 16, 24 bit pixel depths.
- <item>Hardware cursor support to reduce sprite flicker.
- <item>Support for high resolution video modes up to 1800x1440 @ 70Hz.
- <item>Support for doublescan video modes (e.g., 320x200 and 320x240).
- <item>Support for gamma correction at all pixel depths.
- <item>Fully programmable clock supported.
- <item>Robust text mode restore for VT switching.
-</itemize>
-
-
-<sect>Technical Notes
-<p>
-<itemize>
- <item>None
-</itemize>
-
-
-<sect>Reported Working Video Cards
-<p>
-<itemize>
- <item>Rage Fury AGP 32MB
- <item>XPERT 128 AGP 16MB
- <item>XPERT 99 AGP 8MB
-</itemize>
-
-
-<sect>Configuration
-<p>
-The driver auto-detects all device information necessary to
-initialize the card. The only lines you need in the "Device"
-section of your xorg.conf file are:
-<verb>
- Section "Device"
- Identifier "Rage 128"
- Driver "r128"
- EndSection
-</verb>
-or let <tt>xorgconfig</tt> do this for you.
-
-However, if you have problems with auto-detection, you can specify:
-<itemize>
- <item>VideoRam - in kilobytes
- <item>MemBase - physical address of the linear framebuffer
- <item>IOBase - physical address of the memory mapped IO registers
- <item>ChipID - PCI DEVICE ID
-</itemize>
-
-
-<sect>Driver Options
-<p>
-<itemize>
- <item>"hw_cursor" - request hardware cursor (default)
- <item>"sw_cursor" - software cursor only
- <item>"no_accel" - software rendering only
- <item>"dac_8_bit" - use color weight 888 in 8 bpp mode (default)
- <item>"dac_6_bit" - use color weight 666 in 8 bpp mode (VGA emulation)
-</itemize>
-
-
-<sect>Known Limitations
-<p>
-<itemize>
- <item>None
-</itemize>
-
-
-<sect>Authors
-<p>
-The X11R&relvers; driver was originally part of XFree86 4.4 rc2.
-
-The XFree86 4 driver was ported from XFree86 3.3.x and enhanced by:
-<itemize>
- <item>Rickard E. (Rik) Faith <email>faith@precisioninsight.com</email>
- <item>Kevin E. Martin <email>kevin@precisioninsight.com</email>
-</itemize>
-<p>
-The XFree86 4 driver was funded by ATI and was donated to The XFree86
-Project by:
-<verb>
- Precision Insight, Inc.
- Cedar Park, TX
- USA
-</verb>
-<p>
-The XFree86 3.3.x driver used for the port was written by:
-<itemize>
- <item>Rickard E. (Rik) Faith <email>faith@precisioninsight.com</email>
- <item>Kevin E. Martin <email>kevin@precisioninsight.com</email>
-</itemize>
-The XFree86 3.3.x driver was funded by ATI and was donated to The XFree86
-Project by Precision Insight, Inc. It was based in part on an earlier
-driver that was written by:
-<itemize>
- <item>Alan Hourihane <email>alanh@fairlite.demon.co.uk</email>
- <item>Dirk Hohndel <email>hohndel@suse.de</email>
-</itemize>
-<p>This early driver was funded and donated to The XFree86 Project by:
-<verb>
- SuSE GmbH
- Schanzaekerstr. 10
- 90443 Nuernberg
- Germany
-</verb>
-
-<p>
-<htmlurl name="http://www.precisioninsight.com"
- url="http://www.precisioninsight.com">
-<p>
-<htmlurl name="http://www.suse.com"
- url="http://www.suse.com">
-
-
-</article>
diff --git a/man/r128.man b/man/r128.man
deleted file mode 100644
index 709c2fe8..00000000
--- a/man/r128.man
+++ /dev/null
@@ -1,156 +0,0 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/ati/r128.man,v 1.3 2001/06/01 02:10:05 dawes Exp $
-.\" shorthand for double quote that works everywhere.
-.ds q \N'34'
-.TH R128 __drivermansuffix__ __vendorversion__
-.SH NAME
-r128 \- ATI Rage 128 video driver
-.SH SYNOPSIS
-.nf
-.B "Section \*qDevice\*q"
-.BI " Identifier \*q" devname \*q
-.B " Driver \*qr128\*q"
-\ \ ...
-.B EndSection
-.fi
-.SH DESCRIPTION
-.B r128
-is an __xservername__ driver for ATI Rage 128 based video cards. It contains
-full support for 8, 15, 16 and 24 bit pixel depths, hardware
-acceleration of drawing primitives, hardware cursor, video modes up to
-1800x1440 @ 70Hz, doublescan modes (e.g., 320x200 and 320x240), gamma
-correction at all pixel depths, a fully programming dot clock and robust
-text mode restoration for VT switching. Dualhead is supported on M3/M4
-mobile chips.
-.SH SUPPORTED HARDWARE
-The
-.B r128
-driver supports all ATI Rage 128 based video cards including the Rage
-Fury AGP 32MB, the XPERT 128 AGP 16MB and the XPERT 99 AGP 8MB.
-.SH CONFIGURATION DETAILS
-Please refer to __xconfigfile__(__filemansuffix__) for general configuration
-details. This section only covers configuration details specific to this
-driver.
-.PP
-The driver auto-detects all device information necessary to initialize
-the card. However, if you have problems with auto-detection, you can
-specify:
-.PP
-.RS 4
-VideoRam - in kilobytes
-.br
-MemBase - physical address of the linear framebuffer
-.br
-IOBase - physical address of the MMIO registers
-.br
-ChipID - PCI DEVICE ID
-.RE
-.PP
-In addition, the following driver
-.B Options
-are supported:
-.TP
-.BI "Option \*qSWcursor\*q \*q" boolean \*q
-Selects software cursor. The default is
-.B off.
-.TP
-.BI "Option \*qNoAccel\*q \*q" boolean \*q
-Enables or disables all hardware acceleration. The default is to
-.B enable
-hardware acceleration.
-.TP
-.BI "Option \*qDac6Bit\*q \*q" boolean \*q
-Enables or disables the use of 6 bits per color component when in 8 bpp
-mode (emulates VGA mode). By default, all 8 bits per color component
-are used. The default is
-.B off.
-.TP
-.BI "Option \*qVideoKey\*q \*q" integer \*q
-This overrides the default pixel value for the YUV video overlay key.
-The default value is
-.B undefined.
-.TP
-.BI "Option \*qDisplay\*q \*q" string \*q
-Select display mode for devices which support flat panels. Supported modes are:
-
-.B \*qFP\*q
-- use flat panel;
-
-.B \*qCRT\*q
-- use cathode ray tube;
-
-.B \*qMirror\*q
-- use both FP and CRT;
-
-.B \*qBIOS\*q
-- use mode as configured in the BIOS.
-
-The default is
-.B FP.
-
-.PP
-The following
-.B Options
-are mostly important for non-x86 architectures:
-.TP
-.BI "Option \*qProgramFPRegs\*q \*q" boolean \*q
-Enable or disable programming of the flat panel registers.
-Beware that this may damage your panel, so use this
-.B at your own risk.
-The default depends on the device.
-.TP
-.BI "Option \*qPanelWidth\*q \*q" integer \*q
-.TP
-.BI "Option \*qPanelHeight\*q \*q" integer \*q
-Override the flat panel dimensions in pixels. They are used to program the flat panel
-registers and normally determined using the video card BIOS. If the wrong dimensions
-are used, the system may hang.
-.TP
-.BI "Option \*qUseFBDev\*q \*q" boolean \*q
-Enable or disable use of an OS-specific framebuffer device interface
-(which is not supported on all OSs). See fbdevhw(__drivermansuffix__)
-for further information.
-Default:
-.BI on
-for PowerPC,
-.BI off
-for other architectures.
-.TP
-.BI "Option \*qDMAForXv\*q \*q" boolean \*q
-Try or don't try to use DMA for Xv image transfers. This will reduce CPU
-usage when playing big videos like DVDs, but may cause instabilities.
-Default: off.
-
-.PP
-The following additional
-.B Options
-are supported:
-.TP
-.BI "Option \*qShowCache\*q \*q" boolean \*q
-Enable or disable viewing offscreen cache memory. A
-development debug option. Default: off.
-.TP
-.BI "Option \*qVGAAccess\*q \*q" boolean \*q
-Tell the driver if it can do legacy VGA IOs to the card. This is
-necessary for properly resuming consoles when in VGA text mode, but
-shouldn't be if the console is using radeonfb or some other graphic
-mode driver. Some platforms like PowerPC have issues with those, and they aren't
-necessary unless you have a real text mode in console. The default is
-.B off
-on PowerPC and SPARC and
-.B on
-on other architectures.
-
-.PP
-.B Dualhead Note:
-The video BIOS on some laptops interacts strangely with dualhead.
-This can result in flickering and problems changing modes on crtc2.
-If you experience these problems try toggling your laptop's video
-output switch (e.g., fn-f7, etc.) prior to starting X or switch to
-another VT and back.
-
-.SH "SEE ALSO"
-__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), xorgconfig(__appmansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__)
-.SH AUTHORS
-.nf
-Rickard E. (Rik) Faith \fIfaith@precisioninsight.com\fP
-Kevin E. Martin \fIkevin@precisioninsight.com\fP
diff --git a/src/r128.h b/src/r128.h
deleted file mode 100644
index 1205245d..00000000
--- a/src/r128.h
+++ /dev/null
@@ -1,606 +0,0 @@
-/*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
- * Precision Insight, Inc., Cedar Park, Texas, and
- * VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
- * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/*
- * Authors:
- * Rickard E. Faith <faith@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- *
- */
-
-#ifndef _R128_H_
-#define _R128_H_
-
-#include <unistd.h>
-#include "xf86str.h"
-
- /* PCI support */
-#include "xf86Pci.h"
-
- /* XAA and Cursor Support */
-#include "xaa.h"
-#include "xf86Cursor.h"
-
- /* DDC support */
-#include "xf86DDC.h"
-
- /* Xv support */
-#include "xf86xv.h"
-
-#include "r128_probe.h"
-
- /* DRI support */
-#ifdef XF86DRI
-#define _XF86DRI_SERVER_
-#include "r128_dripriv.h"
-#include "dri.h"
-#include "GL/glxint.h"
-#endif
-
-#include "atipcirename.h"
-
-#define R128_DEBUG 0 /* Turn off debugging output */
-#define R128_IDLE_RETRY 32 /* Fall out of idle loops after this count */
-#define R128_TIMEOUT 2000000 /* Fall out of wait loops after this count */
-#define R128_MMIOSIZE 0x4000
-
-#define R128_VBIOS_SIZE 0x00010000
-
-#if R128_DEBUG
-#define R128TRACE(x) \
- do { \
- ErrorF("(**) %s(%d): ", R128_NAME, pScrn->scrnIndex); \
- ErrorF x; \
- } while (0);
-#else
-#define R128TRACE(x)
-#endif
-
-
-/* Other macros */
-#define R128_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
-#define R128_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1))
-#define R128PTR(pScrn) ((R128InfoPtr)(pScrn)->driverPrivate)
-
-typedef struct { /* All values in XCLKS */
- int ML; /* Memory Read Latency */
- int MB; /* Memory Burst Length */
- int Trcd; /* RAS to CAS delay */
- int Trp; /* RAS percentage */
- int Twr; /* Write Recovery */
- int CL; /* CAS Latency */
- int Tr2w; /* Read to Write Delay */
- int Rloop; /* Loop Latency */
- int Rloop_fudge; /* Add to ML to get Rloop */
- char *name;
-} R128RAMRec, *R128RAMPtr;
-
-typedef struct {
- /* Common registers */
- CARD32 ovr_clr;
- CARD32 ovr_wid_left_right;
- CARD32 ovr_wid_top_bottom;
- CARD32 ov0_scale_cntl;
- CARD32 mpp_tb_config;
- CARD32 mpp_gp_config;
- CARD32 subpic_cntl;
- CARD32 viph_control;
- CARD32 i2c_cntl_1;
- CARD32 gen_int_cntl;
- CARD32 cap0_trig_cntl;
- CARD32 cap1_trig_cntl;
- CARD32 bus_cntl;
- CARD32 config_cntl;
-
- /* Other registers to save for VT switches */
- CARD32 dp_datatype;
- CARD32 gen_reset_cntl;
- CARD32 clock_cntl_index;
- CARD32 amcgpio_en_reg;
- CARD32 amcgpio_mask;
-
- /* CRTC registers */
- CARD32 crtc_gen_cntl;
- CARD32 crtc_ext_cntl;
- CARD32 dac_cntl;
- CARD32 crtc_h_total_disp;
- CARD32 crtc_h_sync_strt_wid;
- CARD32 crtc_v_total_disp;
- CARD32 crtc_v_sync_strt_wid;
- CARD32 crtc_offset;
- CARD32 crtc_offset_cntl;
- CARD32 crtc_pitch;
-
- /* CRTC2 registers */
- CARD32 crtc2_gen_cntl;
- CARD32 crtc2_h_total_disp;
- CARD32 crtc2_h_sync_strt_wid;
- CARD32 crtc2_v_total_disp;
- CARD32 crtc2_v_sync_strt_wid;
- CARD32 crtc2_offset;
- CARD32 crtc2_offset_cntl;
- CARD32 crtc2_pitch;
-
- /* Flat panel registers */
- CARD32 fp_crtc_h_total_disp;
- CARD32 fp_crtc_v_total_disp;
- CARD32 fp_gen_cntl;
- CARD32 fp_h_sync_strt_wid;
- CARD32 fp_horz_stretch;
- CARD32 fp_panel_cntl;
- CARD32 fp_v_sync_strt_wid;
- CARD32 fp_vert_stretch;
- CARD32 lvds_gen_cntl;
- CARD32 tmds_crc;
- CARD32 tmds_transmitter_cntl;
-
- /* Computed values for PLL */
- CARD32 dot_clock_freq;
- CARD32 pll_output_freq;
- int feedback_div;
- int post_div;
-
- /* PLL registers */
- CARD32 ppll_ref_div;
- CARD32 ppll_div_3;
- CARD32 htotal_cntl;
-
- /* Computed values for PLL2 */
- CARD32 dot_clock_freq_2;
- CARD32 pll_output_freq_2;
- int feedback_div_2;
- int post_div_2;
-
- /* PLL2 registers */
- CARD32 p2pll_ref_div;
- CARD32 p2pll_div_0;
- CARD32 htotal_cntl2;
-
- /* DDA register */
- CARD32 dda_config;
- CARD32 dda_on_off;
-
- /* DDA2 register */
- CARD32 dda2_config;
- CARD32 dda2_on_off;
-
- /* Pallet */
- Bool palette_valid;
- CARD32 palette[256];
- CARD32 palette2[256];
-} R128SaveRec, *R128SavePtr;
-
-typedef struct {
- CARD16 reference_freq;
- CARD16 reference_div;
- unsigned min_pll_freq;
- unsigned max_pll_freq;
- CARD16 xclk;
-} R128PLLRec, *R128PLLPtr;
-
-typedef struct {
- int bitsPerPixel;
- int depth;
- int displayWidth;
- int pixel_code;
- int pixel_bytes;
- DisplayModePtr mode;
-} R128FBLayout;
-
-typedef enum
-{
- MT_NONE,
- MT_CRT,
- MT_LCD,
- MT_DFP,
- MT_CTV,
- MT_STV
-} R128MonitorType;
-
-typedef struct {
- EntityInfoPtr pEnt;
- pciVideoPtr PciInfo;
- PCITAG PciTag;
- int Chipset;
- Bool Primary;
-
- Bool FBDev;
-
- unsigned long LinearAddr; /* Frame buffer physical address */
- unsigned long MMIOAddr; /* MMIO region physical address */
- unsigned long BIOSAddr; /* BIOS physical address */
-
- void *MMIO; /* Map of MMIO region */
- void *FB; /* Map of frame buffer */
-
- CARD32 MemCntl;
- CARD32 BusCntl;
- unsigned long FbMapSize; /* Size of frame buffer, in bytes */
- int Flags; /* Saved copy of mode flags */
-
- CARD8 BIOSDisplay; /* Device the BIOS is set to display to */
-
- Bool HasPanelRegs; /* Current chip can connect to a FP */
- CARD8 *VBIOS; /* Video BIOS for mode validation on FPs */
- int FPBIOSstart; /* Start of the flat panel info */
-
- /* Computed values for FPs */
- int PanelXRes;
- int PanelYRes;
- int HOverPlus;
- int HSyncWidth;
- int HBlank;
- int VOverPlus;
- int VSyncWidth;
- int VBlank;
- int PanelPwrDly;
-
- R128PLLRec pll;
- R128RAMPtr ram;
-
- R128SaveRec SavedReg; /* Original (text) mode */
- R128SaveRec ModeReg; /* Current mode */
- Bool (*CloseScreen)(int, ScreenPtr);
- void (*BlockHandler)(int, pointer, pointer, pointer);
-
- Bool PaletteSavedOnVT; /* Palette saved on last VT switch */
-
- XAAInfoRecPtr accel;
- Bool accelOn;
- xf86CursorInfoPtr cursor;
- unsigned long cursor_start;
- unsigned long cursor_end;
-
- /*
- * XAAForceTransBlit is used to change the behavior of the XAA
- * SetupForScreenToScreenCopy function, to make it DGA-friendly.
- */
- Bool XAAForceTransBlit;
-
- int fifo_slots; /* Free slots in the FIFO (64 max) */
- int pix24bpp; /* Depth of pixmap for 24bpp framebuffer */
- Bool dac6bits; /* Use 6 bit DAC? */
-
- /* Computed values for Rage 128 */
- int pitch;
- int datatype;
- CARD32 dp_gui_master_cntl;
-
- /* Saved values for ScreenToScreenCopy */
- int xdir;
- int ydir;
-
- /* ScanlineScreenToScreenColorExpand support */
- unsigned char *scratch_buffer[1];
- unsigned char *scratch_save;
- int scanline_x;
- int scanline_y;
- int scanline_w;
- int scanline_h;
-#ifdef XF86DRI
- int scanline_hpass;
- int scanline_x1clip;
- int scanline_x2clip;
- int scanline_rop;
- int scanline_fg;
- int scanline_bg;
-#endif /* XF86DRI */
- int scanline_words;
- int scanline_direct;
- int scanline_bpp; /* Only used for ImageWrite */
-
- DGAModePtr DGAModes;
- int numDGAModes;
- Bool DGAactive;
- int DGAViewportStatus;
- DGAFunctionRec DGAFuncs;
-
- R128FBLayout CurrentLayout;
-#ifdef XF86DRI
- Bool directRenderingEnabled;
- DRIInfoPtr pDRIInfo;
- int drmFD;
- drm_context_t drmCtx;
- int numVisualConfigs;
- __GLXvisualConfig *pVisualConfigs;
- R128ConfigPrivPtr pVisualConfigsPriv;
-
- drm_handle_t fbHandle;
-
- drmSize registerSize;
- drm_handle_t registerHandle;
-
- Bool IsPCI; /* Current card is a PCI card */
- drmSize pciSize;
- drm_handle_t pciMemHandle;
- drmAddress PCI; /* Map */
-
- Bool allowPageFlip; /* Enable 3d page flipping */
- Bool have3DWindows; /* Are there any 3d clients? */
- int drmMinor;
-
- drmSize agpSize;
- drm_handle_t agpMemHandle; /* Handle from drmAgpAlloc */
- unsigned long agpOffset;
- drmAddress AGP; /* Map */
- int agpMode;
-
- Bool CCEInUse; /* CCE is currently active */
- int CCEMode; /* CCE mode that server/clients use */
- int CCEFifoSize; /* Size of the CCE command FIFO */
- Bool CCESecure; /* CCE security enabled */
- int CCEusecTimeout; /* CCE timeout in usecs */
-
- /* CCE ring buffer data */
- unsigned long ringStart; /* Offset into AGP space */
- drm_handle_t ringHandle; /* Handle from drmAddMap */
- drmSize ringMapSize; /* Size of map */
- int ringSize; /* Size of ring (in MB) */
- drmAddress ring; /* Map */
- int ringSizeLog2QW;
-
- unsigned long ringReadOffset; /* Offset into AGP space */
- drm_handle_t ringReadPtrHandle; /* Handle from drmAddMap */
- drmSize ringReadMapSize; /* Size of map */
- drmAddress ringReadPtr; /* Map */
-
- /* CCE vertex/indirect buffer data */
- unsigned long bufStart; /* Offset into AGP space */
- drm_handle_t bufHandle; /* Handle from drmAddMap */
- drmSize bufMapSize; /* Size of map */
- int bufSize; /* Size of buffers (in MB) */
- drmAddress buf; /* Map */
- int bufNumBufs; /* Number of buffers */
- drmBufMapPtr buffers; /* Buffer map */
-
- /* CCE AGP Texture data */
- unsigned long agpTexStart; /* Offset into AGP space */
- drm_handle_t agpTexHandle; /* Handle from drmAddMap */
- drmSize agpTexMapSize; /* Size of map */
- int agpTexSize; /* Size of AGP tex space (in MB) */
- drmAddress agpTex; /* Map */
- int log2AGPTexGran;
-
- /* CCE 2D accleration */
- drmBufPtr indirectBuffer;
- int indirectStart;
-
- /* DRI screen private data */
- int fbX;
- int fbY;
- int backX;
- int backY;
- int depthX;
- int depthY;
-
- int frontOffset;
- int frontPitch;
- int backOffset;
- int backPitch;
- int depthOffset;
- int depthPitch;
- int spanOffset;
- int textureOffset;
- int textureSize;
- int log2TexGran;
-
- /* Saved scissor values */
- CARD32 sc_left;
- CARD32 sc_right;
- CARD32 sc_top;
- CARD32 sc_bottom;
-
- CARD32 re_top_left;
- CARD32 re_width_height;
-
- CARD32 aux_sc_cntl;
-
- int irq;
- CARD32 gen_int_cntl;
-
- Bool DMAForXv;
-#endif
-
- XF86VideoAdaptorPtr adaptor;
- void (*VideoTimerCallback)(ScrnInfoPtr, Time);
- int videoKey;
- Bool showCache;
- OptionInfoPtr Options;
-
- Bool isDFP;
- Bool isPro2;
- I2CBusPtr pI2CBus;
- CARD32 DDCReg;
-
- Bool VGAAccess;
-
- /****** Added for dualhead support *******************/
- BOOL HasCRTC2; /* M3/M4 */
- BOOL IsSecondary; /* second Screen */
- BOOL IsPrimary; /* primary Screen */
- BOOL UseCRT; /* force use CRT port as primary */
- BOOL SwitchingMode;
- R128MonitorType DisplayType; /* Monitor connected on*/
-
-} R128InfoRec, *R128InfoPtr;
-
-#define R128WaitForFifo(pScrn, entries) \
-do { \
- if (info->fifo_slots < entries) R128WaitForFifoFunction(pScrn, entries); \
- info->fifo_slots -= entries; \
-} while (0)
-
-extern R128EntPtr R128EntPriv(ScrnInfoPtr pScrn);
-extern void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries);
-extern void R128WaitForIdle(ScrnInfoPtr pScrn);
-extern void R128EngineReset(ScrnInfoPtr pScrn);
-extern void R128EngineFlush(ScrnInfoPtr pScrn);
-
-extern unsigned R128INPLL(ScrnInfoPtr pScrn, int addr);
-extern void R128WaitForVerticalSync(ScrnInfoPtr pScrn);
-
-extern Bool R128AccelInit(ScreenPtr pScreen);
-extern void R128EngineInit(ScrnInfoPtr pScrn);
-extern Bool R128CursorInit(ScreenPtr pScreen);
-extern Bool R128DGAInit(ScreenPtr pScreen);
-
-extern int R128MinBits(int val);
-
-extern void R128InitVideo(ScreenPtr pScreen);
-
-#ifdef XF86DRI
-extern Bool R128DRIScreenInit(ScreenPtr pScreen);
-extern void R128DRICloseScreen(ScreenPtr pScreen);
-extern Bool R128DRIFinishScreenInit(ScreenPtr pScreen);
-
-#define R128CCE_START(pScrn, info) \
-do { \
- int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_START); \
- if (_ret) { \
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
- "%s: CCE start %d\n", __FUNCTION__, _ret); \
- } \
-} while (0)
-
-#define R128CCE_STOP(pScrn, info) \
-do { \
- int _ret = R128CCEStop(pScrn); \
- if (_ret) { \
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
- "%s: CCE stop %d\n", __FUNCTION__, _ret); \
- } \
-} while (0)
-
-#define R128CCE_RESET(pScrn, info) \
-do { \
- if (info->directRenderingEnabled \
- && R128CCE_USE_RING_BUFFER(info->CCEMode)) { \
- int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_RESET); \
- if (_ret) { \
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
- "%s: CCE reset %d\n", __FUNCTION__, _ret); \
- } \
- } \
-} while (0)
-
-extern drmBufPtr R128CCEGetBuffer(ScrnInfoPtr pScrn);
-#endif
-
-extern void R128CCEFlushIndirect(ScrnInfoPtr pScrn, int discard);
-extern void R128CCEReleaseIndirect(ScrnInfoPtr pScrn);
-extern void R128CCEWaitForIdle(ScrnInfoPtr pScrn);
-extern int R128CCEStop(ScrnInfoPtr pScrn);
-
-
-#define CCE_PACKET0( reg, n ) \
- (R128_CCE_PACKET0 | ((n) << 16) | ((reg) >> 2))
-#define CCE_PACKET1( reg0, reg1 ) \
- (R128_CCE_PACKET1 | (((reg1) >> 2) << 11) | ((reg0) >> 2))
-#define CCE_PACKET2() \
- (R128_CCE_PACKET2)
-#define CCE_PACKET3( pkt, n ) \
- (R128_CCE_PACKET3 | (pkt) | ((n) << 16))
-
-
-#define R128_VERBOSE 0
-
-#define RING_LOCALS CARD32 *__head; int __count;
-
-#define R128CCE_REFRESH(pScrn, info) \
-do { \
- if ( R128_VERBOSE ) { \
- xf86DrvMsg( pScrn->scrnIndex, X_INFO, "REFRESH( %d ) in %s\n", \
- !info->CCEInUse , __FUNCTION__ ); \
- } \
- if ( !info->CCEInUse ) { \
- R128CCEWaitForIdle(pScrn); \
- BEGIN_RING( 6 ); \
- OUT_RING_REG( R128_RE_TOP_LEFT, info->re_top_left ); \
- OUT_RING_REG( R128_RE_WIDTH_HEIGHT, info->re_width_height ); \
- OUT_RING_REG( R128_AUX_SC_CNTL, info->aux_sc_cntl ); \
- ADVANCE_RING(); \
- info->CCEInUse = TRUE; \
- } \
-} while (0)
-
-#define BEGIN_RING( n ) do { \
- if ( R128_VERBOSE ) { \
- xf86DrvMsg( pScrn->scrnIndex, X_INFO, \
- "BEGIN_RING( %d ) in %s\n", n, __FUNCTION__ ); \
- } \
- if ( !info->indirectBuffer ) { \
- info->indirectBuffer = R128CCEGetBuffer( pScrn ); \
- info->indirectStart = 0; \
- } else if ( (info->indirectBuffer->used + 4*(n)) > \
- info->indirectBuffer->total ) { \
- R128CCEFlushIndirect( pScrn, 1 ); \
- } \
- __head = (pointer)((char *)info->indirectBuffer->address + \
- info->indirectBuffer->used); \
- __count = 0; \
-} while (0)
-
-#define ADVANCE_RING() do { \
- if ( R128_VERBOSE ) { \
- xf86DrvMsg( pScrn->scrnIndex, X_INFO, \
- "ADVANCE_RING() used: %d+%d=%d/%d\n", \
- info->indirectBuffer->used - info->indirectStart, \
- __count * (int)sizeof(CARD32), \
- info->indirectBuffer->used - info->indirectStart + \
- __count * (int)sizeof(CARD32), \
- info->indirectBuffer->total - info->indirectStart ); \
- } \
- info->indirectBuffer->used += __count * (int)sizeof(CARD32); \
-} while (0)
-
-#define OUT_RING( x ) do { \
- if ( R128_VERBOSE ) { \
- xf86DrvMsg( pScrn->scrnIndex, X_INFO, \
- " OUT_RING( 0x%08x )\n", (unsigned int)(x) ); \
- } \
- MMIO_OUT32(&__head[__count++], 0, (x)); \
-} while (0)
-
-#define OUT_RING_REG( reg, val ) \
-do { \
- OUT_RING( CCE_PACKET0( reg, 0 ) ); \
- OUT_RING( val ); \
-} while (0)
-
-#define FLUSH_RING() \
-do { \
- if ( R128_VERBOSE ) \
- xf86DrvMsg( pScrn->scrnIndex, X_INFO, \
- "FLUSH_RING in %s\n", __FUNCTION__ ); \
- if ( info->indirectBuffer ) { \
- R128CCEFlushIndirect( pScrn, 0 ); \
- } \
-} while (0)
-
-#endif
diff --git a/src/r128_accel.c b/src/r128_accel.c
deleted file mode 100644
index 88706824..00000000
--- a/src/r128_accel.c
+++ /dev/null
@@ -1,1880 +0,0 @@
-/*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
- * Precision Insight, Inc., Cedar Park, Texas, and
- * VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
- * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-/*
- * Authors:
- * Rickard E. Faith <faith@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- * Alan Hourihane <alanh@fairlite.demon.co.uk>
- *
- * Credits:
- *
- * Thanks to Alan Hourihane <alanh@fairlite.demon..co.uk> and SuSE for
- * providing source code to their 3.3.x Rage 128 driver. Portions of
- * this file are based on the acceleration code for that driver.
- *
- * References:
- *
- * RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical
- * Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April
- * 1999.
- *
- * RAGE 128 Software Development Manual (Technical Reference Manual P/N
- * SDK-G04000 Rev. 0.01), ATI Technologies: June 1999.
- *
- * Notes on unimplemented XAA optimizations:
- *
- * SetClipping: The Rage128 doesn't support the full 16bit registers needed
- * for XAA clip rect support.
- * SolidFillTrap: This will probably work if we can compute the correct
- * Bresenham error values.
- * TwoPointLine: The Rage 128 supports Bresenham lines instead.
- * DashedLine with non-power-of-two pattern length: Apparently, there is
- * no way to set the length of the pattern -- it is always
- * assumed to be 8 or 32 (or 1024?).
- * ScreenToScreenColorExpandFill: See p. 4-17 of the Technical Reference
- * Manual where it states that monochrome expansion of frame
- * buffer data is not supported.
- * CPUToScreenColorExpandFill, direct: The implementation here uses a hybrid
- * direct/indirect method. If we had more data registers,
- * then we could do better. If XAA supported a trigger write
- * address, the code would be simpler.
- * (Alan Hourihane) Update. We now use purely indirect and clip the full
- * rectangle. Seems as the direct method has some problems
- * with this, although this indirect method is much faster
- * than the old method of setting up the engine per scanline.
- * This code was the basis of the Radeon work we did.
- * Color8x8PatternFill: Apparently, an 8x8 color brush cannot take an 8x8
- * pattern from frame buffer memory.
- * ImageWrites: See CPUToScreenColorExpandFill.
- *
- */
-
-#define R128_TRAPEZOIDS 0 /* Trapezoids don't work */
-
- /* Driver data structures */
-#include <errno.h>
-
-#include "r128.h"
-#include "r128_reg.h"
-#include "r128_probe.h"
-#ifdef XF86DRI
-#include "r128_sarea.h"
-#define _XF86DRI_SERVER_
-#include "r128_dri.h"
-#include "r128_common.h"
-#endif
-
- /* Line support */
-#include "miline.h"
-
- /* X and server generic header files */
-#include "xf86.h"
-
-static struct {
- int rop;
- int pattern;
-} R128_ROP[] = {
- { R128_ROP3_ZERO, R128_ROP3_ZERO }, /* GXclear */
- { R128_ROP3_DSa, R128_ROP3_DPa }, /* Gxand */
- { R128_ROP3_SDna, R128_ROP3_PDna }, /* GXandReverse */
- { R128_ROP3_S, R128_ROP3_P }, /* GXcopy */
- { R128_ROP3_DSna, R128_ROP3_DPna }, /* GXandInverted */
- { R128_ROP3_D, R128_ROP3_D }, /* GXnoop */
- { R128_ROP3_DSx, R128_ROP3_DPx }, /* GXxor */
- { R128_ROP3_DSo, R128_ROP3_DPo }, /* GXor */
- { R128_ROP3_DSon, R128_ROP3_DPon }, /* GXnor */
- { R128_ROP3_DSxn, R128_ROP3_PDxn }, /* GXequiv */
- { R128_ROP3_Dn, R128_ROP3_Dn }, /* GXinvert */
- { R128_ROP3_SDno, R128_ROP3_PDno }, /* GXorReverse */
- { R128_ROP3_Sn, R128_ROP3_Pn }, /* GXcopyInverted */
- { R128_ROP3_DSno, R128_ROP3_DPno }, /* GXorInverted */
- { R128_ROP3_DSan, R128_ROP3_DPan }, /* GXnand */
- { R128_ROP3_ONE, R128_ROP3_ONE } /* GXset */
-};
-
-extern int getR128EntityIndex(void);
-
-/* Flush all dirty data in the Pixel Cache to memory. */
-void R128EngineFlush(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int i;
-
- OUTREGP(R128_PC_NGUI_CTLSTAT, R128_PC_FLUSH_ALL, ~R128_PC_FLUSH_ALL);
- for (i = 0; i < R128_TIMEOUT; i++) {
- if (!(INREG(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY)) break;
- }
-}
-
-/* Reset graphics card to known state. */
-void R128EngineReset(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- CARD32 clock_cntl_index;
- CARD32 mclk_cntl;
- CARD32 gen_reset_cntl;
-
- R128EngineFlush(pScrn);
-
- clock_cntl_index = INREG(R128_CLOCK_CNTL_INDEX);
- mclk_cntl = INPLL(pScrn, R128_MCLK_CNTL);
-
- OUTPLL(R128_MCLK_CNTL, mclk_cntl | R128_FORCE_GCP | R128_FORCE_PIPE3D_CP);
-
- gen_reset_cntl = INREG(R128_GEN_RESET_CNTL);
-
- OUTREG(R128_GEN_RESET_CNTL, gen_reset_cntl | R128_SOFT_RESET_GUI);
- INREG(R128_GEN_RESET_CNTL);
- OUTREG(R128_GEN_RESET_CNTL,
- gen_reset_cntl & (CARD32)(~R128_SOFT_RESET_GUI));
- INREG(R128_GEN_RESET_CNTL);
-
- OUTPLL(R128_MCLK_CNTL, mclk_cntl);
- OUTREG(R128_CLOCK_CNTL_INDEX, clock_cntl_index);
- OUTREG(R128_GEN_RESET_CNTL, gen_reset_cntl);
-}
-
-/* The FIFO has 64 slots. This routines waits until at least `entries' of
- these slots are empty. */
-void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int i;
-
- for (;;) {
- for (i = 0; i < R128_TIMEOUT; i++) {
- info->fifo_slots = INREG(R128_GUI_STAT) & R128_GUI_FIFOCNT_MASK;
- if (info->fifo_slots >= entries) return;
- }
- R128TRACE(("FIFO timed out: %d entries, stat=0x%08x, probe=0x%08x\n",
- INREG(R128_GUI_STAT) & R128_GUI_FIFOCNT_MASK,
- INREG(R128_GUI_STAT),
- INREG(R128_GUI_PROBE)));
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "FIFO timed out, resetting engine...\n");
- R128EngineReset(pScrn);
-#ifdef XF86DRI
- R128CCE_RESET(pScrn, info);
- if (info->directRenderingEnabled) {
- R128CCE_START(pScrn, info);
- }
-#endif
- }
-}
-
-/* Wait for the graphics engine to be completely idle: the FIFO has
- drained, the Pixel Cache is flushed, and the engine is idle. This is a
- standard "sync" function that will make the hardware "quiescent". */
-void R128WaitForIdle(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int i;
-
- R128WaitForFifoFunction(pScrn, 64);
-
- for (;;) {
- for (i = 0; i < R128_TIMEOUT; i++) {
- if (!(INREG(R128_GUI_STAT) & R128_GUI_ACTIVE)) {
- R128EngineFlush(pScrn);
- return;
- }
- }
- R128TRACE(("Idle timed out: %d entries, stat=0x%08x, probe=0x%08x\n",
- INREG(R128_GUI_STAT) & R128_GUI_FIFOCNT_MASK,
- INREG(R128_GUI_STAT),
- INREG(R128_GUI_PROBE)));
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Idle timed out, resetting engine...\n");
-#ifdef XF86DRI
- R128CCE_STOP(pScrn, info);
-#endif
- R128EngineReset(pScrn);
-#ifdef XF86DRI
- R128CCE_RESET(pScrn, info);
- if (info->directRenderingEnabled) {
- R128CCE_START(pScrn, info);
- }
-#endif
- }
-}
-
-#ifdef XF86DRI
-/* Wait until the CCE is completely idle: the FIFO has drained and the
- * CCE is idle.
- */
-void R128CCEWaitForIdle(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- int ret, i;
-
- FLUSH_RING();
-
- for (;;) {
- i = 0;
- do {
- ret = drmCommandNone(info->drmFD, DRM_R128_CCE_IDLE);
- } while ( ret && errno == EBUSY && i++ < (R128_IDLE_RETRY * R128_IDLE_RETRY) );
-
- if (ret && ret != -EBUSY) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "%s: CCE idle %d\n", __FUNCTION__, ret);
- }
-
- if (i > R128_IDLE_RETRY) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "%s: (DEBUG) CCE idle took i = %d\n", __FUNCTION__, i);
- }
-
- if (ret == 0) return;
-
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Idle timed out, resetting engine...\n");
- R128CCE_STOP(pScrn, info);
- R128EngineReset(pScrn);
-
- /* Always restart the engine when doing CCE 2D acceleration */
- R128CCE_RESET(pScrn, info);
- R128CCE_START(pScrn, info);
- }
-}
-
-int R128CCEStop(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- drmR128CCEStop stop;
- int ret, i;
-
- stop.flush = 1;
- stop.idle = 1;
-
- ret = drmCommandWrite( info->drmFD, DRM_R128_CCE_STOP,
- &stop, sizeof(drmR128CCEStop) );
-
- if ( ret == 0 ) {
- return 0;
- } else if ( errno != EBUSY ) {
- return -errno;
- }
-
- stop.flush = 0;
-
- i = 0;
- do {
- ret = drmCommandWrite( info->drmFD, DRM_R128_CCE_STOP,
- &stop, sizeof(drmR128CCEStop) );
- } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
-
- if ( ret == 0 ) {
- return 0;
- } else if ( errno != EBUSY ) {
- return -errno;
- }
-
- stop.idle = 0;
-
- if ( drmCommandWrite( info->drmFD, DRM_R128_CCE_STOP,
- &stop, sizeof(drmR128CCEStop) )) {
- return -errno;
- } else {
- return 0;
- }
-}
-
-#endif
-
-/* Setup for XAA SolidFill. */
-static void R128SetupForSolidFill(ScrnInfoPtr pScrn,
- int color, int rop, unsigned int planemask)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- R128WaitForFifo(pScrn, 4);
- OUTREG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | R128_GMC_BRUSH_SOLID_COLOR
- | R128_GMC_SRC_DATATYPE_COLOR
- | R128_ROP[rop].pattern));
- OUTREG(R128_DP_BRUSH_FRGD_CLR, color);
- OUTREG(R128_DP_WRITE_MASK, planemask);
- OUTREG(R128_DP_CNTL, (R128_DST_X_LEFT_TO_RIGHT
- | R128_DST_Y_TOP_TO_BOTTOM));
-}
-
-/* Subsequent XAA SolidFillRect.
-
- Tests: xtest CH06/fllrctngl, xterm
-*/
-static void R128SubsequentSolidFillRect(ScrnInfoPtr pScrn,
- int x, int y, int w, int h)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- R128WaitForFifo(pScrn, 2);
- OUTREG(R128_DST_Y_X, (y << 16) | x);
- OUTREG(R128_DST_WIDTH_HEIGHT, (w << 16) | h);
-}
-
-/* Setup for XAA solid lines. */
-static void R128SetupForSolidLine(ScrnInfoPtr pScrn,
- int color, int rop, unsigned int planemask)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- R128WaitForFifo(pScrn, 3);
- OUTREG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | R128_GMC_BRUSH_SOLID_COLOR
- | R128_GMC_SRC_DATATYPE_COLOR
- | R128_ROP[rop].pattern));
- OUTREG(R128_DP_BRUSH_FRGD_CLR, color);
- OUTREG(R128_DP_WRITE_MASK, planemask);
-}
-
-
-/* Subsequent XAA solid Bresenham line.
-
- Tests: xtest CH06/drwln, ico, Mark Vojkovich's linetest program
-
- [See http://www.xfree86.org/devel/archives/devel/1999-Jun/0102.shtml for
- Mark Vojkovich's linetest program, posted 2Jun99 to devel@xfree86.org.]
-
- x11perf -line500
- 1024x768@76Hz 1024x768@76Hz
- 8bpp 32bpp
- not used: 39700.0/sec 34100.0/sec
- used: 47600.0/sec 36800.0/sec
-*/
-static void R128SubsequentSolidBresenhamLine(ScrnInfoPtr pScrn,
- int x, int y,
- int major, int minor,
- int err, int len, int octant)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int flags = 0;
-
- if (octant & YMAJOR) flags |= R128_DST_Y_MAJOR;
- if (!(octant & XDECREASING)) flags |= R128_DST_X_DIR_LEFT_TO_RIGHT;
- if (!(octant & YDECREASING)) flags |= R128_DST_Y_DIR_TOP_TO_BOTTOM;
-
- R128WaitForFifo(pScrn, 6);
- OUTREG(R128_DP_CNTL_XDIR_YDIR_YMAJOR, flags);
- OUTREG(R128_DST_Y_X, (y << 16) | x);
- OUTREG(R128_DST_BRES_ERR, err);
- OUTREG(R128_DST_BRES_INC, minor);
- OUTREG(R128_DST_BRES_DEC, -major);
- OUTREG(R128_DST_BRES_LNTH, len);
-}
-
-/* Subsequent XAA solid horizontal and vertical lines
-
- 1024x768@76Hz 8bpp
- Without With
- x11perf -hseg500 87600.0/sec 798000.0/sec
- x11perf -vseg500 38100.0/sec 38000.0/sec
-*/
-static void R128SubsequentSolidHorVertLine(ScrnInfoPtr pScrn,
- int x, int y, int len, int dir )
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- R128WaitForFifo(pScrn, 1);
- OUTREG(R128_DP_CNTL, (R128_DST_X_LEFT_TO_RIGHT
- | R128_DST_Y_TOP_TO_BOTTOM));
-
- if (dir == DEGREES_0) {
- R128SubsequentSolidFillRect(pScrn, x, y, len, 1);
- } else {
- R128SubsequentSolidFillRect(pScrn, x, y, 1, len);
- }
-}
-
-/* Setup for XAA dashed lines.
-
- Tests: xtest CH05/stdshs, XFree86/drwln
-
- NOTE: Since we can only accelerate lines with power-of-2 patterns of
- length <= 32, these x11perf numbers are not representative of the
- speed-up on appropriately-sized patterns.
-
- 1024x768@76Hz 8bpp
- Without With
- x11perf -dseg100 218000.0/sec 222000.0/sec
- x11perf -dline100 215000.0/sec 221000.0/sec
- x11perf -ddline100 178000.0/sec 180000.0/sec
-*/
-static void R128SetupForDashedLine(ScrnInfoPtr pScrn,
- int fg, int bg,
- int rop, unsigned int planemask,
- int length, unsigned char *pattern)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- CARD32 pat = *(CARD32 *)(pointer)pattern;
-
-#if X_BYTE_ORDER == X_LITTLE_ENDIAN
-# define PAT_SHIFT(pat,n) pat << n
-#else
-# define PAT_SHIFT(pat,n) pat >> n
-#endif
-
- switch (length) {
- case 2: pat |= PAT_SHIFT(pat,2); /* fall through */
- case 4: pat |= PAT_SHIFT(pat,4); /* fall through */
- case 8: pat |= PAT_SHIFT(pat,8); /* fall through */
- case 16: pat |= PAT_SHIFT(pat,16);
- }
-
- R128WaitForFifo(pScrn, 5);
- OUTREG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | (bg == -1
- ? R128_GMC_BRUSH_32x1_MONO_FG_LA
- : R128_GMC_BRUSH_32x1_MONO_FG_BG)
- | R128_ROP[rop].pattern
- | R128_GMC_BYTE_LSB_TO_MSB));
- OUTREG(R128_DP_WRITE_MASK, planemask);
- OUTREG(R128_DP_BRUSH_FRGD_CLR, fg);
- OUTREG(R128_DP_BRUSH_BKGD_CLR, bg);
- OUTREG(R128_BRUSH_DATA0, pat);
-}
-
-/* Subsequent XAA dashed line. */
-static void R128SubsequentDashedBresenhamLine(ScrnInfoPtr pScrn,
- int x, int y,
- int major, int minor,
- int err, int len, int octant,
- int phase)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int flags = 0;
-
- if (octant & YMAJOR) flags |= R128_DST_Y_MAJOR;
- if (!(octant & XDECREASING)) flags |= R128_DST_X_DIR_LEFT_TO_RIGHT;
- if (!(octant & YDECREASING)) flags |= R128_DST_Y_DIR_TOP_TO_BOTTOM;
-
- R128WaitForFifo(pScrn, 7);
- OUTREG(R128_DP_CNTL_XDIR_YDIR_YMAJOR, flags);
- OUTREG(R128_DST_Y_X, (y << 16) | x);
- OUTREG(R128_BRUSH_Y_X, (phase << 16) | phase);
- OUTREG(R128_DST_BRES_ERR, err);
- OUTREG(R128_DST_BRES_INC, minor);
- OUTREG(R128_DST_BRES_DEC, -major);
- OUTREG(R128_DST_BRES_LNTH, len);
-}
-
-#if R128_TRAPEZOIDS
- /* This doesn't work. Except in the
- lower-left quadrant, all of the pixel
- errors appear to be because eL and eR
- are not correct. Drawing from right to
- left doesn't help. Be aware that the
- non-_SUB registers set the sub-pixel
- values to 0.5 (0x08), which isn't what
- XAA wants. */
-/* Subsequent XAA SolidFillTrap. XAA always passes data that assumes we
- fill from top to bottom, so dyL and dyR are always non-negative. */
-static void R128SubsequentSolidFillTrap(ScrnInfoPtr pScrn, int y, int h,
- int left, int dxL, int dyL, int eL,
- int right, int dxR, int dyR, int eR)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int flags = 0;
- int Lymajor = 0;
- int Rymajor = 0;
- int origdxL = dxL;
- int origdxR = dxR;
-
- R128TRACE(("Trap %d %d; L %d %d %d %d; R %d %d %d %d\n",
- y, h,
- left, dxL, dyL, eL,
- right, dxR, dyR, eR));
-
- if (dxL < 0) dxL = -dxL; else flags |= (1 << 0) /* | (1 << 8) */;
- if (dxR < 0) dxR = -dxR; else flags |= (1 << 6);
-
- R128WaitForFifo(pScrn, 11);
-
-#if 1
- OUTREG(R128_DP_CNTL, flags | (1 << 1) | (1 << 7));
- OUTREG(R128_DST_Y_SUB, ((y) << 4) | 0x0 );
- OUTREG(R128_DST_X_SUB, ((left) << 4)|0x0);
- OUTREG(R128_TRAIL_BRES_ERR, eR-dxR);
- OUTREG(R128_TRAIL_BRES_INC, dxR);
- OUTREG(R128_TRAIL_BRES_DEC, -dyR);
- OUTREG(R128_TRAIL_X_SUB, ((right) << 4) | 0x0);
- OUTREG(R128_LEAD_BRES_ERR, eL-dxL);
- OUTREG(R128_LEAD_BRES_INC, dxL);
- OUTREG(R128_LEAD_BRES_DEC, -dyL);
- OUTREG(R128_LEAD_BRES_LNTH_SUB, ((h) << 4) | 0x00);
-#else
- OUTREG(R128_DP_CNTL, flags | (1 << 1) );
- OUTREG(R128_DST_Y_SUB, (y << 4));
- OUTREG(R128_DST_X_SUB, (right << 4));
- OUTREG(R128_TRAIL_BRES_ERR, eL);
- OUTREG(R128_TRAIL_BRES_INC, dxL);
- OUTREG(R128_TRAIL_BRES_DEC, -dyL);
- OUTREG(R128_TRAIL_X_SUB, (left << 4) | 0);
- OUTREG(R128_LEAD_BRES_ERR, eR);
- OUTREG(R128_LEAD_BRES_INC, dxR);
- OUTREG(R128_LEAD_BRES_DEC, -dyR);
- OUTREG(R128_LEAD_BRES_LNTH_SUB, h << 4);
-#endif
-}
-#endif
-
-/* Setup for XAA screen-to-screen copy.
-
- Tests: xtest CH06/fllrctngl (also tests transparency).
-*/
-static void R128SetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
- int xdir, int ydir, int rop,
- unsigned int planemask,
- int trans_color)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- info->xdir = xdir;
- info->ydir = ydir;
- R128WaitForFifo(pScrn, 3);
- OUTREG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | R128_GMC_BRUSH_SOLID_COLOR
- | R128_GMC_SRC_DATATYPE_COLOR
- | R128_ROP[rop].rop
- | R128_DP_SRC_SOURCE_MEMORY));
- OUTREG(R128_DP_WRITE_MASK, planemask);
- OUTREG(R128_DP_CNTL, ((xdir >= 0 ? R128_DST_X_LEFT_TO_RIGHT : 0)
- | (ydir >= 0
- ? R128_DST_Y_TOP_TO_BOTTOM
- : 0)));
-
- if ((trans_color != -1) || (info->XAAForceTransBlit == TRUE)) {
- /* Set up for transparency */
- R128WaitForFifo(pScrn, 3);
- OUTREG(R128_CLR_CMP_CLR_SRC, trans_color);
- OUTREG(R128_CLR_CMP_MASK, R128_CLR_CMP_MSK);
- OUTREG(R128_CLR_CMP_CNTL, (R128_SRC_CMP_NEQ_COLOR
- | R128_CLR_CMP_SRC_SOURCE));
- }
-}
-
-/* Subsequent XAA screen-to-screen copy. */
-static void R128SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn,
- int xa, int ya,
- int xb, int yb,
- int w, int h)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- if (info->xdir < 0) xa += w - 1, xb += w - 1;
- if (info->ydir < 0) ya += h - 1, yb += h - 1;
-
- R128WaitForFifo(pScrn, 3);
- OUTREG(R128_SRC_Y_X, (ya << 16) | xa);
- OUTREG(R128_DST_Y_X, (yb << 16) | xb);
- OUTREG(R128_DST_HEIGHT_WIDTH, (h << 16) | w);
-}
-
-/* Setup for XAA mono 8x8 pattern color expansion. Patterns with
- transparency use `bg == -1'. This routine is only used if the XAA
- pixmap cache is turned on.
-
- Tests: xtest XFree86/fllrctngl (no other test will test this routine with
- both transparency and non-transparency)
-
- 1024x768@76Hz 8bpp
- Without With
- x11perf -srect100 38600.0/sec 85700.0/sec
- x11perf -osrect100 38600.0/sec 85700.0/sec
-*/
-static void R128SetupForMono8x8PatternFill(ScrnInfoPtr pScrn,
- int patternx, int patterny,
- int fg, int bg, int rop,
- unsigned int planemask)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- R128WaitForFifo(pScrn, 6);
- OUTREG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | (bg == -1
- ? R128_GMC_BRUSH_8X8_MONO_FG_LA
- : R128_GMC_BRUSH_8X8_MONO_FG_BG)
- | R128_ROP[rop].pattern
- | R128_GMC_BYTE_LSB_TO_MSB));
- OUTREG(R128_DP_WRITE_MASK, planemask);
- OUTREG(R128_DP_BRUSH_FRGD_CLR, fg);
- OUTREG(R128_DP_BRUSH_BKGD_CLR, bg);
- OUTREG(R128_BRUSH_DATA0, patternx);
- OUTREG(R128_BRUSH_DATA1, patterny);
-}
-
-/* Subsequent XAA 8x8 pattern color expansion. Because they are used in
- the setup function, `patternx' and `patterny' are not used here. */
-static void R128SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn,
- int patternx, int patterny,
- int x, int y, int w, int h)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- R128WaitForFifo(pScrn, 3);
- OUTREG(R128_BRUSH_Y_X, (patterny << 8) | patternx);
- OUTREG(R128_DST_Y_X, (y << 16) | x);
- OUTREG(R128_DST_HEIGHT_WIDTH, (h << 16) | w);
-}
-
-#if 0
-/* Setup for XAA color 8x8 pattern fill.
-
- Tests: xtest XFree86/fllrctngl (with Mono8x8PatternFill off)
-*/
-static void R128SetupForColor8x8PatternFill(ScrnInfoPtr pScrn,
- int patx, int paty,
- int rop, unsigned int planemask,
- int trans_color)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- R128TRACE(("Color8x8 %d %d %d\n", trans_color, patx, paty));
-
- R128WaitForFifo(pScrn, 2);
- OUTREG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | R128_GMC_BRUSH_8x8_COLOR
- | R128_GMC_SRC_DATATYPE_COLOR
- | R128_ROP[rop].rop
- | R128_DP_SRC_SOURCE_MEMORY));
- OUTREG(R128_DP_WRITE_MASK, planemask);
-
- if (trans_color != -1) {
- /* Set up for transparency */
- R128WaitForFifo(pScrn, 3);
- OUTREG(R128_CLR_CMP_CLR_SRC, trans_color);
- OUTREG(R128_CLR_CMP_MASK, R128_CLR_CMP_MSK);
- OUTREG(R128_CLR_CMP_CNTL, (R128_SRC_CMP_NEQ_COLOR
- | R128_CLR_CMP_SRC_SOURCE));
- }
-}
-
-/* Subsequent XAA 8x8 pattern color expansion. */
-static void R128SubsequentColor8x8PatternFillRect( ScrnInfoPtr pScrn,
- int patx, int paty,
- int x, int y, int w, int h)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- R128TRACE(("Color8x8 %d,%d %d,%d %d %d\n", patx, paty, x, y, w, h));
- R128WaitForFifo(pScrn, 3);
- OUTREG(R128_SRC_Y_X, (paty << 16) | patx);
- OUTREG(R128_DST_Y_X, (y << 16) | x);
- OUTREG(R128_DST_HEIGHT_WIDTH, (h << 16) | w);
-}
-#endif
-
-/* Setup for XAA indirect CPU-to-screen color expansion (indirect).
- Because of how the scratch buffer is initialized, this is really a
- mainstore-to-screen color expansion. Transparency is supported when `bg
- == -1'.
-
- x11perf -ftext (pure indirect):
- 1024x768@76Hz 1024x768@76Hz
- 8bpp 32bpp
- not used: 685000.0/sec 794000.0/sec
- used: 1070000.0/sec 1080000.0/sec
-
- We could improve this indirect routine by about 10% if the hardware
- could accept DWORD padded scanlines, or if XAA could provide bit-packed
- data. We might also be able to move to a direct routine if there were
- more HOST_DATA registers.
-
- Implementing the hybrid indirect/direct scheme improved performance in a
- few areas:
-
- 1024x768@76 8bpp
- Indirect Hybrid
- x11perf -oddsrect10 50100.0/sec 71700.0/sec
- x11perf -oddsrect100 4240.0/sec 6660.0/sec
- x11perf -bigsrect10 50300.0/sec 71100.0/sec
- x11perf -bigsrect100 4190.0/sec 6800.0/sec
- x11perf -polytext 584000.0/sec 714000.0/sec
- x11perf -polytext16 154000.0/sec 172000.0/sec
- x11perf -seg1 1780000.0/sec 1880000.0/sec
- x11perf -copyplane10 42900.0/sec 58300.0/sec
- x11perf -copyplane100 4400.0/sec 6710.0/sec
- x11perf -putimagexy10 5090.0/sec 6670.0/sec
- x11perf -putimagexy100 424.0/sec 575.0/sec
-
- 1024x768@76 -depth 24 -fbbpp 32
- Indirect Hybrid
- x11perf -oddsrect100 4240.0/sec 6670.0/sec
- x11perf -bigsrect100 4190.0/sec 6800.0/sec
- x11perf -polytext 585000.0/sec 719000.0/sec
- x11perf -seg1 2960000.0/sec 2990000.0/sec
- x11perf -copyplane100 4400.0/sec 6700.0/sec
- x11perf -putimagexy100 138.0/sec 191.0/sec
-
-*/
-static void R128SetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
- int fg, int bg,
- int rop,
- unsigned int
- planemask)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- R128WaitForFifo(pScrn, 4);
-#if X_BYTE_ORDER == X_LITTLE_ENDIAN
- OUTREG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | R128_GMC_DST_CLIPPING
- | R128_GMC_BRUSH_NONE
- | (bg == -1
- ? R128_GMC_SRC_DATATYPE_MONO_FG_LA
- : R128_GMC_SRC_DATATYPE_MONO_FG_BG)
- | R128_ROP[rop].rop
- | R128_GMC_BYTE_LSB_TO_MSB
- | R128_DP_SRC_SOURCE_HOST_DATA));
-#else /* X_BYTE_ORDER == X_BIG_ENDIAN */
- OUTREG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | R128_GMC_DST_CLIPPING
- | R128_GMC_BRUSH_NONE
- | (bg == -1
- ? R128_GMC_SRC_DATATYPE_MONO_FG_LA
- : R128_GMC_SRC_DATATYPE_MONO_FG_BG)
- | R128_ROP[rop].rop
- | R128_DP_SRC_SOURCE_HOST_DATA));
-#endif
- OUTREG(R128_DP_WRITE_MASK, planemask);
- OUTREG(R128_DP_SRC_FRGD_CLR, fg);
- OUTREG(R128_DP_SRC_BKGD_CLR, bg);
-}
-
-/* Subsequent XAA indirect CPU-to-screen color expansion. This is only
- called once for each rectangle. */
-static void R128SubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
- int x, int y,
- int w, int h,
- int skipleft)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int x1clip = x+skipleft;
- int x2clip = x+w;
-
- info->scanline_h = h;
- info->scanline_words = (w + 31) >> 5;
-
-#if 0
- /* Seems as though the Rage128's doesn't like blitting directly
- * as we must be overwriting something too quickly, therefore we
- * render to the buffer first and then blit */
- if ((info->scanline_words * h) <= 9) {
- /* Turn on direct for less than 9 dword colour expansion */
- info->scratch_buffer[0]
- = (unsigned char *)(ADDRREG(R128_HOST_DATA_LAST)
- - (info->scanline_words - 1));
- info->scanline_direct = 1;
- } else
-#endif
- {
- /* Use indirect for anything else */
- info->scratch_buffer[0] = info->scratch_save;
- info->scanline_direct = 0;
- }
-
- if (pScrn->bitsPerPixel == 24) {
- x1clip *= 3;
- x2clip *= 3;
- }
-
- R128WaitForFifo(pScrn, 4 + (info->scanline_direct ?
- (info->scanline_words * h) : 0) );
- OUTREG(R128_SC_TOP_LEFT, (y << 16) | (x1clip & 0xffff));
- OUTREG(R128_SC_BOTTOM_RIGHT, ((y+h-1) << 16) | ((x2clip-1) & 0xffff));
- OUTREG(R128_DST_Y_X, (y << 16) | (x & 0xffff));
- /* Have to pad the width here and use clipping engine */
- OUTREG(R128_DST_HEIGHT_WIDTH, (h << 16) | ((w + 31) & ~31));
-}
-
-/* Subsequent XAA indirect CPU-to-screen color expansion. This is called
- once for each scanline. */
-static void R128SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- CARD32 *p = (pointer)info->scratch_buffer[bufno];
- int i;
- int left = info->scanline_words;
- volatile CARD32 *d;
-
- if (info->scanline_direct) return;
- --info->scanline_h;
- while (left) {
- write_mem_barrier();
- if (left <= 8) {
- /* Last scanline - finish write to DATA_LAST */
- if (info->scanline_h == 0) {
- R128WaitForFifo(pScrn, left);
- /* Unrolling doesn't improve performance */
- for (d = ADDRREG(R128_HOST_DATA_LAST) - (left - 1); left; --left)
- *d++ = *p++;
- return;
- } else {
- R128WaitForFifo(pScrn, left);
- /* Unrolling doesn't improve performance */
- for (d = ADDRREG(R128_HOST_DATA7) - (left - 1); left; --left)
- *d++ = *p++;
- }
- } else {
- R128WaitForFifo(pScrn, 8);
- /* Unrolling doesn't improve performance */
- for (d = ADDRREG(R128_HOST_DATA0), i = 0; i < 8; i++)
- *d++ = *p++;
- left -= 8;
- }
- }
-}
-
-/* Setup for XAA indirect image write.
-
- 1024x768@76Hz 8bpp
- Without With
- x11perf -putimage10 37500.0/sec 39300.0/sec
- x11perf -putimage100 2150.0/sec 1170.0/sec
- x11perf -putimage500 108.0/sec 49.8/sec
- */
-static void R128SetupForScanlineImageWrite(ScrnInfoPtr pScrn,
- int rop,
- unsigned int planemask,
- int trans_color,
- int bpp,
- int depth)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- info->scanline_bpp = bpp;
-
- R128WaitForFifo(pScrn, 2);
- OUTREG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | R128_GMC_DST_CLIPPING
- | R128_GMC_BRUSH_1X8_COLOR
- | R128_GMC_SRC_DATATYPE_COLOR
- | R128_ROP[rop].rop
- | R128_GMC_BYTE_LSB_TO_MSB
- | R128_DP_SRC_SOURCE_HOST_DATA));
- OUTREG(R128_DP_WRITE_MASK, planemask);
-
- if (trans_color != -1) {
- /* Set up for transparency */
- R128WaitForFifo(pScrn, 3);
- OUTREG(R128_CLR_CMP_CLR_SRC, trans_color);
- OUTREG(R128_CLR_CMP_MASK, R128_CLR_CMP_MSK);
- OUTREG(R128_CLR_CMP_CNTL, (R128_SRC_CMP_NEQ_COLOR
- | R128_CLR_CMP_SRC_SOURCE));
- }
-}
-
-/* Subsequent XAA indirect image write. This is only called once for each
- rectangle. */
-static void R128SubsequentScanlineImageWriteRect(ScrnInfoPtr pScrn,
- int x, int y,
- int w, int h,
- int skipleft)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int x1clip = x+skipleft;
- int x2clip = x+w;
-
- int shift = 0; /* 32bpp */
-
- if (pScrn->bitsPerPixel == 8) shift = 3;
- else if (pScrn->bitsPerPixel == 16) shift = 1;
-
- info->scanline_h = h;
- info->scanline_words = (w * info->scanline_bpp + 31) >> 5;
-
-#if 0
- /* Seeing as the CPUToScreen doesn't like this, I've done this
- * here too, as it uses pretty much the same path. */
- if ((info->scanline_words * h) <= 9) {
- /* Turn on direct for less than 9 dword colour expansion */
- info->scratch_buffer[0]
- = (unsigned char *)(ADDRREG(R128_HOST_DATA_LAST)
- - (info->scanline_words - 1));
- info->scanline_direct = 1;
- } else
-#endif
- {
- /* Use indirect for anything else */
- info->scratch_buffer[0] = info->scratch_save;
- info->scanline_direct = 0;
- }
-
- if (pScrn->bitsPerPixel == 24) {
- x1clip *= 3;
- x2clip *= 3;
- }
-
- R128WaitForFifo(pScrn, 4 + (info->scanline_direct ?
- (info->scanline_words * h) : 0) );
- OUTREG(R128_SC_TOP_LEFT, (y << 16) | (x1clip & 0xffff));
- OUTREG(R128_SC_BOTTOM_RIGHT, ((y+h-1) << 16) | ((x2clip-1) & 0xffff));
- OUTREG(R128_DST_Y_X, (y << 16) | (x & 0xffff));
- /* Have to pad the width here and use clipping engine */
- OUTREG(R128_DST_HEIGHT_WIDTH, (h << 16) | ((w + shift) & ~shift));
-}
-
-/* Subsequent XAA indirect iamge write. This is called once for each
- scanline. */
-static void R128SubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- CARD32 *p = (pointer)info->scratch_buffer[bufno];
- int i;
- int left = info->scanline_words;
- volatile CARD32 *d;
-
- if (info->scanline_direct) return;
- --info->scanline_h;
- while (left) {
- write_mem_barrier();
- if (left <= 8) {
- /* Last scanline - finish write to DATA_LAST */
- if (info->scanline_h == 0) {
- R128WaitForFifo(pScrn, left);
- /* Unrolling doesn't improve performance */
- for (d = ADDRREG(R128_HOST_DATA_LAST) - (left - 1); left; --left)
- *d++ = *p++;
- return;
- } else {
- R128WaitForFifo(pScrn, left);
- /* Unrolling doesn't improve performance */
- for (d = ADDRREG(R128_HOST_DATA7) - (left - 1); left; --left)
- *d++ = *p++;
- }
- } else {
- R128WaitForFifo(pScrn, 8);
- /* Unrolling doesn't improve performance */
- for (d = ADDRREG(R128_HOST_DATA0), i = 0; i < 8; i++)
- *d++ = *p++;
- left -= 8;
- }
- }
-}
-
-/* Initialize the acceleration hardware. */
-void R128EngineInit(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- R128TRACE(("EngineInit (%d/%d)\n", info->CurrentLayout.pixel_code, info->CurrentLayout.bitsPerPixel));
-
- OUTREG(R128_SCALE_3D_CNTL, 0);
- R128EngineReset(pScrn);
-
- switch (info->CurrentLayout.pixel_code) {
- case 8: info->datatype = 2; break;
- case 15: info->datatype = 3; break;
- case 16: info->datatype = 4; break;
- case 24: info->datatype = 5; break;
- case 32: info->datatype = 6; break;
- default:
- R128TRACE(("Unknown depth/bpp = %d/%d (code = %d)\n",
- info->CurrentLayout.depth, info->CurrentLayout.bitsPerPixel,
- info->CurrentLayout.pixel_code));
- }
- info->pitch = (info->CurrentLayout.displayWidth / 8) * (info->CurrentLayout.pixel_bytes == 3 ? 3 : 1);
-
- R128TRACE(("Pitch for acceleration = %d\n", info->pitch));
-
- R128WaitForFifo(pScrn, 2);
- OUTREG(R128_DEFAULT_OFFSET, pScrn->fbOffset);
- OUTREG(R128_DEFAULT_PITCH, info->pitch);
-
- R128WaitForFifo(pScrn, 4);
- OUTREG(R128_AUX_SC_CNTL, 0);
- OUTREG(R128_DEFAULT_SC_BOTTOM_RIGHT, (R128_DEFAULT_SC_RIGHT_MAX
- | R128_DEFAULT_SC_BOTTOM_MAX));
- OUTREG(R128_SC_TOP_LEFT, 0);
- OUTREG(R128_SC_BOTTOM_RIGHT, (R128_DEFAULT_SC_RIGHT_MAX
- | R128_DEFAULT_SC_BOTTOM_MAX));
-
- info->dp_gui_master_cntl = ((info->datatype << R128_GMC_DST_DATATYPE_SHIFT)
- | R128_GMC_CLR_CMP_CNTL_DIS
- | R128_GMC_AUX_CLIP_DIS);
- R128WaitForFifo(pScrn, 1);
- OUTREG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | R128_GMC_BRUSH_SOLID_COLOR
- | R128_GMC_SRC_DATATYPE_COLOR));
-
- R128WaitForFifo(pScrn, 8);
- OUTREG(R128_DST_BRES_ERR, 0);
- OUTREG(R128_DST_BRES_INC, 0);
- OUTREG(R128_DST_BRES_DEC, 0);
- OUTREG(R128_DP_BRUSH_FRGD_CLR, 0xffffffff);
- OUTREG(R128_DP_BRUSH_BKGD_CLR, 0x00000000);
- OUTREG(R128_DP_SRC_FRGD_CLR, 0xffffffff);
- OUTREG(R128_DP_SRC_BKGD_CLR, 0x00000000);
- OUTREG(R128_DP_WRITE_MASK, 0xffffffff);
-
- R128WaitForFifo(pScrn, 1);
-
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- /* FIXME: this is a kludge for texture uploads in the 3D driver. Look at
- * how the radeon driver handles HOST_DATA_SWAP if you want to implement
- * CCE ImageWrite acceleration or anything needing this bit */
-#ifdef XF86DRI
- if (info->directRenderingEnabled)
- OUTREGP(R128_DP_DATATYPE, 0, ~R128_HOST_BIG_ENDIAN_EN);
- else
-#endif
- OUTREGP(R128_DP_DATATYPE,
- R128_HOST_BIG_ENDIAN_EN, ~R128_HOST_BIG_ENDIAN_EN);
-#else /* X_LITTLE_ENDIAN */
- OUTREGP(R128_DP_DATATYPE, 0, ~R128_HOST_BIG_ENDIAN_EN);
-#endif
-
-#ifdef XF86DRI
- info->sc_left = 0x00000000;
- info->sc_right = R128_DEFAULT_SC_RIGHT_MAX;
- info->sc_top = 0x00000000;
- info->sc_bottom = R128_DEFAULT_SC_BOTTOM_MAX;
-
- info->re_top_left = 0x00000000;
- info->re_width_height = ((0x7ff << R128_RE_WIDTH_SHIFT) |
- (0x7ff << R128_RE_HEIGHT_SHIFT));
-
- info->aux_sc_cntl = 0x00000000;
-#endif
-
- R128WaitForIdle(pScrn);
-}
-
-#ifdef XF86DRI
-
-/* Setup for XAA SolidFill. */
-static void R128CCESetupForSolidFill(ScrnInfoPtr pScrn,
- int color, int rop,
- unsigned int planemask)
-{
- R128InfoPtr info = R128PTR(pScrn);
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
- BEGIN_RING( 8 );
-
- OUT_RING_REG( R128_DP_GUI_MASTER_CNTL,
- (info->dp_gui_master_cntl
- | R128_GMC_BRUSH_SOLID_COLOR
- | R128_GMC_SRC_DATATYPE_COLOR
- | R128_ROP[rop].pattern) );
-
- OUT_RING_REG( R128_DP_BRUSH_FRGD_CLR, color );
- OUT_RING_REG( R128_DP_WRITE_MASK, planemask );
- OUT_RING_REG( R128_DP_CNTL, (R128_DST_X_LEFT_TO_RIGHT |
- R128_DST_Y_TOP_TO_BOTTOM));
- ADVANCE_RING();
-}
-
-/* Subsequent XAA SolidFillRect.
-
- Tests: xtest CH06/fllrctngl, xterm
-*/
-static void R128CCESubsequentSolidFillRect(ScrnInfoPtr pScrn,
- int x, int y, int w, int h)
-{
- R128InfoPtr info = R128PTR(pScrn);
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
- BEGIN_RING( 4 );
-
- OUT_RING_REG( R128_DST_Y_X, (y << 16) | x );
- OUT_RING_REG( R128_DST_WIDTH_HEIGHT, (w << 16) | h );
-
- ADVANCE_RING();
-}
-
-/* Setup for XAA screen-to-screen copy.
-
- Tests: xtest CH06/fllrctngl (also tests transparency).
-*/
-static void R128CCESetupForScreenToScreenCopy(ScrnInfoPtr pScrn,
- int xdir, int ydir, int rop,
- unsigned int planemask,
- int trans_color)
-{
- R128InfoPtr info = R128PTR(pScrn);
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
- info->xdir = xdir;
- info->ydir = ydir;
-
- BEGIN_RING( 6 );
-
- OUT_RING_REG( R128_DP_GUI_MASTER_CNTL,
- (info->dp_gui_master_cntl
- | R128_GMC_BRUSH_NONE
- | R128_GMC_SRC_DATATYPE_COLOR
- | R128_ROP[rop].rop
- | R128_DP_SRC_SOURCE_MEMORY) );
-
- OUT_RING_REG( R128_DP_WRITE_MASK, planemask );
- OUT_RING_REG( R128_DP_CNTL,
- ((xdir >= 0 ? R128_DST_X_LEFT_TO_RIGHT : 0) |
- (ydir >= 0 ? R128_DST_Y_TOP_TO_BOTTOM : 0)) );
-
- ADVANCE_RING();
-
- if ((trans_color != -1) || (info->XAAForceTransBlit == TRUE)) {
- BEGIN_RING( 6 );
-
- OUT_RING_REG( R128_CLR_CMP_CLR_SRC, trans_color );
- OUT_RING_REG( R128_CLR_CMP_MASK, R128_CLR_CMP_MSK );
- OUT_RING_REG( R128_CLR_CMP_CNTL, (R128_SRC_CMP_NEQ_COLOR |
- R128_CLR_CMP_SRC_SOURCE) );
-
- ADVANCE_RING();
- }
-}
-
-/* Subsequent XAA screen-to-screen copy. */
-static void R128CCESubsequentScreenToScreenCopy(ScrnInfoPtr pScrn,
- int xa, int ya,
- int xb, int yb,
- int w, int h)
-{
- R128InfoPtr info = R128PTR(pScrn);
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
- if (info->xdir < 0) xa += w - 1, xb += w - 1;
- if (info->ydir < 0) ya += h - 1, yb += h - 1;
-
- BEGIN_RING( 6 );
-
- OUT_RING_REG( R128_SRC_Y_X, (ya << 16) | xa );
- OUT_RING_REG( R128_DST_Y_X, (yb << 16) | xb );
- OUT_RING_REG( R128_DST_HEIGHT_WIDTH, (h << 16) | w );
-
- ADVANCE_RING();
-}
-
-
-/*
- * XAA scanline color expansion
- *
- * We use HOSTDATA_BLT CCE packets, dividing the image in chunks that fit into
- * the indirect buffer if necessary.
- */
-static void R128CCESetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
- int fg, int bg,
- int rop,
- unsigned int
- planemask)
-{
- R128InfoPtr info = R128PTR(pScrn);
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
- BEGIN_RING( 2 );
- OUT_RING_REG(R128_DP_WRITE_MASK, planemask);
- ADVANCE_RING();
-
- info->scanline_rop = rop;
- info->scanline_fg = fg;
- info->scanline_bg = bg;
-}
-
-/* Helper function to write out a HOSTDATA_BLT packet into the indirect buffer
- and set the XAA scratch buffer address appropriately */
-static void R128CCEScanlineCPUToScreenColorExpandFillPacket(ScrnInfoPtr pScrn,
- int bufno)
-{
- R128InfoPtr info = R128PTR(pScrn);
- int chunk_words = info->scanline_hpass * info->scanline_words;
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
- BEGIN_RING( chunk_words+9 );
-
- OUT_RING( CCE_PACKET3( R128_CCE_PACKET3_CNTL_HOSTDATA_BLT, chunk_words+9-2 ) );
-#if X_BYTE_ORDER == X_LITTLE_ENDIAN
- OUT_RING( (info->dp_gui_master_cntl
- | R128_GMC_DST_CLIPPING
- | R128_GMC_BRUSH_NONE
- | (info->scanline_bg == -1
- ? R128_GMC_SRC_DATATYPE_MONO_FG_LA
- : R128_GMC_SRC_DATATYPE_MONO_FG_BG)
- | R128_ROP[info->scanline_rop].rop
- | R128_GMC_BYTE_LSB_TO_MSB
- | R128_DP_SRC_SOURCE_HOST_DATA));
-#else /* X_BYTE_ORDER == X_BIG_ENDIAN */
- OUT_RING( (info->dp_gui_master_cntl
- | R128_GMC_DST_CLIPPING
- | R128_GMC_BRUSH_NONE
- | (info->scanline_bg == -1
- ? R128_GMC_SRC_DATATYPE_MONO_FG_LA
- : R128_GMC_SRC_DATATYPE_MONO_FG_BG)
- | R128_ROP[info->scanline_rop].rop
- | R128_DP_SRC_SOURCE_HOST_DATA));
-#endif
- OUT_RING( (info->scanline_y << 16) | (info->scanline_x1clip & 0xffff) );
- OUT_RING( ((info->scanline_y+info->scanline_hpass-1) << 16) | ((info->scanline_x2clip-1) & 0xffff) );
- OUT_RING( info->scanline_fg );
- OUT_RING( info->scanline_bg );
- OUT_RING( (info->scanline_y << 16) | (info->scanline_x & 0xffff));
-
- /* Have to pad the width here and use clipping engine */
- OUT_RING( (info->scanline_hpass << 16) | ((info->scanline_w + 31) & ~31));
-
- OUT_RING( chunk_words );
-
- info->scratch_buffer[bufno] = (unsigned char *) &__head[__count];
- __count += chunk_words;
-
- ADVANCE_RING();
-
- info->scanline_y += info->scanline_hpass;
- info->scanline_h -= info->scanline_hpass;
-
- if ( R128_VERBOSE )
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "%s: hpass=%d, words=%d => chunk_words=%d, y=%d, h=%d\n",
- __FUNCTION__, info->scanline_hpass, info->scanline_words,
- chunk_words, info->scanline_y, info->scanline_h );
-}
-
-/* Subsequent XAA indirect CPU-to-screen color expansion. This is only
- called once for each rectangle. */
-static void R128CCESubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
- int x, int y,
- int w, int h,
- int skipleft)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
-#define BUFSIZE ( R128_BUFFER_SIZE/4-9 )
-
- info->scanline_x = x;
- info->scanline_y = y;
- info->scanline_w = w;
- info->scanline_h = h;
-
- info->scanline_x1clip = x+skipleft;
- info->scanline_x2clip = x+w;
-
- info->scanline_words = (w + 31) >> 5;
- info->scanline_hpass = min(h,(BUFSIZE/info->scanline_words));
-
- if ( R128_VERBOSE )
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "%s: x=%d, y=%d, w=%d, h=%d, skipleft=%d => x1clip=%d, x2clip=%d, hpass=%d, words=%d\n",
- __FUNCTION__, x, y, w, h, skipleft, info->scanline_x1clip, info->scanline_x2clip,
- info->scanline_hpass, info->scanline_words );
-
- R128CCEScanlineCPUToScreenColorExpandFillPacket(pScrn, 0);
-}
-
-/* Subsequent XAA indirect CPU-to-screen color expansion. This is called
- once for each scanline. */
-static void R128CCESubsequentColorExpandScanline(ScrnInfoPtr pScrn,
- int bufno)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- if ( R128_VERBOSE )
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "%s enter: scanline_hpass=%d, scanline_h=%d\n",
- __FUNCTION__, info->scanline_hpass, info->scanline_h );
-
- if (--info->scanline_hpass) {
- info->scratch_buffer[bufno] += 4 * info->scanline_words;
- }
- else if(info->scanline_h) {
- info->scanline_hpass = min(info->scanline_h,(BUFSIZE/info->scanline_words));
- R128CCEScanlineCPUToScreenColorExpandFillPacket(pScrn, bufno);
- }
-
- if ( R128_VERBOSE )
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- "%s exit: scanline_hpass=%d, scanline_h=%d\n",
- __FUNCTION__, info->scanline_hpass, info->scanline_h );
-}
-
-/* Solid lines */
-static void R128CCESetupForSolidLine(ScrnInfoPtr pScrn,
- int color, int rop, unsigned int planemask)
-{
- R128InfoPtr info = R128PTR(pScrn);
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
- BEGIN_RING( 6 );
-
- OUT_RING_REG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | R128_GMC_BRUSH_SOLID_COLOR
- | R128_GMC_SRC_DATATYPE_COLOR
- | R128_ROP[rop].pattern));
- OUT_RING_REG(R128_DP_BRUSH_FRGD_CLR, color);
- OUT_RING_REG(R128_DP_WRITE_MASK, planemask);
-
- ADVANCE_RING();
-}
-
-static void R128CCESubsequentSolidBresenhamLine(ScrnInfoPtr pScrn,
- int x, int y,
- int major, int minor,
- int err, int len, int octant)
-{
- R128InfoPtr info = R128PTR(pScrn);
- int flags = 0;
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
- if (octant & YMAJOR) flags |= R128_DST_Y_MAJOR;
- if (!(octant & XDECREASING)) flags |= R128_DST_X_DIR_LEFT_TO_RIGHT;
- if (!(octant & YDECREASING)) flags |= R128_DST_Y_DIR_TOP_TO_BOTTOM;
-
- BEGIN_RING( 12 );
-
- OUT_RING_REG(R128_DP_CNTL_XDIR_YDIR_YMAJOR, flags);
- OUT_RING_REG(R128_DST_Y_X, (y << 16) | x);
- OUT_RING_REG(R128_DST_BRES_ERR, err);
- OUT_RING_REG(R128_DST_BRES_INC, minor);
- OUT_RING_REG(R128_DST_BRES_DEC, -major);
- OUT_RING_REG(R128_DST_BRES_LNTH, len);
-
- ADVANCE_RING();
-}
-
-static void R128CCESubsequentSolidHorVertLine(ScrnInfoPtr pScrn,
- int x, int y, int len, int dir )
-{
- R128InfoPtr info = R128PTR(pScrn);
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
- BEGIN_RING( 2 );
-
- OUT_RING_REG(R128_DP_CNTL, (R128_DST_X_LEFT_TO_RIGHT
- | R128_DST_Y_TOP_TO_BOTTOM));
-
- ADVANCE_RING();
-
- if (dir == DEGREES_0) {
- R128CCESubsequentSolidFillRect(pScrn, x, y, len, 1);
- } else {
- R128CCESubsequentSolidFillRect(pScrn, x, y, 1, len);
- }
-}
-
-/* Dashed lines */
-static void R128CCESetupForDashedLine(ScrnInfoPtr pScrn,
- int fg, int bg,
- int rop, unsigned int planemask,
- int length, unsigned char *pattern)
-{
- R128InfoPtr info = R128PTR(pScrn);
- CARD32 pat = *(CARD32 *)(pointer)pattern;
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
-#if X_BYTE_ORDER == X_LITTLE_ENDIAN
-# define PAT_SHIFT(pat,n) pat << n
-#else
-# define PAT_SHIFT(pat,n) pat >> n
-#endif
-
- switch (length) {
- case 2: pat |= PAT_SHIFT(pat,2); /* fall through */
- case 4: pat |= PAT_SHIFT(pat,4); /* fall through */
- case 8: pat |= PAT_SHIFT(pat,8); /* fall through */
- case 16: pat |= PAT_SHIFT(pat,16);
- }
-
- BEGIN_RING( 10 );
-
- OUT_RING_REG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | (bg == -1
- ? R128_GMC_BRUSH_32x1_MONO_FG_LA
- : R128_GMC_BRUSH_32x1_MONO_FG_BG)
- | R128_ROP[rop].pattern
- | R128_GMC_BYTE_LSB_TO_MSB));
- OUT_RING_REG(R128_DP_WRITE_MASK, planemask);
- OUT_RING_REG(R128_DP_BRUSH_FRGD_CLR, fg);
- OUT_RING_REG(R128_DP_BRUSH_BKGD_CLR, bg);
- OUT_RING_REG(R128_BRUSH_DATA0, pat);
-
- ADVANCE_RING();
-}
-
-static void R128CCESubsequentDashedBresenhamLine(ScrnInfoPtr pScrn,
- int x, int y,
- int major, int minor,
- int err, int len, int octant,
- int phase)
-{
- R128InfoPtr info = R128PTR(pScrn);
- int flags = 0;
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
- if (octant & YMAJOR) flags |= R128_DST_Y_MAJOR;
- if (!(octant & XDECREASING)) flags |= R128_DST_X_DIR_LEFT_TO_RIGHT;
- if (!(octant & YDECREASING)) flags |= R128_DST_Y_DIR_TOP_TO_BOTTOM;
-
- BEGIN_RING( 14 );
-
- OUT_RING_REG(R128_DP_CNTL_XDIR_YDIR_YMAJOR, flags);
- OUT_RING_REG(R128_DST_Y_X, (y << 16) | x);
- OUT_RING_REG(R128_BRUSH_Y_X, (phase << 16) | phase);
- OUT_RING_REG(R128_DST_BRES_ERR, err);
- OUT_RING_REG(R128_DST_BRES_INC, minor);
- OUT_RING_REG(R128_DST_BRES_DEC, -major);
- OUT_RING_REG(R128_DST_BRES_LNTH, len);
-
- ADVANCE_RING();
-}
-
-/* Mono 8x8 pattern color expansion */
-static void R128CCESetupForMono8x8PatternFill(ScrnInfoPtr pScrn,
- int patternx, int patterny,
- int fg, int bg, int rop,
- unsigned int planemask)
-{
- R128InfoPtr info = R128PTR(pScrn);
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
- BEGIN_RING( 12 );
-
- OUT_RING_REG(R128_DP_GUI_MASTER_CNTL, (info->dp_gui_master_cntl
- | (bg == -1
- ? R128_GMC_BRUSH_8X8_MONO_FG_LA
- : R128_GMC_BRUSH_8X8_MONO_FG_BG)
- | R128_ROP[rop].pattern
- | R128_GMC_BYTE_LSB_TO_MSB));
- OUT_RING_REG(R128_DP_WRITE_MASK, planemask);
- OUT_RING_REG(R128_DP_BRUSH_FRGD_CLR, fg);
- OUT_RING_REG(R128_DP_BRUSH_BKGD_CLR, bg);
- OUT_RING_REG(R128_BRUSH_DATA0, patternx);
- OUT_RING_REG(R128_BRUSH_DATA1, patterny);
-
- ADVANCE_RING();
-}
-
-static void R128CCESubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn,
- int patternx, int patterny,
- int x, int y, int w, int h)
-{
- R128InfoPtr info = R128PTR(pScrn);
- RING_LOCALS;
-
- R128CCE_REFRESH( pScrn, info );
-
- BEGIN_RING( 6 );
-
- OUT_RING_REG(R128_BRUSH_Y_X, (patterny << 8) | patternx);
- OUT_RING_REG(R128_DST_Y_X, (y << 16) | x);
- OUT_RING_REG(R128_DST_HEIGHT_WIDTH, (h << 16) | w);
-
- ADVANCE_RING();
-}
-
-/* Get an indirect buffer for the CCE 2D acceleration commands.
- */
-drmBufPtr R128CCEGetBuffer( ScrnInfoPtr pScrn )
-{
- R128InfoPtr info = R128PTR(pScrn);
- drmDMAReq dma;
- drmBufPtr buf = NULL;
- int indx = 0;
- int size = 0;
- int ret, i = 0;
-
-#if 0
- /* FIXME: pScrn->pScreen has not been initialized when this is first
- called from RADEONSelectBuffer via RADEONDRICPInit. We could use
- the screen index from pScrn, which is initialized, and then get
- the screen from screenInfo.screens[index], but that is a hack. */
- dma.context = DRIGetContext(pScrn->pScreen);
-#else
- dma.context = 0x00000001; /* This is the X server's context */
-#endif
- dma.send_count = 0;
- dma.send_list = NULL;
- dma.send_sizes = NULL;
- dma.flags = 0;
- dma.request_count = 1;
- dma.request_size = R128_BUFFER_SIZE;
- dma.request_list = &indx;
- dma.request_sizes = &size;
- dma.granted_count = 0;
-
- while ( 1 ) {
- do {
- ret = drmDMA( info->drmFD, &dma );
- if ( ret && ret != -EAGAIN ) {
- xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
- "%s: CCE GetBuffer %d\n", __FUNCTION__, ret );
- }
- } while ( ( ret == -EAGAIN ) && ( i++ < R128_TIMEOUT ) );
-
- if ( ret == 0 ) {
- buf = &info->buffers->list[indx];
- buf->used = 0;
- if ( R128_VERBOSE ) {
- xf86DrvMsg( pScrn->scrnIndex, X_INFO,
- " GetBuffer returning %d\n", buf->idx );
- }
- return buf;
- }
-
- xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
- "GetBuffer timed out, resetting engine...\n");
- R128EngineReset( pScrn );
- /* R128EngineRestore( pScrn ); FIXME ??? */
-
- /* Always restart the engine when doing CCE 2D acceleration */
- R128CCE_RESET( pScrn, info );
- R128CCE_START( pScrn, info );
- }
-}
-
-/* Flush the indirect buffer to the kernel for submission to the card.
- */
-void R128CCEFlushIndirect( ScrnInfoPtr pScrn, int discard )
-{
- R128InfoPtr info = R128PTR(pScrn);
- drmBufPtr buffer = info->indirectBuffer;
- int start = info->indirectStart;
- drmR128Indirect indirect;
-
- if ( !buffer )
- return;
-
- if ( (start == buffer->used) && !discard )
- return;
-
- indirect.idx = buffer->idx;
- indirect.start = start;
- indirect.end = buffer->used;
- indirect.discard = discard;
-
- drmCommandWriteRead( info->drmFD, DRM_R128_INDIRECT,
- &indirect, sizeof(drmR128Indirect));
-
- if ( discard )
- buffer = info->indirectBuffer = R128CCEGetBuffer( pScrn );
-
- /* pad to an even number of dwords */
- if (buffer->used & 7)
- buffer->used = ( buffer->used+7 ) & ~7;
-
- info->indirectStart = buffer->used;
-}
-
-/* Flush and release the indirect buffer.
- */
-void R128CCEReleaseIndirect( ScrnInfoPtr pScrn )
-{
- R128InfoPtr info = R128PTR(pScrn);
- drmBufPtr buffer = info->indirectBuffer;
- int start = info->indirectStart;
- drmR128Indirect indirect;
-
- info->indirectBuffer = NULL;
- info->indirectStart = 0;
-
- if ( !buffer )
- return;
-
- indirect.idx = buffer->idx;
- indirect.start = start;
- indirect.end = buffer->used;
- indirect.discard = 1;
-
- drmCommandWriteRead( info->drmFD, DRM_R128_INDIRECT,
- &indirect, sizeof(drmR128Indirect));
-}
-
-/* This callback is required for multihead cards using XAA */
-static
-void R128RestoreCCEAccelState(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
-/* unsigned char *R128MMIO = info->MMIO; needed for OUTREG below */
- /*xf86DrvMsg(pScrn->scrnIndex, X_INFO, "===>RestoreCP\n");*/
-
- R128WaitForFifo(pScrn, 1);
-/* is this needed on r128
- OUTREG( R128_DEFAULT_OFFSET, info->frontPitchOffset);
-*/
- R128WaitForIdle(pScrn);
-
- /* FIXME: May need to restore other things,
- like BKGD_CLK FG_CLK...*/
-
-}
-
-static void R128CCEAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- a->Flags = (PIXMAP_CACHE
- | OFFSCREEN_PIXMAPS
- | LINEAR_FRAMEBUFFER);
-
- /* Sync */
- a->Sync = R128CCEWaitForIdle;
-
- /* Solid Filled Rectangle */
- a->PolyFillRectSolidFlags = 0;
- a->SetupForSolidFill = R128CCESetupForSolidFill;
- a->SubsequentSolidFillRect = R128CCESubsequentSolidFillRect;
-
- /* Screen-to-screen Copy */
- /* Transparency uses the wrong colors for
- 24 bpp mode -- the transparent part is
- correct, but the opaque color is wrong.
- This can be seen with netscape's I-bar
- cursor when editing in the URL location
- box. */
- a->ScreenToScreenCopyFlags = ((pScrn->bitsPerPixel == 24)
- ? NO_TRANSPARENCY
- : 0);
- a->SetupForScreenToScreenCopy = R128CCESetupForScreenToScreenCopy;
- a->SubsequentScreenToScreenCopy = R128CCESubsequentScreenToScreenCopy;
-
- /* Indirect CPU-To-Screen Color Expand */
- a->ScanlineCPUToScreenColorExpandFillFlags = LEFT_EDGE_CLIPPING
- | LEFT_EDGE_CLIPPING_NEGATIVE_X;
- a->NumScanlineColorExpandBuffers = 1;
- a->ScanlineColorExpandBuffers = info->scratch_buffer;
- info->scratch_buffer[0] = NULL;
- a->SetupForScanlineCPUToScreenColorExpandFill
- = R128CCESetupForScanlineCPUToScreenColorExpandFill;
- a->SubsequentScanlineCPUToScreenColorExpandFill
- = R128CCESubsequentScanlineCPUToScreenColorExpandFill;
- a->SubsequentColorExpandScanline = R128CCESubsequentColorExpandScanline;
-
- /* Bresenham Solid Lines */
- a->SetupForSolidLine = R128CCESetupForSolidLine;
- a->SubsequentSolidBresenhamLine = R128CCESubsequentSolidBresenhamLine;
- a->SubsequentSolidHorVertLine = R128CCESubsequentSolidHorVertLine;
-
- /* Bresenham Dashed Lines*/
- a->SetupForDashedLine = R128CCESetupForDashedLine;
- a->SubsequentDashedBresenhamLine = R128CCESubsequentDashedBresenhamLine;
- a->DashPatternMaxLength = 32;
- a->DashedLineFlags = (LINE_PATTERN_LSBFIRST_LSBJUSTIFIED
- | LINE_PATTERN_POWER_OF_2_ONLY);
-
- /* Mono 8x8 Pattern Fill (Color Expand) */
- a->SetupForMono8x8PatternFill = R128CCESetupForMono8x8PatternFill;
- a->SubsequentMono8x8PatternFillRect = R128CCESubsequentMono8x8PatternFillRect;
- a->Mono8x8PatternFillFlags = (HARDWARE_PATTERN_PROGRAMMED_BITS
- | HARDWARE_PATTERN_PROGRAMMED_ORIGIN
- | HARDWARE_PATTERN_SCREEN_ORIGIN
- | BIT_ORDER_IN_BYTE_LSBFIRST);
-
- if(!info->IsSecondary && xf86IsEntityShared(pScrn->entityList[0]))
- a->RestoreAccelState = R128RestoreCCEAccelState;
-
-}
-#endif
-
-/* This callback is required for multihead cards using XAA */
-static
-void R128RestoreAccelState(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- R128WaitForFifo(pScrn, 2);
- OUTREG(R128_DEFAULT_OFFSET, pScrn->fbOffset);
- OUTREG(R128_DEFAULT_PITCH, info->pitch);
-
- /* FIXME: May need to restore other things,
- like BKGD_CLK FG_CLK...*/
-
- R128WaitForIdle(pScrn);
-
-}
-
-static void R128MMIOAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- a->Flags = (PIXMAP_CACHE
- | OFFSCREEN_PIXMAPS
- | LINEAR_FRAMEBUFFER);
-
- /* Sync */
- a->Sync = R128WaitForIdle;
-
- /* Solid Filled Rectangle */
- a->PolyFillRectSolidFlags = 0;
- a->SetupForSolidFill = R128SetupForSolidFill;
- a->SubsequentSolidFillRect = R128SubsequentSolidFillRect;
-
- /* Screen-to-screen Copy */
- /* Transparency uses the wrong colors for
- 24 bpp mode -- the transparent part is
- correct, but the opaque color is wrong.
- This can be seen with netscape's I-bar
- cursor when editing in the URL location
- box. */
- a->ScreenToScreenCopyFlags = ((pScrn->bitsPerPixel == 24)
- ? NO_TRANSPARENCY
- : 0);
- a->SetupForScreenToScreenCopy = R128SetupForScreenToScreenCopy;
- a->SubsequentScreenToScreenCopy = R128SubsequentScreenToScreenCopy;
-
- /* Mono 8x8 Pattern Fill (Color Expand) */
- a->SetupForMono8x8PatternFill = R128SetupForMono8x8PatternFill;
- a->SubsequentMono8x8PatternFillRect = R128SubsequentMono8x8PatternFillRect;
- a->Mono8x8PatternFillFlags = (HARDWARE_PATTERN_PROGRAMMED_BITS
- | HARDWARE_PATTERN_PROGRAMMED_ORIGIN
- | HARDWARE_PATTERN_SCREEN_ORIGIN
- | BIT_ORDER_IN_BYTE_LSBFIRST);
-
- /* Indirect CPU-To-Screen Color Expand */
- a->ScanlineCPUToScreenColorExpandFillFlags = LEFT_EDGE_CLIPPING
- | LEFT_EDGE_CLIPPING_NEGATIVE_X;
- a->NumScanlineColorExpandBuffers = 1;
- a->ScanlineColorExpandBuffers = info->scratch_buffer;
- info->scratch_save = xalloc(((pScrn->virtualX+31)/32*4)
- + (pScrn->virtualX
- * info->CurrentLayout.pixel_bytes));
- info->scratch_buffer[0] = info->scratch_save;
- a->SetupForScanlineCPUToScreenColorExpandFill
- = R128SetupForScanlineCPUToScreenColorExpandFill;
- a->SubsequentScanlineCPUToScreenColorExpandFill
- = R128SubsequentScanlineCPUToScreenColorExpandFill;
- a->SubsequentColorExpandScanline = R128SubsequentColorExpandScanline;
-
- /* Bresenham Solid Lines */
- a->SetupForSolidLine = R128SetupForSolidLine;
- a->SubsequentSolidBresenhamLine = R128SubsequentSolidBresenhamLine;
- a->SubsequentSolidHorVertLine = R128SubsequentSolidHorVertLine;
-
- /* Bresenham Dashed Lines*/
- a->SetupForDashedLine = R128SetupForDashedLine;
- a->SubsequentDashedBresenhamLine = R128SubsequentDashedBresenhamLine;
- a->DashPatternMaxLength = 32;
- a->DashedLineFlags = (LINE_PATTERN_LSBFIRST_LSBJUSTIFIED
- | LINE_PATTERN_POWER_OF_2_ONLY);
-
- /* ImageWrite */
- a->NumScanlineImageWriteBuffers = 1;
- a->ScanlineImageWriteBuffers = info->scratch_buffer;
- info->scratch_buffer[0] = info->scratch_save;
- a->SetupForScanlineImageWrite = R128SetupForScanlineImageWrite;
- a->SubsequentScanlineImageWriteRect= R128SubsequentScanlineImageWriteRect;
- a->SubsequentImageWriteScanline = R128SubsequentImageWriteScanline;
- a->ScanlineImageWriteFlags = CPU_TRANSFER_PAD_DWORD
- /* Performance tests show that we shouldn't use GXcopy for
- * uploads as a memcpy is faster */
- | NO_GXCOPY
- | LEFT_EDGE_CLIPPING
- | LEFT_EDGE_CLIPPING_NEGATIVE_X
- | SCANLINE_PAD_DWORD;
-
- if(xf86IsEntityShared(pScrn->entityList[0]))
- {
- DevUnion* pPriv;
- R128EntPtr pR128Ent;
- pPriv = xf86GetEntityPrivate(pScrn->entityList[0],
- getR128EntityIndex());
- pR128Ent = pPriv->ptr;
-
- /*if there are more than one devices sharing this entity, we
- have to assign this call back, otherwise the XAA will be
- disabled */
- if(pR128Ent->HasSecondary || pR128Ent->BypassSecondary)
- a->RestoreAccelState = R128RestoreAccelState;
- }
-
-}
-
-/* Initialize XAA for supported acceleration and also initialize the
- graphics hardware for acceleration. */
-Bool R128AccelInit(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- XAAInfoRecPtr a;
-
- if (!(a = info->accel = XAACreateInfoRec())) return FALSE;
-
-#ifdef XF86DRI
- if (info->directRenderingEnabled)
- R128CCEAccelInit(pScrn, a);
- else
-#endif
- R128MMIOAccelInit(pScrn, a);
-
- R128EngineInit(pScrn);
- return XAAInit(pScreen, a);
-}
diff --git a/src/r128_common.h b/src/r128_common.h
deleted file mode 100644
index b60efe92..00000000
--- a/src/r128_common.h
+++ /dev/null
@@ -1,169 +0,0 @@
-/* r128_common.h -- common header definitions for R128 2D/3D/DRM suite
- * Created: Sun Apr 9 18:16:28 2000 by kevin@precisioninsight.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Author:
- * Gareth Hughes <gareth@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- *
- * Converted to common header format:
- * Jens Owen <jens@tungstengraphics.com>
- *
- */
-
-#ifndef _R128_COMMON_H_
-#define _R128_COMMON_H_
-
-#include <X11/Xmd.h>
-
-/*
- * WARNING: If you change any of these defines, make sure to change
- * the kernel include file as well (r128_drm.h)
- */
-
-/* Driver specific DRM command indices
- * NOTE: these are not OS specific, but they are driver specific
- */
-#define DRM_R128_INIT 0x00
-#define DRM_R128_CCE_START 0x01
-#define DRM_R128_CCE_STOP 0x02
-#define DRM_R128_CCE_RESET 0x03
-#define DRM_R128_CCE_IDLE 0x04
-#define DRM_R128_UNDEFINED1 0x05
-#define DRM_R128_RESET 0x06
-#define DRM_R128_SWAP 0x07
-#define DRM_R128_CLEAR 0x08
-#define DRM_R128_VERTEX 0x09
-#define DRM_R128_INDICES 0x0a
-#define DRM_R128_BLIT 0x0b
-#define DRM_R128_DEPTH 0x0c
-#define DRM_R128_STIPPLE 0x0d
-#define DRM_R128_UNDEFINED2 0x0e
-#define DRM_R128_INDIRECT 0x0f
-#define DRM_R128_FULLSCREEN 0x10
-#define DRM_R128_CLEAR2 0x11
-#define DRM_R128_GETPARAM 0x12
-#define DRM_R128_FLIP 0x13
-
-#define DRM_R128_FRONT_BUFFER 0x1
-#define DRM_R128_BACK_BUFFER 0x2
-#define DRM_R128_DEPTH_BUFFER 0x4
-
-typedef struct {
- enum {
- DRM_R128_INIT_CCE = 0x01,
- DRM_R128_CLEANUP_CCE = 0x02
- } func;
- unsigned long sarea_priv_offset;
- int is_pci;
- int cce_mode;
- int cce_secure; /* FIXME: Deprecated, we should remove this */
- int ring_size;
- int usec_timeout;
-
- unsigned int fb_bpp;
- unsigned int front_offset, front_pitch;
- unsigned int back_offset, back_pitch;
- unsigned int depth_bpp;
- unsigned int depth_offset, depth_pitch;
- unsigned int span_offset;
-
- unsigned long fb_offset;
- unsigned long mmio_offset;
- unsigned long ring_offset;
- unsigned long ring_rptr_offset;
- unsigned long buffers_offset;
- unsigned long agp_textures_offset;
-} drmR128Init;
-
-typedef struct {
- int flush;
- int idle;
-} drmR128CCEStop;
-
-typedef struct {
- int idx;
- int start;
- int end;
- int discard;
-} drmR128Indirect;
-
-typedef struct {
- int idx;
- int pitch;
- int offset;
- int format;
- unsigned short x, y;
- unsigned short width, height;
-} drmR128Blit;
-
-typedef struct {
- enum {
- DRM_R128_WRITE_SPAN = 0x01,
- DRM_R128_WRITE_PIXELS = 0x02,
- DRM_R128_READ_SPAN = 0x03,
- DRM_R128_READ_PIXELS = 0x04
- } func;
- int n;
- int *x;
- int *y;
- unsigned int *buffer;
- unsigned char *mask;
-} drmR128Depth;
-
-typedef struct {
- int prim;
- int idx; /* Index of vertex buffer */
- int count; /* Number of vertices in buffer */
- int discard; /* Client finished with buffer? */
-} drmR128Vertex;
-
-typedef struct {
- unsigned int *mask;
-} drmR128Stipple;
-
-typedef struct {
- unsigned int flags;
- unsigned int clear_color;
- unsigned int clear_depth;
- unsigned int color_mask;
- unsigned int depth_mask;
-} drmR128Clear;
-
-typedef struct {
- enum {
- DRM_R128_INIT_FULLSCREEN = 0x01,
- DRM_R128_CLEANUP_FULLSCREEN = 0x02
- } func;
-} drmR128Fullscreen;
-
-typedef struct drm_r128_getparam {
- int param;
- int *value;
-} drmR128GetParam;
-
-#define R128_PARAM_IRQ_NR 1
-
-#endif
diff --git a/src/r128_cursor.c b/src/r128_cursor.c
deleted file mode 100644
index 83212843..00000000
--- a/src/r128_cursor.c
+++ /dev/null
@@ -1,311 +0,0 @@
-/*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
- * Precision Insight, Inc., Cedar Park, Texas, and
- * VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
- * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/*
- * Authors:
- * Rickard E. Faith <faith@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- *
- * References:
- *
- * RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical
- * Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April
- * 1999.
- *
- * RAGE 128 Software Development Manual (Technical Reference Manual P/N
- * SDK-G04000 Rev. 0.01), ATI Technologies: June 1999.
- *
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
- /* Driver data structures */
-#include "r128.h"
-#include "r128_reg.h"
-
- /* X and server generic header files */
-#include "xf86.h"
-
-#if X_BYTE_ORDER == X_BIG_ENDIAN
-#define P_SWAP32( a , b ) \
- ((char *)a)[0] = ((char *)b)[3]; \
- ((char *)a)[1] = ((char *)b)[2]; \
- ((char *)a)[2] = ((char *)b)[1]; \
- ((char *)a)[3] = ((char *)b)[0]
-
-#define P_SWAP16( a , b ) \
- ((char *)a)[0] = ((char *)b)[1]; \
- ((char *)a)[1] = ((char *)b)[0]; \
- ((char *)a)[2] = ((char *)b)[3]; \
- ((char *)a)[3] = ((char *)b)[2]
-#endif
-
-
-/* Set cursor foreground and background colors. */
-static void R128SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- if(info->IsSecondary)
- {
- OUTREG(R128_CUR2_CLR0, bg);
- OUTREG(R128_CUR2_CLR1, fg);
- }
- else
- {
- OUTREG(R128_CUR_CLR0, bg);
- OUTREG(R128_CUR_CLR1, fg);
- }
-}
-
-/* Set cursor position to (x,y) with offset into cursor bitmap at
- (xorigin,yorigin). */
-static void R128SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- xf86CursorInfoPtr cursor = info->cursor;
- int xorigin = 0;
- int yorigin = 0;
- int total_y = pScrn->frameY1 - pScrn->frameY0;
-
- if (x < 0) xorigin = -x;
- if (y < 0) yorigin = -y;
- if (y > total_y) y = total_y;
- if (info->Flags & V_DBLSCAN) y *= 2;
- if (xorigin >= cursor->MaxWidth) xorigin = cursor->MaxWidth - 1;
- if (yorigin >= cursor->MaxHeight) yorigin = cursor->MaxHeight - 1;
-
- if(!info->IsSecondary)
- {
- OUTREG(R128_CUR_HORZ_VERT_OFF, R128_CUR_LOCK | (xorigin << 16) | yorigin);
- OUTREG(R128_CUR_HORZ_VERT_POSN, (R128_CUR_LOCK
- | ((xorigin ? 0 : x) << 16)
- | (yorigin ? 0 : y)));
- OUTREG(R128_CUR_OFFSET, info->cursor_start + yorigin * 16);
- }
- else
- {
- OUTREG(R128_CUR2_HORZ_VERT_OFF, (R128_CUR2_LOCK
- | (xorigin << 16)
- | yorigin));
- OUTREG(R128_CUR2_HORZ_VERT_POSN, (R128_CUR2_LOCK
- | ((xorigin ? 0 : x) << 16)
- | (yorigin ? 0 : y)));
- OUTREG(R128_CUR2_OFFSET,
- info->cursor_start + pScrn->fbOffset + yorigin * 16);
- }
-}
-
-/* Copy cursor image from `image' to video memory. R128SetCursorPosition
- will be called after this, so we can ignore xorigin and yorigin. */
-static void R128LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *image)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- CARD32 *s = (pointer)image;
- CARD32 *d = (pointer)((CARD8*)info->FB + info->cursor_start);
- int y;
- CARD32 save;
-
- if(!info->IsSecondary)
- {
- save = INREG(R128_CRTC_GEN_CNTL);
- OUTREG(R128_CRTC_GEN_CNTL, save & (CARD32)~R128_CRTC_CUR_EN);
- }
- else
- {
- save = INREG(R128_CRTC2_GEN_CNTL);
- OUTREG(R128_CRTC2_GEN_CNTL, save & (CARD32)~R128_CRTC2_CUR_EN);
- }
-
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- switch(info->CurrentLayout.pixel_bytes) {
- case 4:
- case 3:
- for (y = 0; y < 64; y++) {
- P_SWAP32(d,s);
- d++; s++;
- P_SWAP32(d,s);
- d++; s++;
- P_SWAP32(d,s);
- d++; s++;
- P_SWAP32(d,s);
- d++; s++;
- }
- break;
- case 2:
- for (y = 0; y < 64; y++) {
- P_SWAP16(d,s);
- d++; s++;
- P_SWAP16(d,s);
- d++; s++;
- P_SWAP16(d,s);
- d++; s++;
- P_SWAP16(d,s);
- d++; s++;
- }
- break;
- default:
- for (y = 0; y < 64; y++) {
- *d++ = *s++;
- *d++ = *s++;
- *d++ = *s++;
- *d++ = *s++;
- }
- }
-#else
- for (y = 0; y < 64; y++) {
- *d++ = *s++;
- *d++ = *s++;
- *d++ = *s++;
- *d++ = *s++;
- }
-#endif
-
- /* Set the area after the cursor to be all transparent so that we
- won't display corrupted cursors on the screen */
- for (y = 0; y < 64; y++) {
- *d++ = 0xffffffff; /* The AND bits */
- *d++ = 0xffffffff;
- *d++ = 0x00000000; /* The XOR bits */
- *d++ = 0x00000000;
- }
-
-
- if(!info->IsSecondary)
- OUTREG(R128_CRTC_GEN_CNTL, save);
- else
- OUTREG(R128_CRTC2_GEN_CNTL, save);
-
-}
-
-/* Hide hardware cursor. */
-static void R128HideCursor(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- if(info->IsSecondary)
- OUTREGP(R128_CRTC2_GEN_CNTL, 0, ~R128_CRTC2_CUR_EN);
- else
- OUTREGP(R128_CRTC_GEN_CNTL, 0, ~R128_CRTC_CUR_EN);
-}
-
-/* Show hardware cursor. */
-static void R128ShowCursor(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- if(info->IsSecondary)
- {
- OUTREGP(R128_CRTC2_GEN_CNTL, R128_CRTC2_CUR_EN,
- ~R128_CRTC2_CUR_EN);
- }
- else
- {
- OUTREGP(R128_CRTC_GEN_CNTL, R128_CRTC_CUR_EN, ~R128_CRTC_CUR_EN);
- }
-}
-
-/* Determine if hardware cursor is in use. */
-static Bool R128UseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
-
- return info->cursor_start ? TRUE : FALSE;
-}
-
-/* Initialize hardware cursor support. */
-Bool R128CursorInit(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- xf86CursorInfoPtr cursor;
- FBAreaPtr fbarea;
- int width;
- int height;
- int size;
-
-
- if (!(cursor = info->cursor = xf86CreateCursorInfoRec())) return FALSE;
-
- cursor->MaxWidth = 64;
- cursor->MaxHeight = 64;
- cursor->Flags = (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP
- | HARDWARE_CURSOR_SHOW_TRANSPARENT
- | HARDWARE_CURSOR_UPDATE_UNHIDDEN
-#if X_BYTE_ORDER == X_LITTLE_ENDIAN
- | HARDWARE_CURSOR_BIT_ORDER_MSBFIRST
-#endif
- | HARDWARE_CURSOR_INVERT_MASK
- | HARDWARE_CURSOR_AND_SOURCE_WITH_MASK
- | HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64
- | HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK);
-
- cursor->SetCursorColors = R128SetCursorColors;
- cursor->SetCursorPosition = R128SetCursorPosition;
- cursor->LoadCursorImage = R128LoadCursorImage;
- cursor->HideCursor = R128HideCursor;
- cursor->ShowCursor = R128ShowCursor;
- cursor->UseHWCursor = R128UseHWCursor;
-
- size = (cursor->MaxWidth/4) * cursor->MaxHeight;
- width = pScrn->displayWidth;
- height = (size*2 + 1023) / pScrn->displayWidth;
- fbarea = xf86AllocateOffscreenArea(pScreen,
- width,
- height,
- 16,
- NULL,
- NULL,
- NULL);
-
- if (!fbarea) {
- info->cursor_start = 0;
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Hardware cursor disabled"
- " due to insufficient offscreen memory\n");
- } else {
- info->cursor_start = R128_ALIGN((fbarea->box.x1
- + width * fbarea->box.y1)
- * info->CurrentLayout.pixel_bytes, 16);
- info->cursor_end = info->cursor_start + size;
- }
-
- R128TRACE(("R128CursorInit (0x%08x-0x%08x)\n",
- info->cursor_start, info->cursor_end));
-
- return xf86InitCursor(pScreen, cursor);
-}
diff --git a/src/r128_dga.c b/src/r128_dga.c
deleted file mode 100644
index 7dd03aaf..00000000
--- a/src/r128_dga.c
+++ /dev/null
@@ -1,402 +0,0 @@
-/*
- * Authors:
- * Ove Kåven <ovek@transgaming.com>,
- * borrowing some code from the Chips and MGA drivers.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <string.h>
-
- /* Driver data structures */
-#include "r128.h"
-#include "r128_probe.h"
-
- /* X and server generic header files */
-#include "xf86.h"
-
- /* DGA support */
-#include "dgaproc.h"
-
-#ifdef XF86DRI
-#include "r128_common.h"
-#endif
-
-static Bool R128_OpenFramebuffer(ScrnInfoPtr, char **, unsigned char **,
- int *, int *, int *);
-static Bool R128_SetMode(ScrnInfoPtr, DGAModePtr);
-static int R128_GetViewport(ScrnInfoPtr);
-static void R128_SetViewport(ScrnInfoPtr, int, int, int);
-static void R128_FillRect(ScrnInfoPtr, int, int, int, int, unsigned long);
-static void R128_BlitRect(ScrnInfoPtr, int, int, int, int, int, int);
-static void R128_BlitTransRect(ScrnInfoPtr, int, int, int, int, int, int,
- unsigned long);
-
-static DGAModePtr R128SetupDGAMode(ScrnInfoPtr pScrn,
- DGAModePtr modes,
- int *num,
- int bitsPerPixel,
- int depth,
- Bool pixmap,
- int secondPitch,
- unsigned long red,
- unsigned long green,
- unsigned long blue,
- short visualClass)
-{
- R128InfoPtr info = R128PTR(pScrn);
- DGAModePtr newmodes = NULL;
- DGAModePtr currentMode;
- DisplayModePtr pMode;
- DisplayModePtr firstMode;
- unsigned int size;
- int pitch;
- int Bpp = bitsPerPixel >> 3;
-
-SECOND_PASS:
-
- pMode = firstMode = pScrn->modes;
-
- while (1) {
- pitch = pScrn->displayWidth;
- size = pitch * Bpp * pMode->VDisplay;
-
- if ((!secondPitch || (pitch != secondPitch)) &&
- (size <= info->FbMapSize)) {
-
- if (secondPitch)
- pitch = secondPitch;
-
- if (!(newmodes = xrealloc(modes, (*num + 1) * sizeof(DGAModeRec))))
- break;
-
- modes = newmodes;
- currentMode = modes + *num;
-
- currentMode->mode = pMode;
- currentMode->flags = DGA_CONCURRENT_ACCESS;
-
- if (pixmap)
- currentMode->flags |= DGA_PIXMAP_AVAILABLE;
-
- if (info->accel) {
- if (info->accel->SetupForSolidFill &&
- info->accel->SubsequentSolidFillRect)
- currentMode->flags |= DGA_FILL_RECT;
- if (info->accel->SetupForScreenToScreenCopy &&
- info->accel->SubsequentScreenToScreenCopy)
- currentMode->flags |= DGA_BLIT_RECT | DGA_BLIT_RECT_TRANS;
- if (currentMode->flags &
- (DGA_PIXMAP_AVAILABLE | DGA_FILL_RECT |
- DGA_BLIT_RECT | DGA_BLIT_RECT_TRANS))
- currentMode->flags &= ~DGA_CONCURRENT_ACCESS;
- }
- if (pMode->Flags & V_DBLSCAN)
- currentMode->flags |= DGA_DOUBLESCAN;
- if (pMode->Flags & V_INTERLACE)
- currentMode->flags |= DGA_INTERLACED;
-
- currentMode->byteOrder = pScrn->imageByteOrder;
- currentMode->depth = depth;
- currentMode->bitsPerPixel = bitsPerPixel;
- currentMode->red_mask = red;
- currentMode->green_mask = green;
- currentMode->blue_mask = blue;
- currentMode->visualClass = visualClass;
- currentMode->viewportWidth = pMode->HDisplay;
- currentMode->viewportHeight = pMode->VDisplay;
- currentMode->xViewportStep = 8;
- currentMode->yViewportStep = 1;
- currentMode->viewportFlags = DGA_FLIP_RETRACE;
- currentMode->offset = 0;
- currentMode->address = (unsigned char*)info->LinearAddr;
- currentMode->bytesPerScanline = pitch * Bpp;
- currentMode->imageWidth = pitch;
- currentMode->imageHeight = (info->FbMapSize
- / currentMode->bytesPerScanline);
- currentMode->pixmapWidth = currentMode->imageWidth;
- currentMode->pixmapHeight = currentMode->imageHeight;
- currentMode->maxViewportX = (currentMode->imageWidth
- - currentMode->viewportWidth);
- /* this might need to get clamped to some maximum */
- currentMode->maxViewportY = (currentMode->imageHeight
- - currentMode->viewportHeight);
- (*num)++;
- }
-
- pMode = pMode->next;
- if (pMode == firstMode)
- break;
- }
-
- if (secondPitch) {
- secondPitch = 0;
- goto SECOND_PASS;
- }
-
- return modes;
-}
-
-Bool
-R128DGAInit(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- DGAModePtr modes = NULL;
- int num = 0;
-
- /* 8 */
- modes = R128SetupDGAMode (pScrn, modes, &num, 8, 8,
- (pScrn->bitsPerPixel == 8),
- (pScrn->bitsPerPixel != 8) ? 0 : pScrn->displayWidth,
- 0, 0, 0, PseudoColor);
-
- /* 15 */
- modes = R128SetupDGAMode (pScrn, modes, &num, 16, 15,
- (pScrn->bitsPerPixel == 16),
- (pScrn->depth != 15) ? 0 : pScrn->displayWidth,
- 0x7c00, 0x03e0, 0x001f, TrueColor);
-
- modes = R128SetupDGAMode (pScrn, modes, &num, 16, 15,
- (pScrn->bitsPerPixel == 16),
- (pScrn->depth != 15) ? 0 : pScrn->displayWidth,
- 0x7c00, 0x03e0, 0x001f, DirectColor);
-
- /* 16 */
- modes = R128SetupDGAMode (pScrn, modes, &num, 16, 16,
- (pScrn->bitsPerPixel == 16),
- (pScrn->depth != 16) ? 0 : pScrn->displayWidth,
- 0xf800, 0x07e0, 0x001f, TrueColor);
-
- modes = R128SetupDGAMode (pScrn, modes, &num, 16, 16,
- (pScrn->bitsPerPixel == 16),
- (pScrn->depth != 16) ? 0 : pScrn->displayWidth,
- 0xf800, 0x07e0, 0x001f, DirectColor);
-
- /* 24 */
- modes = R128SetupDGAMode (pScrn, modes, &num, 24, 24,
- (pScrn->bitsPerPixel == 24),
- (pScrn->bitsPerPixel != 24) ? 0 : pScrn->displayWidth,
- 0xff0000, 0x00ff00, 0x0000ff, TrueColor);
-
- modes = R128SetupDGAMode (pScrn, modes, &num, 24, 24,
- (pScrn->bitsPerPixel == 24),
- (pScrn->bitsPerPixel != 24) ? 0 : pScrn->displayWidth,
- 0xff0000, 0x00ff00, 0x0000ff, DirectColor);
-
- /* 32 */
- modes = R128SetupDGAMode (pScrn, modes, &num, 32, 24,
- (pScrn->bitsPerPixel == 32),
- (pScrn->bitsPerPixel != 32) ? 0 : pScrn->displayWidth,
- 0xff0000, 0x00ff00, 0x0000ff, TrueColor);
-
- modes = R128SetupDGAMode (pScrn, modes, &num, 32, 24,
- (pScrn->bitsPerPixel == 32),
- (pScrn->bitsPerPixel != 32) ? 0 : pScrn->displayWidth,
- 0xff0000, 0x00ff00, 0x0000ff, DirectColor);
-
- info->numDGAModes = num;
- info->DGAModes = modes;
-
- info->DGAFuncs.OpenFramebuffer = R128_OpenFramebuffer;
- info->DGAFuncs.CloseFramebuffer = NULL;
- info->DGAFuncs.SetMode = R128_SetMode;
- info->DGAFuncs.SetViewport = R128_SetViewport;
- info->DGAFuncs.GetViewport = R128_GetViewport;
-
- info->DGAFuncs.Sync = NULL;
- info->DGAFuncs.FillRect = NULL;
- info->DGAFuncs.BlitRect = NULL;
- info->DGAFuncs.BlitTransRect = NULL;
-
- if (info->accel) {
- info->DGAFuncs.Sync = info->accel->Sync;
- if (info->accel->SetupForSolidFill &&
- info->accel->SubsequentSolidFillRect)
- info->DGAFuncs.FillRect = R128_FillRect;
- if (info->accel->SetupForScreenToScreenCopy &&
- info->accel->SubsequentScreenToScreenCopy) {
- info->DGAFuncs.BlitRect = R128_BlitRect;
- info->DGAFuncs.BlitTransRect = R128_BlitTransRect;
- }
- }
-
- return DGAInit(pScreen, &(info->DGAFuncs), modes, num);
-}
-
-
-static Bool
-R128_SetMode(
- ScrnInfoPtr pScrn,
- DGAModePtr pMode
-){
- static R128FBLayout SavedLayouts[MAXSCREENS];
- int indx = pScrn->pScreen->myNum;
- R128InfoPtr info = R128PTR(pScrn);
-
- if(!pMode) { /* restore the original mode */
- /* put the ScreenParameters back */
- if(info->DGAactive)
- memcpy(&info->CurrentLayout, &SavedLayouts[indx], sizeof(R128FBLayout));
-
- pScrn->currentMode = info->CurrentLayout.mode;
-
- pScrn->SwitchMode(indx, pScrn->currentMode, 0);
-#ifdef XF86DRI
- if (info->directRenderingEnabled) {
- R128CCE_STOP(pScrn, info);
- }
-#endif
- if (info->accelOn)
- R128EngineInit(pScrn);
-#ifdef XF86DRI
- if (info->directRenderingEnabled) {
- R128CCE_START(pScrn, info);
- }
-#endif
- pScrn->AdjustFrame(indx, 0, 0, 0);
- info->DGAactive = FALSE;
- } else {
- if(!info->DGAactive) { /* save the old parameters */
- memcpy(&SavedLayouts[indx], &info->CurrentLayout, sizeof(R128FBLayout));
- info->DGAactive = TRUE;
- }
-
- info->CurrentLayout.bitsPerPixel = pMode->bitsPerPixel;
- info->CurrentLayout.depth = pMode->depth;
- info->CurrentLayout.displayWidth = pMode->bytesPerScanline /
- (pMode->bitsPerPixel >> 3);
- info->CurrentLayout.pixel_bytes = pMode->bitsPerPixel / 8;
- info->CurrentLayout.pixel_code = (pMode->bitsPerPixel != 16
- ? pMode->bitsPerPixel
- : pMode->depth);
- /* R128ModeInit() will set the mode field */
-
- pScrn->SwitchMode(indx, pMode->mode, 0);
-
-#ifdef XF86DRI
- if (info->directRenderingEnabled) {
- R128CCE_STOP(pScrn, info);
- }
-#endif
- if (info->accelOn)
- R128EngineInit(pScrn);
-#ifdef XF86DRI
- if (info->directRenderingEnabled) {
- R128CCE_START(pScrn, info);
- }
-#endif
- }
-
- return TRUE;
-}
-
-
-
-static int
-R128_GetViewport(
- ScrnInfoPtr pScrn
-){
- R128InfoPtr info = R128PTR(pScrn);
-
- return info->DGAViewportStatus;
-}
-
-
-static void
-R128_SetViewport(
- ScrnInfoPtr pScrn,
- int x, int y,
- int flags
-){
- R128InfoPtr info = R128PTR(pScrn);
-
- pScrn->AdjustFrame(pScrn->pScreen->myNum, x, y, flags);
- info->DGAViewportStatus = 0; /* FIXME */
-}
-
-
-static void
-R128_FillRect (
- ScrnInfoPtr pScrn,
- int x, int y, int w, int h,
- unsigned long color
-){
- R128InfoPtr info = R128PTR(pScrn);
-
- (*info->accel->SetupForSolidFill)(pScrn, color, GXcopy, (CARD32)(~0));
- (*info->accel->SubsequentSolidFillRect)(pScrn, x, y, w, h);
-
- if (pScrn->bitsPerPixel == info->CurrentLayout.bitsPerPixel)
- SET_SYNC_FLAG(info->accel);
-}
-
-static void
-R128_BlitRect(
- ScrnInfoPtr pScrn,
- int srcx, int srcy,
- int w, int h,
- int dstx, int dsty
-){
- R128InfoPtr info = R128PTR(pScrn);
- int xdir = ((srcx < dstx) && (srcy == dsty)) ? -1 : 1;
- int ydir = (srcy < dsty) ? -1 : 1;
-
- (*info->accel->SetupForScreenToScreenCopy)(
- pScrn, xdir, ydir, GXcopy, (CARD32)(~0), -1);
- (*info->accel->SubsequentScreenToScreenCopy)(
- pScrn, srcx, srcy, dstx, dsty, w, h);
-
- if (pScrn->bitsPerPixel == info->CurrentLayout.bitsPerPixel)
- SET_SYNC_FLAG(info->accel);
-}
-
-
-static void
-R128_BlitTransRect(
- ScrnInfoPtr pScrn,
- int srcx, int srcy,
- int w, int h,
- int dstx, int dsty,
- unsigned long color
-){
- R128InfoPtr info = R128PTR(pScrn);
- int xdir = ((srcx < dstx) && (srcy == dsty)) ? -1 : 1;
- int ydir = (srcy < dsty) ? -1 : 1;
-
- info->XAAForceTransBlit = TRUE;
-
- (*info->accel->SetupForScreenToScreenCopy)(
- pScrn, xdir, ydir, GXcopy, (CARD32)(~0), color);
-
- info->XAAForceTransBlit = FALSE;
-
- (*info->accel->SubsequentScreenToScreenCopy)(
- pScrn, srcx, srcy, dstx, dsty, w, h);
-
- if (pScrn->bitsPerPixel == info->CurrentLayout.bitsPerPixel)
- SET_SYNC_FLAG(info->accel);
-}
-
-
-static Bool
-R128_OpenFramebuffer(
- ScrnInfoPtr pScrn,
- char **name,
- unsigned char **mem,
- int *size,
- int *offset,
- int *flags
-){
- R128InfoPtr info = R128PTR(pScrn);
-
- *name = NULL; /* no special device */
- *mem = (unsigned char*)info->LinearAddr;
- *size = info->FbMapSize;
- *offset = 0;
- *flags = /* DGA_NEED_ROOT */ 0; /* don't need root, just /dev/mem access */
-
- return TRUE;
-}
diff --git a/src/r128_dri.c b/src/r128_dri.c
deleted file mode 100644
index 29277185..00000000
--- a/src/r128_dri.c
+++ /dev/null
@@ -1,1499 +0,0 @@
-/*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
- * Precision Insight, Inc., Cedar Park, Texas, and
- * VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
- * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <string.h>
-#include <stdio.h>
-
-/*
- * Authors:
- * Kevin E. Martin <martin@valinux.com>
- * Rickard E. Faith <faith@valinux.com>
- * Daryll Strauss <daryll@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
- /* Driver data structures */
-#include "r128.h"
-#include "r128_dri.h"
-#include "r128_common.h"
-#include "r128_reg.h"
-#include "r128_sarea.h"
-#include "r128_version.h"
-
- /* X and server generic header files */
-#include "xf86.h"
-#include "xf86PciInfo.h"
-#include "windowstr.h"
-
-#include "shadowfb.h"
- /* GLX/DRI/DRM definitions */
-#define _XF86DRI_SERVER_
-#include "GL/glxtokens.h"
-#include "sarea.h"
-
-static size_t r128_drm_page_size;
-
-static void R128DRITransitionTo2d(ScreenPtr pScreen);
-static void R128DRITransitionTo3d(ScreenPtr pScreen);
-static void R128DRITransitionMultiToSingle3d(ScreenPtr pScreen);
-static void R128DRITransitionSingleToMulti3d(ScreenPtr pScreen);
-
-static void R128DRIRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-
-/* Initialize the visual configs that are supported by the hardware.
- These are combined with the visual configs that the indirect
- rendering core supports, and the intersection is exported to the
- client. */
-static Bool R128InitVisualConfigs(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- int numConfigs = 0;
- __GLXvisualConfig *pConfigs = NULL;
- R128ConfigPrivPtr pR128Configs = NULL;
- R128ConfigPrivPtr *pR128ConfigPtrs = NULL;
- int i, accum, stencil, db;
-
- switch (info->CurrentLayout.pixel_code) {
- case 8: /* 8bpp mode is not support */
- case 15: /* FIXME */
- case 24: /* FIXME */
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[dri] R128DRIScreenInit failed (depth %d not supported). "
- "Disabling DRI.\n", info->CurrentLayout.pixel_code);
- return FALSE;
-
-#define R128_USE_ACCUM 1
-#define R128_USE_STENCIL 1
-#define R128_USE_DB 1
-
- case 16:
- numConfigs = 1;
- if (R128_USE_ACCUM) numConfigs *= 2;
- if (R128_USE_STENCIL) numConfigs *= 2;
- if (R128_USE_DB) numConfigs *= 2;
-
- if (!(pConfigs
- = (__GLXvisualConfig*)xcalloc(sizeof(__GLXvisualConfig),
- numConfigs))) {
- return FALSE;
- }
- if (!(pR128Configs
- = (R128ConfigPrivPtr)xcalloc(sizeof(R128ConfigPrivRec),
- numConfigs))) {
- xfree(pConfigs);
- return FALSE;
- }
- if (!(pR128ConfigPtrs
- = (R128ConfigPrivPtr*)xcalloc(sizeof(R128ConfigPrivPtr),
- numConfigs))) {
- xfree(pConfigs);
- xfree(pR128Configs);
- return FALSE;
- }
-
- i = 0;
- for (db = 0; db <= R128_USE_DB; db++) {
- for (accum = 0; accum <= R128_USE_ACCUM; accum++) {
- for (stencil = 0; stencil <= R128_USE_STENCIL; stencil++) {
- pR128ConfigPtrs[i] = &pR128Configs[i];
-
- pConfigs[i].vid = (VisualID)(-1);
- pConfigs[i].class = -1;
- pConfigs[i].rgba = TRUE;
- pConfigs[i].redSize = 5;
- pConfigs[i].greenSize = 6;
- pConfigs[i].blueSize = 5;
- pConfigs[i].alphaSize = 0;
- pConfigs[i].redMask = 0x0000F800;
- pConfigs[i].greenMask = 0x000007E0;
- pConfigs[i].blueMask = 0x0000001F;
- pConfigs[i].alphaMask = 0x00000000;
- if (accum) { /* Simulated in software */
- pConfigs[i].accumRedSize = 16;
- pConfigs[i].accumGreenSize = 16;
- pConfigs[i].accumBlueSize = 16;
- pConfigs[i].accumAlphaSize = 0;
- } else {
- pConfigs[i].accumRedSize = 0;
- pConfigs[i].accumGreenSize = 0;
- pConfigs[i].accumBlueSize = 0;
- pConfigs[i].accumAlphaSize = 0;
- }
- if (db)
- pConfigs[i].doubleBuffer = TRUE;
- else
- pConfigs[i].doubleBuffer = FALSE;
- pConfigs[i].stereo = FALSE;
- pConfigs[i].bufferSize = 16;
- pConfigs[i].depthSize = 16;
- if (stencil)
- pConfigs[i].stencilSize = 8; /* Simulated in software */
- else
- pConfigs[i].stencilSize = 0;
- pConfigs[i].auxBuffers = 0;
- pConfigs[i].level = 0;
- if (accum || stencil) {
- pConfigs[i].visualRating = GLX_SLOW_CONFIG;
- } else {
- pConfigs[i].visualRating = GLX_NONE;
- }
- pConfigs[i].transparentPixel = GLX_NONE;
- pConfigs[i].transparentRed = 0;
- pConfigs[i].transparentGreen = 0;
- pConfigs[i].transparentBlue = 0;
- pConfigs[i].transparentAlpha = 0;
- pConfigs[i].transparentIndex = 0;
- i++;
- }
- }
- }
- break;
-
- case 32:
- numConfigs = 1;
- if (R128_USE_ACCUM) numConfigs *= 2;
- if (R128_USE_STENCIL) numConfigs *= 2;
- if (R128_USE_DB) numConfigs *= 2;
-
- if (!(pConfigs
- = (__GLXvisualConfig*)xcalloc(sizeof(__GLXvisualConfig),
- numConfigs))) {
- return FALSE;
- }
- if (!(pR128Configs
- = (R128ConfigPrivPtr)xcalloc(sizeof(R128ConfigPrivRec),
- numConfigs))) {
- xfree(pConfigs);
- return FALSE;
- }
- if (!(pR128ConfigPtrs
- = (R128ConfigPrivPtr*)xcalloc(sizeof(R128ConfigPrivPtr),
- numConfigs))) {
- xfree(pConfigs);
- xfree(pR128Configs);
- return FALSE;
- }
-
- i = 0;
- for (db = 0; db <= R128_USE_DB; db++) {
- for (accum = 0; accum <= R128_USE_ACCUM; accum++) {
- for (stencil = 0; stencil <= R128_USE_STENCIL; stencil++) {
- pR128ConfigPtrs[i] = &pR128Configs[i];
-
- pConfigs[i].vid = (VisualID)(-1);
- pConfigs[i].class = -1;
- pConfigs[i].rgba = TRUE;
- pConfigs[i].redSize = 8;
- pConfigs[i].greenSize = 8;
- pConfigs[i].blueSize = 8;
- pConfigs[i].alphaSize = 0;
- pConfigs[i].redMask = 0x00FF0000;
- pConfigs[i].greenMask = 0x0000FF00;
- pConfigs[i].blueMask = 0x000000FF;
- pConfigs[i].alphaMask = 0x00000000;
- if (accum) { /* Simulated in software */
- pConfigs[i].accumRedSize = 16;
- pConfigs[i].accumGreenSize = 16;
- pConfigs[i].accumBlueSize = 16;
- pConfigs[i].accumAlphaSize = 0;
- } else {
- pConfigs[i].accumRedSize = 0;
- pConfigs[i].accumGreenSize = 0;
- pConfigs[i].accumBlueSize = 0;
- pConfigs[i].accumAlphaSize = 0;
- }
- if (db)
- pConfigs[i].doubleBuffer = TRUE;
- else
- pConfigs[i].doubleBuffer = FALSE;
- pConfigs[i].stereo = FALSE;
- pConfigs[i].bufferSize = 24;
- if (stencil) {
- pConfigs[i].depthSize = 24;
- pConfigs[i].stencilSize = 8;
- } else {
- pConfigs[i].depthSize = 24;
- pConfigs[i].stencilSize = 0;
- }
- pConfigs[i].auxBuffers = 0;
- pConfigs[i].level = 0;
- if (accum) {
- pConfigs[i].visualRating = GLX_SLOW_CONFIG;
- } else {
- pConfigs[i].visualRating = GLX_NONE;
- }
- pConfigs[i].transparentPixel = GLX_NONE;
- pConfigs[i].transparentRed = 0;
- pConfigs[i].transparentGreen = 0;
- pConfigs[i].transparentBlue = 0;
- pConfigs[i].transparentAlpha = 0;
- pConfigs[i].transparentIndex = 0;
- i++;
- }
- }
- }
- break;
- }
-
- info->numVisualConfigs = numConfigs;
- info->pVisualConfigs = pConfigs;
- info->pVisualConfigsPriv = pR128Configs;
- GlxSetVisualConfigs(numConfigs, pConfigs, (void**)pR128ConfigPtrs);
- return TRUE;
-}
-
-/* Create the Rage 128-specific context information */
-static Bool R128CreateContext(ScreenPtr pScreen, VisualPtr visual,
- drm_context_t hwContext, void *pVisualConfigPriv,
- DRIContextType contextStore)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
-
- info->drmCtx = hwContext;
- return TRUE;
-}
-
-/* Destroy the Rage 128-specific context information */
-static void R128DestroyContext(ScreenPtr pScreen, drm_context_t hwContext,
- DRIContextType contextStore)
-{
- /* Nothing yet */
-}
-
-/* Called when the X server is woken up to allow the last client's
- context to be saved and the X server's context to be loaded. This is
- not necessary for the Rage 128 since the client detects when it's
- context is not currently loaded and then load's it itself. Since the
- registers to start and stop the CCE are privileged, only the X server
- can start/stop the engine. */
-static void R128EnterServer(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
-
- if (info->accel) info->accel->NeedToSync = TRUE;
-}
-
-/* Called when the X server goes to sleep to allow the X server's
- context to be saved and the last client's context to be loaded. This
- is not necessary for the Rage 128 since the client detects when it's
- context is not currently loaded and then load's it itself. Since the
- registers to start and stop the CCE are privileged, only the X server
- can start/stop the engine. */
-static void R128LeaveServer(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- if (!info->directRenderingEnabled) {
- /* Save all hardware scissors */
- info->sc_left = INREG(R128_SC_LEFT);
- info->sc_right = INREG(R128_SC_RIGHT);
- info->sc_top = INREG(R128_SC_TOP);
- info->sc_bottom = INREG(R128_SC_BOTTOM);
- info->aux_sc_cntl = INREG(R128_SC_BOTTOM);
- } else if (info->CCEInUse) {
- R128CCEReleaseIndirect(pScrn);
-
- info->CCEInUse = FALSE;
- }
-}
-
-/* Contexts can be swapped by the X server if necessary. This callback
- is currently only used to perform any functions necessary when
- entering or leaving the X server, and in the future might not be
- necessary. */
-static void R128DRISwapContext(ScreenPtr pScreen, DRISyncType syncType,
- DRIContextType oldContextType, void *oldContext,
- DRIContextType newContextType, void *newContext)
-{
- if ((syncType==DRI_3D_SYNC) && (oldContextType==DRI_2D_CONTEXT) &&
- (newContextType==DRI_2D_CONTEXT)) { /* Entering from Wakeup */
- R128EnterServer(pScreen);
- }
- if ((syncType==DRI_2D_SYNC) && (oldContextType==DRI_NO_CONTEXT) &&
- (newContextType==DRI_2D_CONTEXT)) { /* Exiting from Block Handler */
- R128LeaveServer(pScreen);
- }
-}
-
-/* Initialize the state of the back and depth buffers. */
-static void R128DRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 indx)
-{
- /* FIXME: This routine needs to have acceleration turned on */
- ScreenPtr pScreen = pWin->drawable.pScreen;
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- BoxPtr pbox, pboxSave;
- int nbox, nboxSave;
- int depth;
-
- /* FIXME: Use accel when CCE 2D code is written
- * EA: What is this code kept for? Radeon doesn't have it and
- * has a comment: "There's no need for the 2d driver to be clearing
- * buffers for the 3d client. It knows how to do that on its own."
- */
- if (info->directRenderingEnabled)
- return;
-
- /* FIXME: This should be based on the __GLXvisualConfig info */
- switch (pScrn->bitsPerPixel) {
- case 8: depth = 0x000000ff; break;
- case 16: depth = 0x0000ffff; break;
- case 24: depth = 0x00ffffff; break;
- case 32: depth = 0xffffffff; break;
- default: depth = 0x00000000; break;
- }
-
- /* FIXME: Copy XAAPaintWindow() and use REGION_TRANSLATE() */
- /* FIXME: Only initialize the back and depth buffers for contexts
- that request them */
-
- pboxSave = pbox = REGION_RECTS(prgn);
- nboxSave = nbox = REGION_NUM_RECTS(prgn);
-
- (*info->accel->SetupForSolidFill)(pScrn, 0, GXcopy, (CARD32)(-1));
- for (; nbox; nbox--, pbox++) {
- (*info->accel->SubsequentSolidFillRect)(pScrn,
- pbox->x1 + info->fbX,
- pbox->y1 + info->fbY,
- pbox->x2 - pbox->x1,
- pbox->y2 - pbox->y1);
- (*info->accel->SubsequentSolidFillRect)(pScrn,
- pbox->x1 + info->backX,
- pbox->y1 + info->backY,
- pbox->x2 - pbox->x1,
- pbox->y2 - pbox->y1);
- }
-
- pbox = pboxSave;
- nbox = nboxSave;
-
- /* FIXME: this needs to consider depth tiling. */
- (*info->accel->SetupForSolidFill)(pScrn, depth, GXcopy, (CARD32)(-1));
- for (; nbox; nbox--, pbox++)
- (*info->accel->SubsequentSolidFillRect)(pScrn,
- pbox->x1 + info->depthX,
- pbox->y1 + info->depthY,
- pbox->x2 - pbox->x1,
- pbox->y2 - pbox->y1);
-
- info->accel->NeedToSync = TRUE;
-}
-
-/* Copy the back and depth buffers when the X server moves a window. */
-static void R128DRIMoveBuffers(WindowPtr pWin, DDXPointRec ptOldOrg,
- RegionPtr prgnSrc, CARD32 indx)
-{
- ScreenPtr pScreen = pWin->drawable.pScreen;
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
-
- /* FIXME: This routine needs to have acceleration turned on */
- /* FIXME: Copy XAACopyWindow() and use REGION_TRANSLATE() */
- /* FIXME: Only initialize the back and depth buffers for contexts
- that request them */
-
- /* FIXME: Use accel when CCE 2D code is written */
- if (info->directRenderingEnabled)
- return;
-}
-
-/* Initialize the AGP state. Request memory for use in AGP space, and
- initialize the Rage 128 registers to point to that memory. */
-static Bool R128DRIAgpInit(R128InfoPtr info, ScreenPtr pScreen)
-{
- unsigned char *R128MMIO = info->MMIO;
- unsigned long mode;
- unsigned int vendor, device;
- int ret;
- unsigned long cntl, chunk;
- int s, l;
- int flags;
- unsigned long agpBase;
-
- if (drmAgpAcquire(info->drmFD) < 0) {
- xf86DrvMsg(pScreen->myNum, X_WARNING, "[agp] AGP not available\n");
- return FALSE;
- }
-
- /* Modify the mode if the default mode is
- not appropriate for this particular
- combination of graphics card and AGP
- chipset. */
-
- mode = drmAgpGetMode(info->drmFD); /* Default mode */
- vendor = drmAgpVendorId(info->drmFD);
- device = drmAgpDeviceId(info->drmFD);
-
- mode &= ~R128_AGP_MODE_MASK;
- switch (info->agpMode) {
- case 4: mode |= R128_AGP_4X_MODE;
- case 2: mode |= R128_AGP_2X_MODE;
- case 1: default: mode |= R128_AGP_1X_MODE;
- }
-
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n",
- mode, vendor, device,
- PCI_DEV_VENDOR_ID(info->PciInfo),
- PCI_DEV_DEVICE_ID(info->PciInfo));
-
- if (drmAgpEnable(info->drmFD, mode) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] AGP not enabled\n");
- drmAgpRelease(info->drmFD);
- return FALSE;
- }
-
- info->agpOffset = 0;
-
- if ((ret = drmAgpAlloc(info->drmFD, info->agpSize*1024*1024, 0, NULL,
- &info->agpMemHandle)) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Out of memory (%d)\n", ret);
- drmAgpRelease(info->drmFD);
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[agp] %d kB allocated with handle 0x%08x\n",
- info->agpSize*1024, info->agpMemHandle);
-
- if (drmAgpBind(info->drmFD, info->agpMemHandle, info->agpOffset) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not bind\n");
- drmAgpFree(info->drmFD, info->agpMemHandle);
- drmAgpRelease(info->drmFD);
- return FALSE;
- }
-
- /* Initialize the CCE ring buffer data */
- info->ringStart = info->agpOffset;
- info->ringMapSize = info->ringSize*1024*1024 + r128_drm_page_size;
- info->ringSizeLog2QW = R128MinBits(info->ringSize*1024*1024/8) - 1;
-
- info->ringReadOffset = info->ringStart + info->ringMapSize;
- info->ringReadMapSize = r128_drm_page_size;
-
- /* Reserve space for vertex/indirect buffers */
- info->bufStart = info->ringReadOffset + info->ringReadMapSize;
- info->bufMapSize = info->bufSize*1024*1024;
-
- /* Reserve the rest for AGP textures */
- info->agpTexStart = info->bufStart + info->bufMapSize;
- s = (info->agpSize*1024*1024 - info->agpTexStart);
- l = R128MinBits((s-1) / R128_NR_TEX_REGIONS);
- if (l < R128_LOG_TEX_GRANULARITY) l = R128_LOG_TEX_GRANULARITY;
- info->agpTexMapSize = (s >> l) << l;
- info->log2AGPTexGran = l;
-
- if (info->CCESecure) flags = DRM_READ_ONLY;
- else flags = 0;
-
- if (drmAddMap(info->drmFD, info->ringStart, info->ringMapSize,
- DRM_AGP, flags, &info->ringHandle) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[agp] Could not add ring mapping\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[agp] ring handle = 0x%08x\n", info->ringHandle);
-
- if (drmMap(info->drmFD, info->ringHandle, info->ringMapSize,
- &info->ring) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not map ring\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[agp] Ring mapped at 0x%08lx\n",
- (unsigned long)info->ring);
-
- if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize,
- DRM_AGP, flags, &info->ringReadPtrHandle) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[agp] Could not add ring read ptr mapping\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[agp] ring read ptr handle = 0x%08x\n",
- info->ringReadPtrHandle);
-
- if (drmMap(info->drmFD, info->ringReadPtrHandle, info->ringReadMapSize,
- &info->ringReadPtr) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[agp] Could not map ring read ptr\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[agp] Ring read ptr mapped at 0x%08lx\n",
- (unsigned long)info->ringReadPtr);
-
- if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize,
- DRM_AGP, 0, &info->bufHandle) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[agp] Could not add vertex/indirect buffers mapping\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[agp] vertex/indirect buffers handle = 0x%08x\n",
- info->bufHandle);
-
- if (drmMap(info->drmFD, info->bufHandle, info->bufMapSize,
- &info->buf) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[agp] Could not map vertex/indirect buffers\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[agp] Vertex/indirect buffers mapped at 0x%08lx\n",
- (unsigned long)info->buf);
-
- if (drmAddMap(info->drmFD, info->agpTexStart, info->agpTexMapSize,
- DRM_AGP, 0, &info->agpTexHandle) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[agp] Could not add AGP texture map mapping\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[agp] AGP texture map handle = 0x%08x\n",
- info->agpTexHandle);
-
- if (drmMap(info->drmFD, info->agpTexHandle, info->agpTexMapSize,
- &info->agpTex) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[agp] Could not map AGP texture map\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[agp] AGP Texture map mapped at 0x%08lx\n",
- (unsigned long)info->agpTex);
-
- /* Initialize Rage 128's AGP registers */
- cntl = INREG(R128_AGP_CNTL);
- cntl &= ~R128_AGP_APER_SIZE_MASK;
- switch (info->agpSize) {
- case 256: cntl |= R128_AGP_APER_SIZE_256MB; break;
- case 128: cntl |= R128_AGP_APER_SIZE_128MB; break;
- case 64: cntl |= R128_AGP_APER_SIZE_64MB; break;
- case 32: cntl |= R128_AGP_APER_SIZE_32MB; break;
- case 16: cntl |= R128_AGP_APER_SIZE_16MB; break;
- case 8: cntl |= R128_AGP_APER_SIZE_8MB; break;
- case 4: cntl |= R128_AGP_APER_SIZE_4MB; break;
- default:
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[agp] Illegal aperture size %d kB\n",
- info->agpSize*1024);
- return FALSE;
- }
- agpBase = drmAgpBase(info->drmFD);
- OUTREG(R128_AGP_BASE, agpBase);
- OUTREG(R128_AGP_CNTL, cntl);
-
- /* Disable Rage 128's PCIGART registers */
- chunk = INREG(R128_BM_CHUNK_0_VAL);
- chunk &= ~(R128_BM_PTR_FORCE_TO_PCI |
- R128_BM_PM4_RD_FORCE_TO_PCI |
- R128_BM_GLOBAL_FORCE_TO_PCI);
- OUTREG(R128_BM_CHUNK_0_VAL, chunk);
-
- OUTREG(R128_PCI_GART_PAGE, 1); /* Ensure AGP GART is used (for now) */
-
- return TRUE;
-}
-
-static Bool R128DRIPciInit(R128InfoPtr info, ScreenPtr pScreen)
-{
- unsigned char *R128MMIO = info->MMIO;
- CARD32 chunk;
- int ret;
- int flags;
-
- info->agpOffset = 0;
-
- ret = drmScatterGatherAlloc(info->drmFD, info->agpSize*1024*1024,
- &info->pciMemHandle);
- if (ret < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Out of memory (%d)\n", ret);
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[pci] %d kB allocated with handle 0x%08x\n",
- info->agpSize*1024, info->pciMemHandle);
-
- /* Initialize the CCE ring buffer data */
- info->ringStart = info->agpOffset;
- info->ringMapSize = info->ringSize*1024*1024 + r128_drm_page_size;
- info->ringSizeLog2QW = R128MinBits(info->ringSize*1024*1024/8) - 1;
-
- info->ringReadOffset = info->ringStart + info->ringMapSize;
- info->ringReadMapSize = r128_drm_page_size;
-
- /* Reserve space for vertex/indirect buffers */
- info->bufStart = info->ringReadOffset + info->ringReadMapSize;
- info->bufMapSize = info->bufSize*1024*1024;
-
- flags = DRM_READ_ONLY | DRM_LOCKED | DRM_KERNEL;
-
- if (drmAddMap(info->drmFD, info->ringStart, info->ringMapSize,
- DRM_SCATTER_GATHER, flags, &info->ringHandle) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[pci] Could not add ring mapping\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[pci] ring handle = 0x%08x\n", info->ringHandle);
-
- if (drmMap(info->drmFD, info->ringHandle, info->ringMapSize,
- &info->ring) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not map ring\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[pci] Ring mapped at 0x%08lx\n",
- (unsigned long)info->ring);
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[pci] Ring contents 0x%08lx\n",
- *(unsigned long *)(pointer)info->ring);
-
- if (drmAddMap(info->drmFD, info->ringReadOffset, info->ringReadMapSize,
- DRM_SCATTER_GATHER, flags, &info->ringReadPtrHandle) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[pci] Could not add ring read ptr mapping\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[pci] ring read ptr handle = 0x%08x\n",
- info->ringReadPtrHandle);
-
- if (drmMap(info->drmFD, info->ringReadPtrHandle, info->ringReadMapSize,
- &info->ringReadPtr) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[pci] Could not map ring read ptr\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[pci] Ring read ptr mapped at 0x%08lx\n",
- (unsigned long)info->ringReadPtr);
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[pci] Ring read ptr contents 0x%08lx\n",
- *(unsigned long *)(pointer)info->ringReadPtr);
-
- if (drmAddMap(info->drmFD, info->bufStart, info->bufMapSize,
- DRM_SCATTER_GATHER, 0, &info->bufHandle) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[pci] Could not add vertex/indirect buffers mapping\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[pci] vertex/indirect buffers handle = 0x%08x\n",
- info->bufHandle);
-
- if (drmMap(info->drmFD, info->bufHandle, info->bufMapSize,
- &info->buf) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[pci] Could not map vertex/indirect buffers\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[pci] Vertex/indirect buffers mapped at 0x%08lx\n",
- (unsigned long)info->buf);
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[pci] Vertex/indirect buffers contents 0x%08lx\n",
- *(unsigned long *)(pointer)info->buf);
-
- switch (info->Chipset) {
- case PCI_CHIP_RAGE128LE:
- case PCI_CHIP_RAGE128RE:
- case PCI_CHIP_RAGE128RK:
- case PCI_CHIP_RAGE128PD:
- case PCI_CHIP_RAGE128PP:
- case PCI_CHIP_RAGE128PR:
- /* This is a PCI card, do nothing */
- break;
-
- case PCI_CHIP_RAGE128LF:
- case PCI_CHIP_RAGE128MF:
- case PCI_CHIP_RAGE128ML:
- case PCI_CHIP_RAGE128RF:
- case PCI_CHIP_RAGE128RG:
- case PCI_CHIP_RAGE128RL:
- case PCI_CHIP_RAGE128SM:
- case PCI_CHIP_RAGE128PF:
- case PCI_CHIP_RAGE128TF:
- case PCI_CHIP_RAGE128TL:
- case PCI_CHIP_RAGE128TR:
- /* FIXME: ATI documentation does not specify if the following chips are
- * AGP or PCI, it just mentions their PCI IDs. I'm assuming they're AGP
- * until I get more correct information. <mharris@redhat.com>
- */
- case PCI_CHIP_RAGE128PA:
- case PCI_CHIP_RAGE128PB:
- case PCI_CHIP_RAGE128PC:
- case PCI_CHIP_RAGE128PE:
- case PCI_CHIP_RAGE128PG:
- case PCI_CHIP_RAGE128PH:
- case PCI_CHIP_RAGE128PI:
- case PCI_CHIP_RAGE128PJ:
- case PCI_CHIP_RAGE128PK:
- case PCI_CHIP_RAGE128PL:
- case PCI_CHIP_RAGE128PM:
- case PCI_CHIP_RAGE128PN:
- case PCI_CHIP_RAGE128PO:
- case PCI_CHIP_RAGE128PQ:
- case PCI_CHIP_RAGE128PS:
- case PCI_CHIP_RAGE128PT:
- case PCI_CHIP_RAGE128PU:
- case PCI_CHIP_RAGE128PV:
- case PCI_CHIP_RAGE128PW:
- case PCI_CHIP_RAGE128PX:
- case PCI_CHIP_RAGE128SE:
- case PCI_CHIP_RAGE128SF:
- case PCI_CHIP_RAGE128SG:
- case PCI_CHIP_RAGE128SH:
- case PCI_CHIP_RAGE128SK:
- case PCI_CHIP_RAGE128SL:
- case PCI_CHIP_RAGE128SN:
- case PCI_CHIP_RAGE128TS:
- case PCI_CHIP_RAGE128TT:
- case PCI_CHIP_RAGE128TU:
- default:
- /* This is really an AGP card, force PCI GART mode */
- chunk = INREG(R128_BM_CHUNK_0_VAL);
- chunk |= (R128_BM_PTR_FORCE_TO_PCI |
- R128_BM_PM4_RD_FORCE_TO_PCI |
- R128_BM_GLOBAL_FORCE_TO_PCI);
- OUTREG(R128_BM_CHUNK_0_VAL, chunk);
- OUTREG(R128_PCI_GART_PAGE, 0); /* Ensure PCI GART is used */
- break;
- }
-
- return TRUE;
-}
-
-/* Add a map for the MMIO registers that will be accessed by any
- DRI-based clients. */
-static Bool R128DRIMapInit(R128InfoPtr info, ScreenPtr pScreen)
-{
- int flags;
-
- if (info->CCESecure) flags = DRM_READ_ONLY;
- else flags = 0;
-
- /* Map registers */
- info->registerSize = R128_MMIOSIZE;
- if (drmAddMap(info->drmFD, info->MMIOAddr, info->registerSize,
- DRM_REGISTERS, flags, &info->registerHandle) < 0) {
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[drm] register handle = 0x%08x\n", info->registerHandle);
-
- return TRUE;
-}
-
-/* Initialize the kernel data structures. */
-static int R128DRIKernelInit(R128InfoPtr info, ScreenPtr pScreen)
-{
- drmR128Init drmInfo;
-
- memset( &drmInfo, 0, sizeof(drmR128Init) );
-
- drmInfo.func = DRM_R128_INIT_CCE;
- drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec);
- drmInfo.is_pci = info->IsPCI;
- drmInfo.cce_mode = info->CCEMode;
- drmInfo.cce_secure = info->CCESecure;
- drmInfo.ring_size = info->ringSize*1024*1024;
- drmInfo.usec_timeout = info->CCEusecTimeout;
-
- drmInfo.fb_bpp = info->CurrentLayout.pixel_code;
- drmInfo.depth_bpp = info->CurrentLayout.pixel_code;
-
- drmInfo.front_offset = info->frontOffset;
- drmInfo.front_pitch = info->frontPitch;
-
- drmInfo.back_offset = info->backOffset;
- drmInfo.back_pitch = info->backPitch;
-
- drmInfo.depth_offset = info->depthOffset;
- drmInfo.depth_pitch = info->depthPitch;
- drmInfo.span_offset = info->spanOffset;
-
- drmInfo.fb_offset = info->fbHandle;
- drmInfo.mmio_offset = info->registerHandle;
- drmInfo.ring_offset = info->ringHandle;
- drmInfo.ring_rptr_offset = info->ringReadPtrHandle;
- drmInfo.buffers_offset = info->bufHandle;
- drmInfo.agp_textures_offset = info->agpTexHandle;
-
- if (drmCommandWrite(info->drmFD, DRM_R128_INIT,
- &drmInfo, sizeof(drmR128Init)) < 0)
- return FALSE;
-
- return TRUE;
-}
-
-/* Add a map for the vertex buffers that will be accessed by any
- DRI-based clients. */
-static Bool R128DRIBufInit(R128InfoPtr info, ScreenPtr pScreen)
-{
- /* Initialize vertex buffers */
- if (info->IsPCI) {
- info->bufNumBufs = drmAddBufs(info->drmFD,
- info->bufMapSize / R128_BUFFER_SIZE,
- R128_BUFFER_SIZE,
- DRM_SG_BUFFER,
- info->bufStart);
- } else {
- info->bufNumBufs = drmAddBufs(info->drmFD,
- info->bufMapSize / R128_BUFFER_SIZE,
- R128_BUFFER_SIZE,
- DRM_AGP_BUFFER,
- info->bufStart);
- }
- if (info->bufNumBufs <= 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[drm] Could not create vertex/indirect buffers list\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[drm] Added %d %d byte vertex/indirect buffers\n",
- info->bufNumBufs, R128_BUFFER_SIZE);
-
- if (!(info->buffers = drmMapBufs(info->drmFD))) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[drm] Failed to map vertex/indirect buffers list\n");
- return FALSE;
- }
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[drm] Mapped %d vertex/indirect buffers\n",
- info->buffers->count);
-
- return TRUE;
-}
-
-static void R128DRIIrqInit(R128InfoPtr info, ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-
- if (!info->irq) {
- info->irq = drmGetInterruptFromBusID(
- info->drmFD,
- PCI_CFG_BUS(info->PciInfo),
- PCI_CFG_DEV(info->PciInfo),
- PCI_CFG_FUNC(info->PciInfo));
-
- if((drmCtlInstHandler(info->drmFD, info->irq)) != 0) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "[drm] failure adding irq handler, "
- "there is a device already using that irq\n"
- "[drm] falling back to irq-free operation\n");
- info->irq = 0;
- } else {
- unsigned char *R128MMIO = info->MMIO;
- info->gen_int_cntl = INREG( R128_GEN_INT_CNTL );
- }
- }
-
- if (info->irq)
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "[drm] dma control initialized, using IRQ %d\n",
- info->irq);
-}
-
-/* Initialize the CCE state, and start the CCE (if used by the X server) */
-static void R128DRICCEInit(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- /* Turn on bus mastering */
- info->BusCntl &= ~R128_BUS_MASTER_DIS;
-
- /* CCEMode is initialized in r128_driver.c */
- switch (info->CCEMode) {
- case R128_PM4_NONPM4: info->CCEFifoSize = 0; break;
- case R128_PM4_192PIO: info->CCEFifoSize = 192; break;
- case R128_PM4_192BM: info->CCEFifoSize = 192; break;
- case R128_PM4_128PIO_64INDBM: info->CCEFifoSize = 128; break;
- case R128_PM4_128BM_64INDBM: info->CCEFifoSize = 128; break;
- case R128_PM4_64PIO_128INDBM: info->CCEFifoSize = 64; break;
- case R128_PM4_64BM_128INDBM: info->CCEFifoSize = 64; break;
- case R128_PM4_64PIO_64VCBM_64INDBM: info->CCEFifoSize = 64; break;
- case R128_PM4_64BM_64VCBM_64INDBM: info->CCEFifoSize = 64; break;
- case R128_PM4_64PIO_64VCPIO_64INDPIO: info->CCEFifoSize = 64; break;
- }
-
- if (info->directRenderingEnabled) {
- /* Make sure the CCE is on for the X server */
- R128CCE_START(pScrn, info);
- } else {
- /* Make sure the CCE is off for the X server */
- R128CCE_STOP(pScrn, info);
- }
-}
-
-/* Initialize the screen-specific data structures for the DRI and the
- Rage 128. This is the main entry point to the device-specific
- initialization code. It calls device-independent DRI functions to
- create the DRI data structures and initialize the DRI state. */
-Bool R128DRIScreenInit(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- DRIInfoPtr pDRIInfo;
- R128DRIPtr pR128DRI;
- int major, minor, patch;
- drmVersionPtr version;
-
- /* Check that the GLX, DRI, and DRM modules have been loaded by testing
- * for known symbols in each module. */
- if (!xf86LoaderCheckSymbol("GlxSetVisualConfigs")) return FALSE;
- if (!xf86LoaderCheckSymbol("drmAvailable")) return FALSE;
- if (!xf86LoaderCheckSymbol("DRIQueryVersion")) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[dri] R128DRIScreenInit failed (libdri.a too old)\n");
- return FALSE;
- }
-
- /* Check the DRI version */
- DRIQueryVersion(&major, &minor, &patch);
- if (major != DRIINFO_MAJOR_VERSION || minor < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[dri] R128DRIScreenInit failed because of a version mismatch.\n"
- "[dri] libdri version is %d.%d.%d but version %d.%d.x is needed.\n"
- "[dri] Disabling the DRI.\n",
- major, minor, patch,
- DRIINFO_MAJOR_VERSION, 0);
- return FALSE;
- }
-
- switch (info->CurrentLayout.pixel_code) {
- case 8:
- /* These modes are not supported (yet). */
- case 15:
- case 24:
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[dri] R128DRIScreenInit failed (depth %d not supported). "
- "[dri] Disabling DRI.\n", info->CurrentLayout.pixel_code);
- return FALSE;
-
- /* Only 16 and 32 color depths are supports currently. */
- case 16:
- case 32:
- break;
- }
-
- r128_drm_page_size = getpagesize();
-
- /* Create the DRI data structure, and fill it in before calling the
- DRIScreenInit(). */
- if (!(pDRIInfo = DRICreateInfoRec())) return FALSE;
-
- info->pDRIInfo = pDRIInfo;
- pDRIInfo->drmDriverName = R128_DRIVER_NAME;
- pDRIInfo->clientDriverName = R128_DRIVER_NAME;
- if (xf86LoaderCheckSymbol("DRICreatePCIBusID")) {
- pDRIInfo->busIdString = DRICreatePCIBusID(info->PciInfo);
- } else {
- pDRIInfo->busIdString = xalloc(64);
- sprintf(pDRIInfo->busIdString,
- "PCI:%d:%d:%d",
- PCI_DEV_BUS(info->PciInfo),
- PCI_DEV_DEV(info->PciInfo),
- PCI_DEV_FUNC(info->PciInfo));
- }
- pDRIInfo->ddxDriverMajorVersion = R128_VERSION_MAJOR;
- pDRIInfo->ddxDriverMinorVersion = R128_VERSION_MINOR;
- pDRIInfo->ddxDriverPatchVersion = R128_VERSION_PATCH;
- pDRIInfo->frameBufferPhysicalAddress = (void *)info->LinearAddr;
- pDRIInfo->frameBufferSize = info->FbMapSize;
- pDRIInfo->frameBufferStride = (pScrn->displayWidth *
- info->CurrentLayout.pixel_bytes);
- pDRIInfo->ddxDrawableTableEntry = R128_MAX_DRAWABLES;
- pDRIInfo->maxDrawableTableEntry = (SAREA_MAX_DRAWABLES
- < R128_MAX_DRAWABLES
- ? SAREA_MAX_DRAWABLES
- : R128_MAX_DRAWABLES);
-
-#ifdef NOT_DONE
- /* FIXME: Need to extend DRI protocol to pass this size back to
- * client for SAREA mapping that includes a device private record
- */
- pDRIInfo->SAREASize =
- ((sizeof(XF86DRISAREARec) + 0xfff) & 0x1000); /* round to page */
- /* + shared memory device private rec */
-#else
- /* For now the mapping works by using a fixed size defined
- * in the SAREA header
- */
- if (sizeof(XF86DRISAREARec)+sizeof(R128SAREAPriv)>SAREA_MAX) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[dri] Data does not fit in SAREA. Disabling DRI.\n");
- return FALSE;
- }
- pDRIInfo->SAREASize = SAREA_MAX;
-#endif
-
- if (!(pR128DRI = (R128DRIPtr)xcalloc(sizeof(R128DRIRec),1))) {
- DRIDestroyInfoRec(info->pDRIInfo);
- info->pDRIInfo = NULL;
- return FALSE;
- }
- pDRIInfo->devPrivate = pR128DRI;
- pDRIInfo->devPrivateSize = sizeof(R128DRIRec);
- pDRIInfo->contextSize = sizeof(R128DRIContextRec);
-
- pDRIInfo->CreateContext = R128CreateContext;
- pDRIInfo->DestroyContext = R128DestroyContext;
- pDRIInfo->SwapContext = R128DRISwapContext;
- pDRIInfo->InitBuffers = R128DRIInitBuffers;
- pDRIInfo->MoveBuffers = R128DRIMoveBuffers;
- pDRIInfo->bufferRequests = DRI_ALL_WINDOWS;
- pDRIInfo->TransitionTo2d = R128DRITransitionTo2d;
- pDRIInfo->TransitionTo3d = R128DRITransitionTo3d;
- pDRIInfo->TransitionSingleToMulti3D = R128DRITransitionSingleToMulti3d;
- pDRIInfo->TransitionMultiToSingle3D = R128DRITransitionMultiToSingle3d;
-
- pDRIInfo->createDummyCtx = TRUE;
- pDRIInfo->createDummyCtxPriv = FALSE;
-
- if (!DRIScreenInit(pScreen, pDRIInfo, &info->drmFD)) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[dri] DRIScreenInit failed. Disabling DRI.\n");
- xfree(pDRIInfo->devPrivate);
- pDRIInfo->devPrivate = NULL;
- DRIDestroyInfoRec(pDRIInfo);
- pDRIInfo = NULL;
- return FALSE;
- }
-
- /* Check the DRM lib version.
- drmGetLibVersion was not supported in version 1.0, so check for
- symbol first to avoid possible crash or hang.
- */
- if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
- version = drmGetLibVersion(info->drmFD);
- }
- else {
- /* drmlib version 1.0.0 didn't have the drmGetLibVersion
- entry point. Fake it by allocating a version record
- via drmGetVersion and changing it to version 1.0.0
- */
- version = drmGetVersion(info->drmFD);
- version->version_major = 1;
- version->version_minor = 0;
- version->version_patchlevel = 0;
- }
-
- if (version) {
- if (version->version_major != 1 ||
- version->version_minor < 1) {
- /* incompatible drm library version */
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[dri] R128DRIScreenInit failed because of a version mismatch.\n"
- "[dri] libdrm.a module version is %d.%d.%d but version 1.1.x is needed.\n"
- "[dri] Disabling DRI.\n",
- version->version_major,
- version->version_minor,
- version->version_patchlevel);
- drmFreeVersion(version);
- R128DRICloseScreen(pScreen);
- return FALSE;
- }
- drmFreeVersion(version);
- }
-
- /* Check the r128 DRM version */
- version = drmGetVersion(info->drmFD);
- if (version) {
- if (version->version_major != 2 ||
- version->version_minor < 2) {
- /* incompatible drm version */
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[dri] R128DRIScreenInit failed because of a version mismatch.\n"
- "[dri] r128.o kernel module version is %d.%d.%d but version 2.2 or greater is needed.\n"
- "[dri] Disabling the DRI.\n",
- version->version_major,
- version->version_minor,
- version->version_patchlevel);
- drmFreeVersion(version);
- R128DRICloseScreen(pScreen);
- return FALSE;
- }
- info->drmMinor = version->version_minor;
- drmFreeVersion(version);
- }
-
- /* Initialize AGP */
- if (!info->IsPCI && !R128DRIAgpInit(info, pScreen)) {
- info->IsPCI = TRUE;
- xf86DrvMsg(pScreen->myNum, X_WARNING,
- "[agp] AGP failed to initialize -- falling back to PCI mode.\n");
- xf86DrvMsg(pScreen->myNum, X_WARNING,
- "[agp] Make sure you have the agpgart kernel module loaded.\n");
- }
-
- /* Initialize PCIGART */
- if (info->IsPCI && !R128DRIPciInit(info, pScreen)) {
- R128DRICloseScreen(pScreen);
- return FALSE;
- }
-
- /* DRIScreenInit doesn't add all the
- common mappings. Add additional
- mappings here. */
- if (!R128DRIMapInit(info, pScreen)) {
- R128DRICloseScreen(pScreen);
- return FALSE;
- }
-
- /* DRIScreenInit adds the frame buffer
- map, but we need it as well */
- {
- void *scratch_ptr;
- int scratch_int;
-
- DRIGetDeviceInfo(pScreen, &info->fbHandle,
- &scratch_int, &scratch_int,
- &scratch_int, &scratch_int,
- &scratch_ptr);
- }
-
- /* FIXME: When are these mappings unmapped? */
-
- if (!R128InitVisualConfigs(pScreen)) {
- R128DRICloseScreen(pScreen);
- return FALSE;
- }
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] Visual configs initialized\n");
-
- return TRUE;
-}
-
-/* Finish initializing the device-dependent DRI state, and call
- DRIFinishScreenInit() to complete the device-independent DRI
- initialization. */
-Bool R128DRIFinishScreenInit(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- R128SAREAPrivPtr pSAREAPriv;
- R128DRIPtr pR128DRI;
-
- info->pDRIInfo->driverSwapMethod = DRI_HIDE_X_CONTEXT;
- /* info->pDRIInfo->driverSwapMethod = DRI_SERVER_SWAP; */
-
- /* NOTE: DRIFinishScreenInit must be called before *DRIKernelInit
- because *DRIKernelInit requires that the hardware lock is held by
- the X server, and the first time the hardware lock is grabbed is
- in DRIFinishScreenInit. */
- if (!DRIFinishScreenInit(pScreen)) {
- R128DRICloseScreen(pScreen);
- return FALSE;
- }
-
- /* Initialize the kernel data structures */
- if (!R128DRIKernelInit(info, pScreen)) {
- R128DRICloseScreen(pScreen);
- return FALSE;
- }
-
- /* Initialize the vertex buffers list */
- if (!R128DRIBufInit(info, pScreen)) {
- R128DRICloseScreen(pScreen);
- return FALSE;
- }
-
- /* Initialize IRQ */
- R128DRIIrqInit(info, pScreen);
-
- /* Initialize and start the CCE if required */
- R128DRICCEInit(pScrn);
-
- pSAREAPriv = (R128SAREAPrivPtr)DRIGetSAREAPrivate(pScreen);
- memset(pSAREAPriv, 0, sizeof(*pSAREAPriv));
-
- pR128DRI = (R128DRIPtr)info->pDRIInfo->devPrivate;
-
- pR128DRI->deviceID = info->Chipset;
- pR128DRI->width = pScrn->virtualX;
- pR128DRI->height = pScrn->virtualY;
- pR128DRI->depth = pScrn->depth;
- pR128DRI->bpp = pScrn->bitsPerPixel;
-
- pR128DRI->IsPCI = info->IsPCI;
- pR128DRI->AGPMode = info->agpMode;
-
- pR128DRI->frontOffset = info->frontOffset;
- pR128DRI->frontPitch = info->frontPitch;
- pR128DRI->backOffset = info->backOffset;
- pR128DRI->backPitch = info->backPitch;
- pR128DRI->depthOffset = info->depthOffset;
- pR128DRI->depthPitch = info->depthPitch;
- pR128DRI->spanOffset = info->spanOffset;
- pR128DRI->textureOffset = info->textureOffset;
- pR128DRI->textureSize = info->textureSize;
- pR128DRI->log2TexGran = info->log2TexGran;
-
- pR128DRI->registerHandle = info->registerHandle;
- pR128DRI->registerSize = info->registerSize;
-
- pR128DRI->agpTexHandle = info->agpTexHandle;
- pR128DRI->agpTexMapSize = info->agpTexMapSize;
- pR128DRI->log2AGPTexGran = info->log2AGPTexGran;
- pR128DRI->agpTexOffset = info->agpTexStart;
- pR128DRI->sarea_priv_offset = sizeof(XF86DRISAREARec);
-
- /* Have shadowfb run only while there is 3d active. */
- if (info->allowPageFlip && info->drmMinor >= 5 ) {
- ShadowFBInit( pScreen, R128DRIRefreshArea );
- } else if (info->allowPageFlip) {
- xf86DrvMsg(pScreen->myNum, X_WARNING,
- "[dri] Kernel module version 2.5.0 or newer is required for pageflipping.\n");
- info->allowPageFlip = 0;
- }
-
- return TRUE;
-}
-
-/* The screen is being closed, so clean up any state and free any
- resources used by the DRI. */
-void R128DRICloseScreen(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- drmR128Init drmInfo;
-
- /* Stop the CCE if it is still in use */
- if (info->directRenderingEnabled) {
- R128CCE_STOP(pScrn, info);
- }
-
- if (info->irq) {
- drmCtlUninstHandler(info->drmFD);
- info->irq = 0;
- info->gen_int_cntl = 0;
- }
-
- /* De-allocate vertex buffers */
- if (info->buffers) {
- drmUnmapBufs(info->buffers);
- info->buffers = NULL;
- }
-
- /* De-allocate all kernel resources */
- memset(&drmInfo, 0, sizeof(drmR128Init));
- drmInfo.func = DRM_R128_CLEANUP_CCE;
- drmCommandWrite(info->drmFD, DRM_R128_INIT,
- &drmInfo, sizeof(drmR128Init));
-
- /* De-allocate all AGP resources */
- if (info->agpTex) {
- drmUnmap(info->agpTex, info->agpTexMapSize);
- info->agpTex = NULL;
- }
- if (info->buf) {
- drmUnmap(info->buf, info->bufMapSize);
- info->buf = NULL;
- }
- if (info->ringReadPtr) {
- drmUnmap(info->ringReadPtr, info->ringReadMapSize);
- info->ringReadPtr = NULL;
- }
- if (info->ring) {
- drmUnmap(info->ring, info->ringMapSize);
- info->ring = NULL;
- }
- if (info->agpMemHandle != DRM_AGP_NO_HANDLE) {
- drmAgpUnbind(info->drmFD, info->agpMemHandle);
- drmAgpFree(info->drmFD, info->agpMemHandle);
- info->agpMemHandle = DRM_AGP_NO_HANDLE;
- drmAgpRelease(info->drmFD);
- }
- if (info->pciMemHandle) {
- drmScatterGatherFree(info->drmFD, info->pciMemHandle);
- info->pciMemHandle = 0;
- }
-
- /* De-allocate all DRI resources */
- DRICloseScreen(pScreen);
-
- /* De-allocate all DRI data structures */
- if (info->pDRIInfo) {
- if (info->pDRIInfo->devPrivate) {
- xfree(info->pDRIInfo->devPrivate);
- info->pDRIInfo->devPrivate = NULL;
- }
- DRIDestroyInfoRec(info->pDRIInfo);
- info->pDRIInfo = NULL;
- }
- if (info->pVisualConfigs) {
- xfree(info->pVisualConfigs);
- info->pVisualConfigs = NULL;
- }
- if (info->pVisualConfigsPriv) {
- xfree(info->pVisualConfigsPriv);
- info->pVisualConfigsPriv = NULL;
- }
-}
-
-/* Use callbacks from dri.c to support pageflipping mode for a single
- * 3d context without need for any specific full-screen extension.
- */
-
-/* Use the shadowfb module to maintain a list of dirty rectangles.
- * These are blitted to the back buffer to keep both buffers clean
- * during page-flipping when the 3d application isn't fullscreen.
- *
- * Unlike most use of the shadowfb code, both buffers are in video memory.
- *
- * An alternative to this would be to organize for all on-screen drawing
- * operations to be duplicated for the two buffers. That might be
- * faster, but seems like a lot more work...
- */
-
-
-static void R128DRIRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox)
-{
- R128InfoPtr info = R128PTR(pScrn);
- int i;
- R128SAREAPrivPtr pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen);
-
- /* Don't want to do this when no 3d is active and pages are
- * right-way-round
- */
- if (!pSAREAPriv->pfAllowPageFlip && pSAREAPriv->pfCurrentPage == 0)
- return;
-
- (*info->accel->SetupForScreenToScreenCopy)(pScrn,
- 1, 1, GXcopy,
- (CARD32)(-1), -1);
-
- for (i = 0 ; i < num ; i++, pbox++) {
- int xa = max(pbox->x1, 0), xb = min(pbox->x2, pScrn->virtualX-1);
- int ya = max(pbox->y1, 0), yb = min(pbox->y2, pScrn->virtualY-1);
-
- if (xa <= xb && ya <= yb) {
- (*info->accel->SubsequentScreenToScreenCopy)(pScrn, xa, ya,
- xa + info->backX,
- ya + info->backY,
- xb - xa + 1,
- yb - ya + 1);
- }
- }
-}
-
-static void R128EnablePageFlip(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- R128SAREAPrivPtr pSAREAPriv = DRIGetSAREAPrivate(pScreen);
-
- if (info->allowPageFlip) {
- /* Duplicate the frontbuffer to the backbuffer */
- (*info->accel->SetupForScreenToScreenCopy)(pScrn,
- 1, 1, GXcopy,
- (CARD32)(-1), -1);
-
- (*info->accel->SubsequentScreenToScreenCopy)(pScrn,
- 0,
- 0,
- info->backX,
- info->backY,
- pScrn->virtualX,
- pScrn->virtualY);
-
- pSAREAPriv->pfAllowPageFlip = 1;
- }
-}
-
-static void R128DisablePageFlip(ScreenPtr pScreen)
-{
- /* Tell the clients not to pageflip. How?
- * -- Field in sarea, plus bumping the window counters.
- * -- DRM needs to cope with Front-to-Back swapbuffers.
- */
- R128SAREAPrivPtr pSAREAPriv = DRIGetSAREAPrivate(pScreen);
-
- pSAREAPriv->pfAllowPageFlip = 0;
-}
-
-static void R128DRITransitionSingleToMulti3d(ScreenPtr pScreen)
-{
- R128DisablePageFlip(pScreen);
-}
-
-static void R128DRITransitionMultiToSingle3d(ScreenPtr pScreen)
-{
- /* Let the remaining 3d app start page flipping again */
- R128EnablePageFlip(pScreen);
-}
-
-static void R128DRITransitionTo3d(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
-
- R128EnablePageFlip(pScreen);
-
- info->have3DWindows = 1;
-
- if (info->cursor_start)
- xf86ForceHWCursor(pScreen, TRUE);
-}
-
-static void R128DRITransitionTo2d(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- R128SAREAPrivPtr pSAREAPriv = DRIGetSAREAPrivate(pScreen);
-
- /* Try flipping back to the front page if necessary */
- if (pSAREAPriv->pfCurrentPage == 1)
- drmCommandNone(info->drmFD, DRM_R128_FLIP);
-
- /* Shut down shadowing if we've made it back to the front page */
- if (pSAREAPriv->pfCurrentPage == 0) {
- R128DisablePageFlip(pScreen);
- } else {
- xf86DrvMsg(pScreen->myNum, X_WARNING,
- "[dri] R128DRITransitionTo2d: "
- "kernel failed to unflip buffers.\n");
- }
-
- info->have3DWindows = 0;
-
- if (info->cursor_start)
- xf86ForceHWCursor(pScreen, FALSE);
-}
diff --git a/src/r128_dri.h b/src/r128_dri.h
deleted file mode 100644
index 3fae3f64..00000000
--- a/src/r128_dri.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
- * Precision Insight, Inc., Cedar Park, Texas, and
- * VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
- * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/*
- * Authors:
- * Kevin E. Martin <martin@valinux.com>
- * Rickard E. Faith <faith@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-#ifndef _R128_DRI_
-#define _R128_DRI_
-
-#include "xf86drm.h"
-
-/* DRI Driver defaults */
-#define R128_DEFAULT_CCE_PIO_MODE R128_PM4_64PIO_64VCBM_64INDBM
-#define R128_DEFAULT_CCE_BM_MODE R128_PM4_64BM_64VCBM_64INDBM
-#define R128_DEFAULT_AGP_MODE 1
-#define R128_DEFAULT_AGP_SIZE 8 /* MB (must be a power of 2 and > 4MB) */
-#define R128_DEFAULT_RING_SIZE 1 /* MB (must be page aligned) */
-#define R128_DEFAULT_BUFFER_SIZE 2 /* MB (must be page aligned) */
-#define R128_DEFAULT_AGP_TEX_SIZE 1 /* MB (must be page aligned) */
-
-#define R128_DEFAULT_CCE_TIMEOUT 10000 /* usecs */
-
-#define R128_AGP_MAX_MODE 4
-
-#define R128_CARD_TYPE_R128 1
-#define R128_CARD_TYPE_R128_PRO 2
-#define R128_CARD_TYPE_R128_MOBILITY 3
-
-#define R128CCE_USE_RING_BUFFER(m) \
-(((m) == R128_PM4_192BM) || \
- ((m) == R128_PM4_128BM_64INDBM) || \
- ((m) == R128_PM4_64BM_128INDBM) || \
- ((m) == R128_PM4_64BM_64VCBM_64INDBM))
-
-typedef struct {
- /* DRI screen private data */
- int deviceID; /* PCI device ID */
- int width; /* Width in pixels of display */
- int height; /* Height in scanlines of display */
- int depth; /* Depth of display (8, 15, 16, 24) */
- int bpp; /* Bit depth of display (8, 16, 24, 32) */
-
- int IsPCI; /* Current card is a PCI card */
- int AGPMode;
-
- int frontOffset; /* Start of front buffer */
- int frontPitch;
- int backOffset; /* Start of shared back buffer */
- int backPitch;
- int depthOffset; /* Start of shared depth buffer */
- int depthPitch;
- int spanOffset; /* Start of scratch spanline */
- int textureOffset;/* Start of texture data in frame buffer */
- int textureSize;
- int log2TexGran;
-
- /* MMIO register data */
- drm_handle_t registerHandle;
- drmSize registerSize;
-
- /* CCE AGP Texture data */
- drm_handle_t agpTexHandle;
- drmSize agpTexMapSize;
- int log2AGPTexGran;
- int agpTexOffset;
- unsigned int sarea_priv_offset;
-} R128DRIRec, *R128DRIPtr;
-
-#endif
diff --git a/src/r128_dripriv.h b/src/r128_dripriv.h
deleted file mode 100644
index 269bac96..00000000
--- a/src/r128_dripriv.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
- * Precision Insight, Inc., Cedar Park, Texas, and
- * VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
- * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/*
- * Authors:
- * Rickard E. Faith <faith@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- *
- */
-
-#ifndef _R128_DRIPRIV_H_
-#define _R128_DRIPRIV_H_
-
-#include "GL/glxint.h"
-
-#define R128_MAX_DRAWABLES 256
-
-extern void GlxSetVisualConfigs(int nconfigs, __GLXvisualConfig *configs,
- void **configprivs);
-
-typedef struct {
- /* Nothing here yet */
- int dummy;
-} R128ConfigPrivRec, *R128ConfigPrivPtr;
-
-typedef struct {
- /* Nothing here yet */
- int dummy;
-} R128DRIContextRec, *R128DRIContextPtr;
-
-#endif
diff --git a/src/r128_driver.c b/src/r128_driver.c
deleted file mode 100644
index 0e693e0d..00000000
--- a/src/r128_driver.c
+++ /dev/null
@@ -1,4463 +0,0 @@
-/*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
- * Precision Insight, Inc., Cedar Park, Texas, and
- * VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
- * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-/*
- * Authors:
- * Rickard E. Faith <faith@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- * Credits:
- *
- * Thanks to Alan Hourihane <alanh@fairlite.demon..co.uk> and SuSE for
- * providing source code to their 3.3.x Rage 128 driver. Portions of
- * this file are based on the initialization code for that driver.
- *
- * References:
- *
- * RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical
- * Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April
- * 1999.
- *
- * RAGE 128 Software Development Manual (Technical Reference Manual P/N
- * SDK-G04000 Rev. 0.01), ATI Technologies: June 1999.
- *
- * This server does not yet support these XFree86 4.0 features:
- * DDC1 & DDC2
- * shadowfb
- * overlay planes
- *
- * Modified by Marc Aurele La France <tsi@xfree86.org> for ATI driver merge.
- *
- * Dualhead support - Alex Deucher <agd5f@yahoo.com>
- */
-
-#include <string.h>
-#include <stdio.h>
-
- /* Driver data structures */
-#include "r128.h"
-#include "r128_probe.h"
-#include "r128_reg.h"
-#include "r128_version.h"
-
-#ifdef XF86DRI
-#define _XF86DRI_SERVER_
-#include "r128_dri.h"
-#include "r128_common.h"
-#include "r128_sarea.h"
-#endif
-
-#include "fb.h"
-
- /* colormap initialization */
-#include "micmap.h"
-
- /* X and server generic header files */
-#include "xf86.h"
-#include "xf86_OSproc.h"
-#include "xf86PciInfo.h"
-#include "xf86RAC.h"
-#include "xf86Resources.h"
-#include "xf86cmap.h"
-#include "xf86xv.h"
-#include "vbe.h"
-
- /* fbdevhw & vgahw */
-#ifdef WITH_VGAHW
-#include "vgaHW.h"
-#endif
-#include "fbdevhw.h"
-#include "dixstruct.h"
-
- /* DPMS support. */
-#define DPMS_SERVER
-#include <X11/extensions/dpms.h>
-
-#ifndef MAX
-#define MAX(a,b) ((a)>(b)?(a):(b))
-#endif
-
-#define USE_CRT_ONLY 0
-
- /* Forward definitions for driver functions */
-static Bool R128CloseScreen(int scrnIndex, ScreenPtr pScreen);
-static Bool R128SaveScreen(ScreenPtr pScreen, int mode);
-static void R128Save(ScrnInfoPtr pScrn);
-static void R128Restore(ScrnInfoPtr pScrn);
-static Bool R128ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
-static void R128DisplayPowerManagementSet(ScrnInfoPtr pScrn,
- int PowerManagementMode, int flags);
-static void R128DisplayPowerManagementSetLCD(ScrnInfoPtr pScrn,
- int PowerManagementMode, int flags);
-
-typedef enum {
- OPTION_NOACCEL,
- OPTION_SW_CURSOR,
- OPTION_DAC_6BIT,
- OPTION_DAC_8BIT,
-#ifdef XF86DRI
- OPTION_XV_DMA,
- OPTION_IS_PCI,
- OPTION_CCE_PIO,
- OPTION_NO_SECURITY,
- OPTION_USEC_TIMEOUT,
- OPTION_AGP_MODE,
- OPTION_AGP_SIZE,
- OPTION_RING_SIZE,
- OPTION_BUFFER_SIZE,
- OPTION_PAGE_FLIP,
-#endif
-#if USE_CRT_ONLY
- /* FIXME: Disable CRTOnly until it is tested */
- OPTION_CRT,
-#endif
- OPTION_DISPLAY,
- OPTION_PANEL_WIDTH,
- OPTION_PANEL_HEIGHT,
- OPTION_PROG_FP_REGS,
- OPTION_FBDEV,
- OPTION_VIDEO_KEY,
- OPTION_SHOW_CACHE,
- OPTION_VGA_ACCESS
-} R128Opts;
-
-static const OptionInfoRec R128Options[] = {
- { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_DAC_6BIT, "Dac6Bit", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_DAC_8BIT, "Dac8Bit", OPTV_BOOLEAN, {0}, TRUE },
-#ifdef XF86DRI
- { OPTION_XV_DMA, "DMAForXv", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_IS_PCI, "ForcePCIMode", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_CCE_PIO, "CCEPIOMode", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_NO_SECURITY, "CCENoSecurity", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_USEC_TIMEOUT, "CCEusecTimeout", OPTV_INTEGER, {0}, FALSE },
- { OPTION_AGP_MODE, "AGPMode", OPTV_INTEGER, {0}, FALSE },
- { OPTION_AGP_SIZE, "AGPSize", OPTV_INTEGER, {0}, FALSE },
- { OPTION_RING_SIZE, "RingSize", OPTV_INTEGER, {0}, FALSE },
- { OPTION_BUFFER_SIZE, "BufferSize", OPTV_INTEGER, {0}, FALSE },
- { OPTION_PAGE_FLIP, "EnablePageFlip", OPTV_BOOLEAN, {0}, FALSE },
-#endif
- { OPTION_DISPLAY, "Display", OPTV_STRING, {0}, FALSE },
- { OPTION_PANEL_WIDTH, "PanelWidth", OPTV_INTEGER, {0}, FALSE },
- { OPTION_PANEL_HEIGHT, "PanelHeight", OPTV_INTEGER, {0}, FALSE },
- { OPTION_PROG_FP_REGS, "ProgramFPRegs", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_FBDEV, "UseFBDev", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_VIDEO_KEY, "VideoKey", OPTV_INTEGER, {0}, FALSE },
- { OPTION_SHOW_CACHE, "ShowCache", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_VGA_ACCESS, "VGAAccess", OPTV_BOOLEAN, {0}, TRUE },
- { -1, NULL, OPTV_NONE, {0}, FALSE }
-};
-
-const OptionInfoRec *R128OptionsWeak(void) { return R128Options; }
-
-R128RAMRec R128RAM[] = { /* Memory Specifications
- From RAGE 128 Software Development
- Manual (Technical Reference Manual P/N
- SDK-G04000 Rev 0.01), page 3-21. */
- { 4, 4, 3, 3, 1, 3, 1, 16, 12, "128-bit SDR SGRAM 1:1" },
- { 4, 8, 3, 3, 1, 3, 1, 17, 13, "64-bit SDR SGRAM 1:1" },
- { 4, 4, 1, 2, 1, 2, 1, 16, 12, "64-bit SDR SGRAM 2:1" },
- { 4, 4, 3, 3, 2, 3, 1, 16, 12, "64-bit DDR SGRAM" },
-};
-
-int getR128EntityIndex(void)
-{
- int *r128_entity_index = LoaderSymbol("gR128EntityIndex");
- if (!r128_entity_index)
- return -1;
- else
- return *r128_entity_index;
-}
-
-R128EntPtr R128EntPriv(ScrnInfoPtr pScrn)
-{
- DevUnion *pPriv;
- R128InfoPtr info = R128PTR(pScrn);
- pPriv = xf86GetEntityPrivate(info->pEnt->index,
- getR128EntityIndex());
- return pPriv->ptr;
-}
-
-/* Allocate our private R128InfoRec. */
-static Bool R128GetRec(ScrnInfoPtr pScrn)
-{
- if (pScrn->driverPrivate) return TRUE;
-
- pScrn->driverPrivate = xnfcalloc(sizeof(R128InfoRec), 1);
- return TRUE;
-}
-
-/* Free our private R128InfoRec. */
-static void R128FreeRec(ScrnInfoPtr pScrn)
-{
- if (!pScrn || !pScrn->driverPrivate) return;
- xfree(pScrn->driverPrivate);
- pScrn->driverPrivate = NULL;
-}
-
-/* Memory map the MMIO region. Used during pre-init and by R128MapMem,
- below. */
-static Bool R128MapMMIO(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- if (info->FBDev) {
- info->MMIO = fbdevHWMapMMIO(pScrn);
- } else {
-#ifndef XSERVER_LIBPCIACCESS
- info->MMIO = xf86MapPciMem(pScrn->scrnIndex,
- VIDMEM_MMIO | VIDMEM_READSIDEEFFECT,
- info->PciTag,
- info->MMIOAddr,
- R128_MMIOSIZE);
-#else
- int err = pci_device_map_range(info->PciInfo,
- info->MMIOAddr,
- R128_MMIOSIZE,
- PCI_DEV_MAP_FLAG_WRITABLE,
- &info->MMIO);
-
- if (err) {
- xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
- "Unable to map MMIO aperture. %s (%d)\n",
- strerror (err), err);
- return FALSE;
- }
-#endif
- }
-
- if (!info->MMIO) return FALSE;
- return TRUE;
-}
-
-/* Unmap the MMIO region. Used during pre-init and by R128UnmapMem,
- below. */
-static Bool R128UnmapMMIO(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- if (info->FBDev)
- fbdevHWUnmapMMIO(pScrn);
- else {
-#ifndef XSERVER_LIBPCIACCESS
- xf86UnMapVidMem(pScrn->scrnIndex, info->MMIO, R128_MMIOSIZE);
-#else
- pci_device_unmap_range(info->PciInfo, info->MMIO, R128_MMIOSIZE);
-#endif
- }
- info->MMIO = NULL;
- return TRUE;
-}
-
-/* Memory map the frame buffer. Used by R128MapMem, below. */
-static Bool R128MapFB(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- if (info->FBDev) {
- info->FB = fbdevHWMapVidmem(pScrn);
- } else {
-#ifndef XSERVER_LIBPCIACCESS
- info->FB = xf86MapPciMem(pScrn->scrnIndex,
- VIDMEM_FRAMEBUFFER,
- info->PciTag,
- info->LinearAddr,
- info->FbMapSize);
-#else
- int err = pci_device_map_range(info->PciInfo,
- info->LinearAddr,
- info->FbMapSize,
- PCI_DEV_MAP_FLAG_WRITABLE |
- PCI_DEV_MAP_FLAG_WRITE_COMBINE,
- &info->FB);
-
- if (err) {
- xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
- "Unable to map FB aperture. %s (%d)\n",
- strerror (err), err);
- return FALSE;
- }
-#endif
- }
-
- if (!info->FB) return FALSE;
- return TRUE;
-}
-
-/* Unmap the frame buffer. Used by R128UnmapMem, below. */
-static Bool R128UnmapFB(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- if (info->FBDev)
- fbdevHWUnmapVidmem(pScrn);
- else
-#ifndef XSERVER_LIBPCIACCESS
- xf86UnMapVidMem(pScrn->scrnIndex, info->FB, info->FbMapSize);
-#else
- pci_device_unmap_range(info->PciInfo, info->FB, info->FbMapSize);
-#endif
- info->FB = NULL;
- return TRUE;
-}
-
-/* Memory map the MMIO region and the frame buffer. */
-static Bool R128MapMem(ScrnInfoPtr pScrn)
-{
- if (!R128MapMMIO(pScrn)) return FALSE;
- if (!R128MapFB(pScrn)) {
- R128UnmapMMIO(pScrn);
- return FALSE;
- }
- return TRUE;
-}
-
-/* Unmap the MMIO region and the frame buffer. */
-static Bool R128UnmapMem(ScrnInfoPtr pScrn)
-{
- if (!R128UnmapMMIO(pScrn) || !R128UnmapFB(pScrn)) return FALSE;
- return TRUE;
-}
-
-/* Read PLL information */
-unsigned R128INPLL(ScrnInfoPtr pScrn, int addr)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- OUTREG8(R128_CLOCK_CNTL_INDEX, addr & 0x3f);
- return INREG(R128_CLOCK_CNTL_DATA);
-}
-
-#if 0
-/* Read PAL information (only used for debugging). */
-static int R128INPAL(int idx)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- OUTREG(R128_PALETTE_INDEX, idx << 16);
- return INREG(R128_PALETTE_DATA);
-}
-#endif
-
-/* Wait for vertical sync. */
-void R128WaitForVerticalSync(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int i;
-
- OUTREG(R128_GEN_INT_STATUS, R128_VSYNC_INT_AK);
- for (i = 0; i < R128_TIMEOUT; i++) {
- if (INREG(R128_GEN_INT_STATUS) & R128_VSYNC_INT) break;
- }
-}
-
-/* Blank screen. */
-static void R128Blank(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- if(!info->IsSecondary)
- {
- switch(info->DisplayType)
- {
- case MT_LCD:
- OUTREGP(R128_LVDS_GEN_CNTL, R128_LVDS_DISPLAY_DIS,
- ~R128_LVDS_DISPLAY_DIS);
- break;
- case MT_CRT:
- OUTREGP(R128_CRTC_EXT_CNTL, R128_CRTC_DISPLAY_DIS, ~R128_CRTC_DISPLAY_DIS);
- break;
- case MT_DFP:
- OUTREGP(R128_FP_GEN_CNTL, R128_FP_BLANK_DIS, ~R128_FP_BLANK_DIS);
- break;
- case MT_NONE:
- default:
- break;
- }
- }
- else
- {
- OUTREGP(R128_CRTC2_GEN_CNTL, R128_CRTC2_DISP_DIS, ~R128_CRTC2_DISP_DIS);
- }
-}
-
-/* Unblank screen. */
-static void R128Unblank(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- if(!info->IsSecondary)
- {
- switch(info->DisplayType)
- {
- case MT_LCD:
- OUTREGP(R128_LVDS_GEN_CNTL, 0,
- ~R128_LVDS_DISPLAY_DIS);
- break;
- case MT_CRT:
- OUTREGP(R128_CRTC_EXT_CNTL, 0, ~R128_CRTC_DISPLAY_DIS);
- break;
- case MT_DFP:
- OUTREGP(R128_FP_GEN_CNTL, 0, ~R128_FP_BLANK_DIS);
- break;
- case MT_NONE:
- default:
- break;
- }
- }
- else
- {
- switch(info->DisplayType)
- {
- case MT_LCD:
- case MT_DFP:
- case MT_CRT:
- OUTREGP(R128_CRTC2_GEN_CNTL, 0, ~R128_CRTC2_DISP_DIS);
- break;
- case MT_NONE:
- default:
- break;
- }
- }
-}
-
-/* Compute log base 2 of val. */
-int R128MinBits(int val)
-{
- int bits;
-
- if (!val) return 1;
- for (bits = 0; val; val >>= 1, ++bits);
- return bits;
-}
-
-/* Compute n/d with rounding. */
-static int R128Div(int n, int d)
-{
- return (n + (d / 2)) / d;
-}
-
-/* Read the Video BIOS block and the FP registers (if applicable). */
-static Bool R128GetBIOSParameters(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10)
-{
- R128InfoPtr info = R128PTR(pScrn);
- int i;
- int FPHeader = 0;
-
-#define R128_BIOS8(v) (info->VBIOS[v])
-#define R128_BIOS16(v) (info->VBIOS[v] | \
- (info->VBIOS[(v) + 1] << 8))
-#define R128_BIOS32(v) (info->VBIOS[v] | \
- (info->VBIOS[(v) + 1] << 8) | \
- (info->VBIOS[(v) + 2] << 16) | \
- (info->VBIOS[(v) + 3] << 24))
-
-#ifdef XSERVER_LIBPCIACCESS
- info->VBIOS = xalloc(info->PciInfo->rom_size);
-#else
- info->VBIOS = xalloc(R128_VBIOS_SIZE);
-#endif
-
- if (!info->VBIOS) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Cannot allocate space for hold Video BIOS!\n");
- return FALSE;
- }
-
- if (pInt10) {
- info->BIOSAddr = pInt10->BIOSseg << 4;
- (void)memcpy(info->VBIOS, xf86int10Addr(pInt10, info->BIOSAddr),
- R128_VBIOS_SIZE);
- } else {
-#ifdef XSERVER_LIBPCIACCESS
- if (pci_device_read_rom(info->PciInfo, info->VBIOS)) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Failed to read PCI ROM!\n");
- }
-#else
- xf86ReadPciBIOS(0, info->PciTag, 0, info->VBIOS, R128_VBIOS_SIZE);
- if (info->VBIOS[0] != 0x55 || info->VBIOS[1] != 0xaa) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Video BIOS not detected in PCI space!\n");
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Attempting to read Video BIOS from legacy ISA space!\n");
- info->BIOSAddr = 0x000c0000;
- xf86ReadDomainMemory(info->PciTag, info->BIOSAddr, R128_VBIOS_SIZE, info->VBIOS);
- }
-#endif
- }
- if (info->VBIOS[0] != 0x55 || info->VBIOS[1] != 0xaa) {
- info->BIOSAddr = 0x00000000;
- xfree(info->VBIOS);
- info->VBIOS = NULL;
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Video BIOS not found!\n");
- }
-
- if(info->HasCRTC2)
- {
- if(info->IsSecondary)
- {
- /* there may be a way to detect this, for now, just assume
- second head is CRT */
- info->DisplayType = MT_CRT;
-
- if(info->DisplayType > MT_NONE)
- {
- DevUnion* pPriv;
- R128EntPtr pR128Ent;
- pPriv = xf86GetEntityPrivate(pScrn->entityList[0],
- getR128EntityIndex());
- pR128Ent = pPriv->ptr;
- pR128Ent->HasSecondary = TRUE;
-
- }
- else return FALSE;
-
- }
- else
- {
- /* really need some sort of detection here */
- if (info->HasPanelRegs) {
- info->DisplayType = MT_LCD;
- } else if (info->isDFP) {
- info->DisplayType = MT_DFP;
- } else
- {
- /*DVI port has no monitor connected, try CRT port.
- If something on CRT port, treat it as primary*/
- if(xf86IsEntityShared(pScrn->entityList[0]))
- {
- DevUnion* pPriv;
- R128EntPtr pR128Ent;
- pPriv = xf86GetEntityPrivate(pScrn->entityList[0],
- getR128EntityIndex());
- pR128Ent = pPriv->ptr;
- pR128Ent->BypassSecondary = TRUE;
- }
-
- info->DisplayType = MT_CRT;
-#if 0
- {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "No monitor detected!!!\n");
- return FALSE;
- }
-#endif
- }
- }
- }
- else
- {
- /*Regular Radeon ASIC, only one CRTC, but it could be
- used for DFP with a DVI output, like AIW board*/
- if(info->isDFP) info->DisplayType = MT_DFP;
- else info->DisplayType = MT_CRT;
- }
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%s Display == Type %d\n",
- (info->IsSecondary ? "Secondary" : "Primary"),
- info->DisplayType);
-
-
- if (info->VBIOS && info->DisplayType == MT_LCD) {
- info->FPBIOSstart = 0;
-
- /* FIXME: There should be direct access to the start of the FP info
- tables, but until we find out where that offset is stored, we
- must search for the ATI signature string: "M3 ". */
- for (i = 4; i < R128_VBIOS_SIZE-8; i++) {
- if (R128_BIOS8(i) == 'M' &&
- R128_BIOS8(i+1) == '3' &&
- R128_BIOS8(i+2) == ' ' &&
- R128_BIOS8(i+3) == ' ' &&
- R128_BIOS8(i+4) == ' ' &&
- R128_BIOS8(i+5) == ' ' &&
- R128_BIOS8(i+6) == ' ' &&
- R128_BIOS8(i+7) == ' ') {
- FPHeader = i-2;
- break;
- }
- }
-
- if (!FPHeader) return TRUE;
-
- /* Assume that only one panel is attached and supported */
- for (i = FPHeader+20; i < FPHeader+84; i += 2) {
- if (R128_BIOS16(i) != 0) {
- info->FPBIOSstart = R128_BIOS16(i);
- break;
- }
- }
- if (!info->FPBIOSstart) return TRUE;
-
- if (!info->PanelXRes)
- info->PanelXRes = R128_BIOS16(info->FPBIOSstart+25);
- if (!info->PanelYRes)
- info->PanelYRes = R128_BIOS16(info->FPBIOSstart+27);
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Panel size: %dx%d\n",
- info->PanelXRes, info->PanelYRes);
-
- info->PanelPwrDly = R128_BIOS8(info->FPBIOSstart+56);
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Panel ID: ");
- for (i = 1; i <= 24; i++)
- ErrorF("%c", R128_BIOS8(info->FPBIOSstart+i));
- ErrorF("\n");
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Panel Type: ");
- i = R128_BIOS16(info->FPBIOSstart+29);
- if (i & 1) ErrorF("Color, ");
- else ErrorF("Monochrome, ");
- if (i & 2) ErrorF("Dual(split), ");
- else ErrorF("Single, ");
- switch ((i >> 2) & 0x3f) {
- case 0: ErrorF("STN"); break;
- case 1: ErrorF("TFT"); break;
- case 2: ErrorF("Active STN"); break;
- case 3: ErrorF("EL"); break;
- case 4: ErrorF("Plasma"); break;
- default: ErrorF("UNKNOWN"); break;
- }
- ErrorF("\n");
- if (R128_BIOS8(info->FPBIOSstart+61) & 1) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Panel Interface: LVDS\n");
- } else {
- /* FIXME: Add Non-LVDS flat pael support */
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Non-LVDS panel interface detected! "
- "This support is untested and may not "
- "function properly\n");
- }
- }
-
- if (!info->PanelXRes || !info->PanelYRes) {
- info->HasPanelRegs = FALSE;
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Can't determine panel dimensions, and none specified.\n"
- "\tDisabling programming of FP registers.\n");
- }
-
- return TRUE;
-}
-
-/* Read PLL parameters from BIOS block. Default to typical values if there
- is no BIOS. */
-static Bool R128GetPLLParameters(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- R128PLLPtr pll = &info->pll;
-
-#if defined(__powerpc__) || defined(__alpha__)
- /* there is no bios under Linux PowerPC but Open Firmware
- does set up the PLL registers properly and we can use
- those to calculate xclk and find the reference divider */
-
- unsigned x_mpll_ref_fb_div;
- unsigned xclk_cntl;
- unsigned Nx, M;
- unsigned PostDivSet[] = {0, 1, 2, 4, 8, 3, 6, 12};
-
- /* Assume REF clock is 2950 (in units of 10khz) */
- /* and that all pllclk must be between 125 Mhz and 250Mhz */
- pll->reference_freq = 2950;
- pll->min_pll_freq = 12500;
- pll->max_pll_freq = 25000;
-
- /* need to memory map the io to use INPLL since it
- has not been done yet at this point in the startup */
- R128MapMMIO(pScrn);
- x_mpll_ref_fb_div = INPLL(pScrn, R128_X_MPLL_REF_FB_DIV);
- xclk_cntl = INPLL(pScrn, R128_XCLK_CNTL) & 0x7;
- pll->reference_div =
- INPLL(pScrn,R128_PPLL_REF_DIV) & R128_PPLL_REF_DIV_MASK;
- /* unmap it again */
- R128UnmapMMIO(pScrn);
-
- Nx = (x_mpll_ref_fb_div & 0x00FF00) >> 8;
- M = (x_mpll_ref_fb_div & 0x0000FF);
-
- pll->xclk = R128Div((2 * Nx * pll->reference_freq),
- (M * PostDivSet[xclk_cntl]));
-
-#else /* !defined(__powerpc__) */
-
- if (!info->VBIOS) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Video BIOS not detected, using default PLL parameters!\n");
- /* These probably aren't going to work for
- the card you are using. Specifically,
- reference freq can be 29.50MHz,
- 28.63MHz, or 14.32MHz. YMMV. */
- pll->reference_freq = 2950;
- pll->reference_div = 65;
- pll->min_pll_freq = 12500;
- pll->max_pll_freq = 25000;
- pll->xclk = 10300;
- } else {
- CARD16 bios_header = R128_BIOS16(0x48);
- CARD16 pll_info_block = R128_BIOS16(bios_header + 0x30);
- R128TRACE(("Header at 0x%04x; PLL Information at 0x%04x\n",
- bios_header, pll_info_block));
-
- pll->reference_freq = R128_BIOS16(pll_info_block + 0x0e);
- pll->reference_div = R128_BIOS16(pll_info_block + 0x10);
- pll->min_pll_freq = R128_BIOS32(pll_info_block + 0x12);
- pll->max_pll_freq = R128_BIOS32(pll_info_block + 0x16);
- pll->xclk = R128_BIOS16(pll_info_block + 0x08);
- }
-#endif /* __powerpc__ */
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "PLL parameters: rf=%d rd=%d min=%d max=%d; xclk=%d\n",
- pll->reference_freq,
- pll->reference_div,
- pll->min_pll_freq,
- pll->max_pll_freq,
- pll->xclk);
-
- return TRUE;
-}
-
-/* This is called by R128PreInit to set up the default visual. */
-static Bool R128PreInitVisual(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- if (!xf86SetDepthBpp(pScrn, 0, 0, 0, (Support24bppFb
- | Support32bppFb
- | SupportConvert32to24
- )))
- return FALSE;
-
- switch (pScrn->depth) {
- case 8:
- case 15:
- case 16:
- case 24:
- break;
- default:
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Given depth (%d) is not supported by %s driver\n",
- pScrn->depth, R128_DRIVER_NAME);
- return FALSE;
- }
-
- xf86PrintDepthBpp(pScrn);
-
- info->fifo_slots = 0;
- info->pix24bpp = xf86GetBppFromDepth(pScrn, pScrn->depth);
- info->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel;
- info->CurrentLayout.depth = pScrn->depth;
- info->CurrentLayout.pixel_bytes = pScrn->bitsPerPixel / 8;
- info->CurrentLayout.pixel_code = (pScrn->bitsPerPixel != 16
- ? pScrn->bitsPerPixel
- : pScrn->depth);
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Pixel depth = %d bits stored in %d byte%s (%d bpp pixmaps)\n",
- pScrn->depth,
- info->CurrentLayout.pixel_bytes,
- info->CurrentLayout.pixel_bytes > 1 ? "s" : "",
- info->pix24bpp);
-
-
- if (!xf86SetDefaultVisual(pScrn, -1)) return FALSE;
-
- if (pScrn->depth > 8 && pScrn->defaultVisual != TrueColor) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Default visual (%s) is not supported at depth %d\n",
- xf86GetVisualName(pScrn->defaultVisual), pScrn->depth);
- return FALSE;
- }
- return TRUE;
-
-}
-
-/* This is called by R128PreInit to handle all color weight issues. */
-static Bool R128PreInitWeight(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- /* Save flag for 6 bit DAC to use for
- setting CRTC registers. Otherwise use
- an 8 bit DAC, even if xf86SetWeight sets
- pScrn->rgbBits to some value other than
- 8. */
- info->dac6bits = FALSE;
- if (pScrn->depth > 8) {
- rgb defaultWeight = { 0, 0, 0 };
- if (!xf86SetWeight(pScrn, defaultWeight, defaultWeight)) return FALSE;
- } else {
- pScrn->rgbBits = 8;
- if (xf86ReturnOptValBool(info->Options, OPTION_DAC_6BIT, FALSE)) {
- pScrn->rgbBits = 6;
- info->dac6bits = TRUE;
- }
- }
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Using %d bits per RGB (%d bit DAC)\n",
- pScrn->rgbBits, info->dac6bits ? 6 : 8);
-
- return TRUE;
-
-}
-
-/* This is called by R128PreInit to handle config file overrides for things
- like chipset and memory regions. Also determine memory size and type.
- If memory type ever needs an override, put it in this routine. */
-static Bool R128PreInitConfig(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- EntityInfoPtr pEnt = info->pEnt;
- GDevPtr dev = pEnt->device;
- int offset = 0; /* RAM Type */
- MessageType from;
-
- /* Chipset */
- from = X_PROBED;
- if (dev->chipset && *dev->chipset) {
- info->Chipset = xf86StringToToken(R128Chipsets, dev->chipset);
- from = X_CONFIG;
- } else if (dev->chipID >= 0) {
- info->Chipset = dev->chipID;
- from = X_CONFIG;
- } else {
- info->Chipset = PCI_DEV_DEVICE_ID(info->PciInfo);
- }
- pScrn->chipset = (char *)xf86TokenToString(R128Chipsets, info->Chipset);
-
- if (!pScrn->chipset) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "ChipID 0x%04x is not recognized\n", info->Chipset);
- return FALSE;
- }
-
- if (info->Chipset < 0) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Chipset \"%s\" is not recognized\n", pScrn->chipset);
- return FALSE;
- }
-
- xf86DrvMsg(pScrn->scrnIndex, from,
- "Chipset: \"%s\" (ChipID = 0x%04x)\n",
- pScrn->chipset,
- info->Chipset);
-
- /* Framebuffer */
-
- from = X_PROBED;
- info->LinearAddr = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & 0xfc000000;
- pScrn->memPhysBase = info->LinearAddr;
- if (dev->MemBase) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Linear address override, using 0x%08lx instead of 0x%08lx\n",
- dev->MemBase,
- info->LinearAddr);
- info->LinearAddr = dev->MemBase;
- from = X_CONFIG;
- } else if (!info->LinearAddr) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "No valid linear framebuffer address\n");
- return FALSE;
- }
- xf86DrvMsg(pScrn->scrnIndex, from,
- "Linear framebuffer at 0x%08lx\n", info->LinearAddr);
-
- /* MMIO registers */
- from = X_PROBED;
- info->MMIOAddr = PCI_REGION_BASE(info->PciInfo, 2, REGION_MEM) & 0xffffff00;
- if (dev->IOBase) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "MMIO address override, using 0x%08lx instead of 0x%08lx\n",
- dev->IOBase,
- info->MMIOAddr);
- info->MMIOAddr = dev->IOBase;
- from = X_CONFIG;
- } else if (!info->MMIOAddr) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid MMIO address\n");
- return FALSE;
- }
- xf86DrvMsg(pScrn->scrnIndex, from,
- "MMIO registers at 0x%08lx\n", info->MMIOAddr);
-
-#ifndef XSERVER_LIBPCIACCESS
- /* BIOS */
- from = X_PROBED;
- info->BIOSAddr = info->PciInfo->biosBase & 0xfffe0000;
- if (dev->BiosBase) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "BIOS address override, using 0x%08lx instead of 0x%08lx\n",
- dev->BiosBase,
- info->BIOSAddr);
- info->BIOSAddr = dev->BiosBase;
- from = X_CONFIG;
- }
- if (info->BIOSAddr) {
- xf86DrvMsg(pScrn->scrnIndex, from,
- "BIOS at 0x%08lx\n", info->BIOSAddr);
- }
-#endif
-
- /* Flat panel (part 1) */
- if (xf86GetOptValBool(info->Options, OPTION_PROG_FP_REGS,
- &info->HasPanelRegs)) {
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Turned flat panel register programming %s\n",
- info->HasPanelRegs ? "on" : "off");
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "\n\nWARNING: Forcing the driver to use/not use the flat panel registers\nmight damage your flat panel. Use at your *OWN* *RISK*.\n\n");
- } else {
- info->isDFP = FALSE;
- info->isPro2 = FALSE;
- info->HasCRTC2 = FALSE;
- switch (info->Chipset) {
- /* R128 Pro and Pro2 can have DFP, we will deal with it.
- No support for dual-head/xinerama yet.
- M3 can also have DFP, no support for now */
- case PCI_CHIP_RAGE128TF:
- case PCI_CHIP_RAGE128TL:
- case PCI_CHIP_RAGE128TR:
- /* FIXME: RAGE128 TS/TT/TU are assumed to be PRO2 as all 6 chips came
- * out at the same time, so are of the same family likely.
- * This requires confirmation however to be fully correct.
- * Mike A. Harris <mharris@redhat.com>
- */
- case PCI_CHIP_RAGE128TS:
- case PCI_CHIP_RAGE128TT:
- case PCI_CHIP_RAGE128TU: info->isPro2 = TRUE;
- /* FIXME: RAGE128 P[ABCEGHIJKLMNOQSTUVWX] are assumed to have DFP
- * capability, as the comment at the top suggests.
- * This requires confirmation however to be fully correct.
- * Mike A. Harris <mharris@redhat.com>
- */
- case PCI_CHIP_RAGE128PA:
- case PCI_CHIP_RAGE128PB:
- case PCI_CHIP_RAGE128PC:
- case PCI_CHIP_RAGE128PE:
- case PCI_CHIP_RAGE128PG:
- case PCI_CHIP_RAGE128PH:
- case PCI_CHIP_RAGE128PI:
- case PCI_CHIP_RAGE128PJ:
- case PCI_CHIP_RAGE128PK:
- case PCI_CHIP_RAGE128PL:
- case PCI_CHIP_RAGE128PM:
- case PCI_CHIP_RAGE128PN:
- case PCI_CHIP_RAGE128PO:
- case PCI_CHIP_RAGE128PQ:
- case PCI_CHIP_RAGE128PS:
- case PCI_CHIP_RAGE128PT:
- case PCI_CHIP_RAGE128PU:
- case PCI_CHIP_RAGE128PV:
- case PCI_CHIP_RAGE128PW:
- case PCI_CHIP_RAGE128PX:
-
- case PCI_CHIP_RAGE128PD:
- case PCI_CHIP_RAGE128PF:
- case PCI_CHIP_RAGE128PP:
- case PCI_CHIP_RAGE128PR: info->isDFP = TRUE; break;
-
- case PCI_CHIP_RAGE128LE:
- case PCI_CHIP_RAGE128LF:
- case PCI_CHIP_RAGE128MF:
- case PCI_CHIP_RAGE128ML:
- info->HasPanelRegs = TRUE;
- /* which chips support dualhead? */
- info->HasCRTC2 = TRUE;
- break;
- case PCI_CHIP_RAGE128RE:
- case PCI_CHIP_RAGE128RF:
- case PCI_CHIP_RAGE128RG:
- case PCI_CHIP_RAGE128RK:
- case PCI_CHIP_RAGE128RL:
- case PCI_CHIP_RAGE128SM:
- /* FIXME: RAGE128 S[EFGHKLN] are assumed to be like the SM above as
- * all of them are listed as "Rage 128 4x" in ATI docs.
- * This requires confirmation however to be fully correct.
- * Mike A. Harris <mharris@redhat.com>
- */
- case PCI_CHIP_RAGE128SE:
- case PCI_CHIP_RAGE128SF:
- case PCI_CHIP_RAGE128SG:
- case PCI_CHIP_RAGE128SH:
- case PCI_CHIP_RAGE128SK:
- case PCI_CHIP_RAGE128SL:
- case PCI_CHIP_RAGE128SN:
- default: info->HasPanelRegs = FALSE; break;
- }
- }
-
- /* Read registers used to determine options */
- from = X_PROBED;
- R128MapMMIO(pScrn);
- R128MMIO = info->MMIO;
-
- if (info->FBDev)
- pScrn->videoRam = fbdevHWGetVidmem(pScrn) / 1024;
- else
- pScrn->videoRam = INREG(R128_CONFIG_MEMSIZE) / 1024;
-
- info->MemCntl = INREG(R128_MEM_CNTL);
- info->BusCntl = INREG(R128_BUS_CNTL);
-
- /* On non-flat panel systems, the default is to display to the CRT,
- and on flat panel systems, the default is to display to the flat
- panel unless the user explicity chooses otherwise using the "Display"
- config file setting. BIOS_5_SCRATCH holds the display device on flat
- panel systems only. */
- if (info->HasPanelRegs) {
- char *Display = xf86GetOptValString(info->Options, OPTION_DISPLAY);
-
- if (info->FBDev)
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Option \"Display\" ignored "
- "(framebuffer device determines display type)\n");
- else if (info->IsPrimary || info->IsSecondary)
- info->BIOSDisplay = R128_DUALHEAD;
- else if (!Display || !xf86NameCmp(Display, "FP"))
- info->BIOSDisplay = R128_BIOS_DISPLAY_FP;
- else if (!xf86NameCmp(Display, "BIOS"))
- info->BIOSDisplay = INREG8(R128_BIOS_5_SCRATCH);
- else if (!xf86NameCmp(Display, "Mirror"))
- info->BIOSDisplay = R128_BIOS_DISPLAY_FP_CRT;
- else if (!xf86NameCmp(Display, "CRT"))
- info->BIOSDisplay = R128_BIOS_DISPLAY_CRT;
- else {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Unsupported type \"%s\" specified for Option \"Display\".\n"
- "\tSupported types are: "
- "\"BIOS\", \"Mirror\", \"CRT\" and \"FP\"\n", Display);
- return FALSE;
- }
- } else {
- info->BIOSDisplay = R128_BIOS_DISPLAY_CRT;
- }
-
- R128MMIO = NULL;
- R128UnmapMMIO(pScrn);
-
- /* RAM */
- switch (info->MemCntl & 0x3) {
- case 0: /* SDR SGRAM 1:1 */
- switch (info->Chipset) {
- case PCI_CHIP_RAGE128TF:
- case PCI_CHIP_RAGE128TL:
- case PCI_CHIP_RAGE128TR:
- case PCI_CHIP_RAGE128LE:
- case PCI_CHIP_RAGE128LF:
- case PCI_CHIP_RAGE128MF:
- case PCI_CHIP_RAGE128ML:
- case PCI_CHIP_RAGE128RE:
- case PCI_CHIP_RAGE128RF:
- case PCI_CHIP_RAGE128RG: offset = 0; break; /* 128-bit SDR SGRAM 1:1 */
- case PCI_CHIP_RAGE128RK:
- case PCI_CHIP_RAGE128RL:
- case PCI_CHIP_RAGE128SM:
- default: offset = 1; break; /* 64-bit SDR SGRAM 1:1 */
- }
- break;
- case 1: offset = 2; break; /* 64-bit SDR SGRAM 2:1 */
- case 2: offset = 3; break; /* 64-bit DDR SGRAM */
- default: offset = 1; break; /* 64-bit SDR SGRAM 1:1 */
- }
- info->ram = &R128RAM[offset];
-
- if (dev->videoRam) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Video RAM override, using %d kB instead of %d kB\n",
- dev->videoRam,
- pScrn->videoRam);
- from = X_CONFIG;
- pScrn->videoRam = dev->videoRam;
- }
-
- xf86DrvMsg(pScrn->scrnIndex, from,
- "VideoRAM: %d kByte (%s)\n", pScrn->videoRam, info->ram->name);
-
- if (info->IsPrimary) {
- pScrn->videoRam /= 2;
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Using %dk of videoram for primary head\n",
- pScrn->videoRam);
- }
-
- if (info->IsSecondary) {
- pScrn->videoRam /= 2;
- info->LinearAddr += pScrn->videoRam * 1024;
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Using %dk of videoram for secondary head\n",
- pScrn->videoRam);
- }
-
- pScrn->videoRam &= ~1023;
- info->FbMapSize = pScrn->videoRam * 1024;
-
-
- /* Flat panel (part 2) */
- switch (info->BIOSDisplay) {
- case R128_DUALHEAD:
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Dual display\n");
- break;
- case R128_BIOS_DISPLAY_FP:
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Using flat panel for display\n");
- break;
- case R128_BIOS_DISPLAY_CRT:
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Using external CRT for display\n");
- break;
- case R128_BIOS_DISPLAY_FP_CRT:
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Using both flat panel and external CRT "
- "for display\n");
- break;
- }
-
- if (info->HasPanelRegs) {
- /* Panel width/height overrides */
- info->PanelXRes = 0;
- info->PanelYRes = 0;
- if (xf86GetOptValInteger(info->Options,
- OPTION_PANEL_WIDTH, &(info->PanelXRes))) {
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Flat panel width: %d\n", info->PanelXRes);
- }
- if (xf86GetOptValInteger(info->Options,
- OPTION_PANEL_HEIGHT, &(info->PanelYRes))) {
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Flat panel height: %d\n", info->PanelYRes);
- }
- }
-
-#ifdef XF86DRI
- /* DMA for Xv */
- info->DMAForXv = xf86ReturnOptValBool(info->Options, OPTION_XV_DMA, FALSE);
- if (info->DMAForXv) {
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Will try to use DMA for Xv image transfers\n");
- }
-
- /* AGP/PCI */
- if (xf86ReturnOptValBool(info->Options, OPTION_IS_PCI, FALSE)) {
- info->IsPCI = TRUE;
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Forced into PCI-only mode\n");
- } else {
- switch (info->Chipset) {
- case PCI_CHIP_RAGE128LE:
- case PCI_CHIP_RAGE128RE:
- case PCI_CHIP_RAGE128RK:
- case PCI_CHIP_RAGE128PD:
- case PCI_CHIP_RAGE128PR:
- case PCI_CHIP_RAGE128PP: info->IsPCI = TRUE; break;
- case PCI_CHIP_RAGE128LF:
- case PCI_CHIP_RAGE128MF:
- case PCI_CHIP_RAGE128ML:
- case PCI_CHIP_RAGE128PF:
- case PCI_CHIP_RAGE128RF:
- case PCI_CHIP_RAGE128RG:
- case PCI_CHIP_RAGE128RL:
- case PCI_CHIP_RAGE128SM:
- case PCI_CHIP_RAGE128TF:
- case PCI_CHIP_RAGE128TL:
- case PCI_CHIP_RAGE128TR:
- /* FIXME: Rage 128 S[EFGHKLN], T[STU], P[ABCEGHIJKLMNOQSTUVWX] are
- * believed to be AGP, but need confirmation. <mharris@redhat.com>
- */
- case PCI_CHIP_RAGE128PA:
- case PCI_CHIP_RAGE128PB:
- case PCI_CHIP_RAGE128PC:
- case PCI_CHIP_RAGE128PE:
- case PCI_CHIP_RAGE128PG:
- case PCI_CHIP_RAGE128PH:
- case PCI_CHIP_RAGE128PI:
- case PCI_CHIP_RAGE128PJ:
- case PCI_CHIP_RAGE128PK:
- case PCI_CHIP_RAGE128PL:
- case PCI_CHIP_RAGE128PM:
- case PCI_CHIP_RAGE128PN:
- case PCI_CHIP_RAGE128PO:
- case PCI_CHIP_RAGE128PQ:
- case PCI_CHIP_RAGE128PS:
- case PCI_CHIP_RAGE128PT:
- case PCI_CHIP_RAGE128PU:
- case PCI_CHIP_RAGE128PV:
- case PCI_CHIP_RAGE128PW:
- case PCI_CHIP_RAGE128PX:
- case PCI_CHIP_RAGE128TS:
- case PCI_CHIP_RAGE128TT:
- case PCI_CHIP_RAGE128TU:
- case PCI_CHIP_RAGE128SE:
- case PCI_CHIP_RAGE128SF:
- case PCI_CHIP_RAGE128SG:
- case PCI_CHIP_RAGE128SH:
- case PCI_CHIP_RAGE128SK:
- case PCI_CHIP_RAGE128SL:
- case PCI_CHIP_RAGE128SN:
- default: info->IsPCI = FALSE; break;
- }
- }
-#endif
-
- return TRUE;
-}
-
-static Bool R128PreInitDDC(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10)
-{
-#if !defined(__powerpc__) && !defined(__alpha__) && !defined(__sparc__)
- R128InfoPtr info = R128PTR(pScrn);
- vbeInfoPtr pVbe;
-#endif
-
- if (!xf86LoadSubModule(pScrn, "ddc")) return FALSE;
-
-#if defined(__powerpc__) || defined(__alpha__) || defined(__sparc__)
- /* Int10 is broken on PPC and some Alphas */
- return TRUE;
-#else
- if (xf86LoadSubModule(pScrn, "vbe")) {
- pVbe = VBEInit(pInt10,info->pEnt->index);
- if (!pVbe) return FALSE;
- xf86SetDDCproperties(pScrn,xf86PrintEDID(vbeDoEDID(pVbe,NULL)));
- vbeFree(pVbe);
- return TRUE;
- } else
- return FALSE;
-#endif
-}
-
-/* This is called by R128PreInit to initialize gamma correction. */
-static Bool R128PreInitGamma(ScrnInfoPtr pScrn)
-{
- Gamma zeros = { 0.0, 0.0, 0.0 };
-
- if (!xf86SetGamma(pScrn, zeros)) return FALSE;
- return TRUE;
-}
-
-static void
-R128I2CGetBits(I2CBusPtr b, int *Clock, int *data)
-{
- ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex];
- R128InfoPtr info = R128PTR(pScrn);
- unsigned long val;
- unsigned char *R128MMIO = info->MMIO;
-
- /* Get the result. */
- val = INREG(info->DDCReg);
- *Clock = (val & R128_GPIO_MONID_Y_3) != 0;
- *data = (val & R128_GPIO_MONID_Y_0) != 0;
-
-}
-
-static void
-R128I2CPutBits(I2CBusPtr b, int Clock, int data)
-{
- ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex];
- R128InfoPtr info = R128PTR(pScrn);
- unsigned long val;
- unsigned char *R128MMIO = info->MMIO;
-
- val = INREG(info->DDCReg)
- & ~(CARD32)(R128_GPIO_MONID_EN_0 | R128_GPIO_MONID_EN_3);
- val |= (Clock ? 0:R128_GPIO_MONID_EN_3);
- val |= (data ? 0:R128_GPIO_MONID_EN_0);
- OUTREG(info->DDCReg, val);
-}
-
-
-static Bool
-R128I2cInit(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- if ( !xf86LoadSubModule(pScrn, "i2c") ) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Failed to load i2c module\n");
- return FALSE;
- }
-
- info->pI2CBus = xf86CreateI2CBusRec();
- if(!info->pI2CBus) return FALSE;
-
- info->pI2CBus->BusName = "DDC";
- info->pI2CBus->scrnIndex = pScrn->scrnIndex;
- info->DDCReg = R128_GPIO_MONID;
- info->pI2CBus->I2CPutBits = R128I2CPutBits;
- info->pI2CBus->I2CGetBits = R128I2CGetBits;
- info->pI2CBus->AcknTimeout = 5;
-
- if (!xf86I2CBusInit(info->pI2CBus)) {
- return FALSE;
- }
- return TRUE;
-}
-
-/* return TRUE is a DFP is indeed connected to a DVI port */
-static Bool R128GetDFPInfo(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- int i;
- xf86MonPtr MonInfo = NULL;
- xf86MonPtr ddc;
- unsigned char *R128MMIO = info->MMIO;
-
- if(!R128I2cInit(pScrn)){
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "I2C initialization failed!\n");
- }
-
- OUTREG(info->DDCReg, (INREG(info->DDCReg)
- | R128_GPIO_MONID_MASK_0 | R128_GPIO_MONID_MASK_3));
-
- OUTREG(info->DDCReg, INREG(info->DDCReg)
- & ~(CARD32)(R128_GPIO_MONID_A_0 | R128_GPIO_MONID_A_3));
-
- MonInfo = xf86DoEDID_DDC2(pScrn->scrnIndex, info->pI2CBus);
- if(!MonInfo) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "No DFP detected\n");
- return FALSE;
- }
- xf86SetDDCproperties(pScrn, MonInfo);
- ddc = pScrn->monitor->DDC;
-
- for(i=0; i<4; i++)
- {
- if((ddc->det_mon[i].type == 0) &&
- (ddc->det_mon[i].section.d_timings.h_active > 0) &&
- (ddc->det_mon[i].section.d_timings.v_active > 0))
- {
- info->PanelXRes =
- ddc->det_mon[i].section.d_timings.h_active;
- info->PanelYRes =
- ddc->det_mon[i].section.d_timings.v_active;
-
- info->HOverPlus =
- ddc->det_mon[i].section.d_timings.h_sync_off;
- info->HSyncWidth =
- ddc->det_mon[i].section.d_timings.h_sync_width;
- info->HBlank =
- ddc->det_mon[i].section.d_timings.h_blanking;
- info->VOverPlus =
- ddc->det_mon[i].section.d_timings.v_sync_off;
- info->VSyncWidth =
- ddc->det_mon[i].section.d_timings.v_sync_width;
- info->VBlank =
- ddc->det_mon[i].section.d_timings.v_blanking;
- }
- }
- return TRUE;
-}
-
-
-static void R128SetSyncRangeFromEdid(ScrnInfoPtr pScrn, int flag)
-{
- int i;
- xf86MonPtr ddc = pScrn->monitor->DDC;
- if(flag) /*HSync*/
- {
- for(i=0; i<4; i++)
- {
- if(ddc->det_mon[i].type == DS_RANGES)
- {
- pScrn->monitor->nHsync = 1;
- pScrn->monitor->hsync[0].lo =
- ddc->det_mon[i].section.ranges.min_h;
- pScrn->monitor->hsync[0].hi =
- ddc->det_mon[i].section.ranges.max_h;
- return;
- }
- }
- /*if no sync ranges detected in detailed timing table,
- let's try to derive them from supported VESA modes
- Are we doing too much here!!!?
- **/
- i = 0;
- if(ddc->timings1.t1 & 0x02) /*800x600@56*/
- {
- pScrn->monitor->hsync[i].lo =
- pScrn->monitor->hsync[i].hi = 35.2;
- i++;
- }
- if(ddc->timings1.t1 & 0x04) /*640x480@75*/
- {
- pScrn->monitor->hsync[i].lo =
- pScrn->monitor->hsync[i].hi = 37.5;
- i++;
- }
- if((ddc->timings1.t1 & 0x08) || (ddc->timings1.t1 & 0x01))
- {
- pScrn->monitor->hsync[i].lo =
- pScrn->monitor->hsync[i].hi = 37.9;
- i++;
- }
- if(ddc->timings1.t2 & 0x40)
- {
- pScrn->monitor->hsync[i].lo =
- pScrn->monitor->hsync[i].hi = 46.9;
- i++;
- }
- if((ddc->timings1.t2 & 0x80) || (ddc->timings1.t2 & 0x08))
- {
- pScrn->monitor->hsync[i].lo =
- pScrn->monitor->hsync[i].hi = 48.1;
- i++;
- }
- if(ddc->timings1.t2 & 0x04)
- {
- pScrn->monitor->hsync[i].lo =
- pScrn->monitor->hsync[i].hi = 56.5;
- i++;
- }
- if(ddc->timings1.t2 & 0x02)
- {
- pScrn->monitor->hsync[i].lo =
- pScrn->monitor->hsync[i].hi = 60.0;
- i++;
- }
- if(ddc->timings1.t2 & 0x01)
- {
- pScrn->monitor->hsync[i].lo =
- pScrn->monitor->hsync[i].hi = 64.0;
- i++;
- }
- pScrn->monitor->nHsync = i;
- }
- else /*Vrefresh*/
- {
- for(i=0; i<4; i++)
- {
- if(ddc->det_mon[i].type == DS_RANGES)
- {
- pScrn->monitor->nVrefresh = 1;
- pScrn->monitor->vrefresh[0].lo =
- ddc->det_mon[i].section.ranges.min_v;
- pScrn->monitor->vrefresh[0].hi =
- ddc->det_mon[i].section.ranges.max_v;
- return;
- }
- }
- i = 0;
- if(ddc->timings1.t1 & 0x02) /*800x600@56*/
- {
- pScrn->monitor->vrefresh[i].lo =
- pScrn->monitor->vrefresh[i].hi = 56;
- i++;
- }
- if((ddc->timings1.t1 & 0x01) || (ddc->timings1.t2 & 0x08))
- {
- pScrn->monitor->vrefresh[i].lo =
- pScrn->monitor->vrefresh[i].hi = 60;
- i++;
- }
- if(ddc->timings1.t2 & 0x04)
- {
- pScrn->monitor->vrefresh[i].lo =
- pScrn->monitor->vrefresh[i].hi = 70;
- i++;
- }
- if((ddc->timings1.t1 & 0x08) || (ddc->timings1.t2 & 0x80))
- {
- pScrn->monitor->vrefresh[i].lo =
- pScrn->monitor->vrefresh[i].hi = 72;
- i++;
- }
- if((ddc->timings1.t1 & 0x04) || (ddc->timings1.t2 & 0x40)
- || (ddc->timings1.t2 & 0x02) || (ddc->timings1.t2 & 0x01))
- {
- pScrn->monitor->vrefresh[i].lo =
- pScrn->monitor->vrefresh[i].hi = 75;
- i++;
- }
- pScrn->monitor->nVrefresh = i;
- }
-}
-
-/***********
- xfree's xf86ValidateModes routine deosn't work well with DFPs
- here is our own validation routine. All modes between
- 640<=XRes<=MaxRes and 480<=YRes<=MaxYRes will be permitted.
- NOTE: RageProII doesn't support rmx, can only work with the
- standard modes the monitor can support (scale).
-************/
-
-static int R128ValidateFPModes(ScrnInfoPtr pScrn)
-{
- int i, j, count=0, width, height;
- R128InfoPtr info = R128PTR(pScrn);
- DisplayModePtr last = NULL, new = NULL, first = NULL;
- xf86MonPtr ddc;
-
- /* Free any allocated modes during configuration. We don't need them*/
- while (pScrn->modes)
- {
- xf86DeleteMode(&pScrn->modes, pScrn->modes);
- }
- while (pScrn->modePool)
- {
- xf86DeleteMode(&pScrn->modePool, pScrn->modePool);
- }
-
- pScrn->virtualX = pScrn->display->virtualX;
- pScrn->virtualY = pScrn->display->virtualY;
-
- /* If no mode specified in config, we use native resolution*/
- if(!pScrn->display->modes[0])
- {
- pScrn->display->modes[0] = xnfalloc(16);
- sprintf(pScrn->display->modes[0], "%dx%d",
- info->PanelXRes, info->PanelYRes);
- }
-
- for(i=0; pScrn->display->modes[i] != NULL; i++)
- {
- if (sscanf(pScrn->display->modes[i], "%dx%d", &width, &height) == 2)
- {
-
- if(width < 640 || width > info->PanelXRes ||
- height < 480 || height > info->PanelYRes)
- {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Mode %s is out of range.\n"
- "Valid mode should be between 640x480-%dx%d\n",
- pScrn->display->modes[i], info->PanelXRes, info->PanelYRes);
- continue;
- }
-
- new = xnfcalloc(1, sizeof(DisplayModeRec));
- new->prev = last;
- new->name = xnfalloc(strlen(pScrn->display->modes[i]) + 1);
- strcpy(new->name, pScrn->display->modes[i]);
- new->HDisplay = new->CrtcHDisplay = width;
- new->VDisplay = new->CrtcVDisplay = height;
-
- ddc = pScrn->monitor->DDC;
- for(j=0; j<DET_TIMINGS; j++)
- {
- /*We use native mode clock only*/
- if(ddc->det_mon[j].type == 0){
- new->Clock = ddc->det_mon[j].section.d_timings.clock / 1000;
- break;
- }
- }
-
- if(new->prev) new->prev->next = new;
- last = new;
- if(!first) first = new;
- pScrn->display->virtualX =
- pScrn->virtualX = MAX(pScrn->virtualX, width);
- pScrn->display->virtualY =
- pScrn->virtualY = MAX(pScrn->virtualY, height);
- count++;
- }
- else
- {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Mode name %s is invalid\n", pScrn->display->modes[i]);
- continue;
- }
- }
-
- if(last)
- {
- last->next = first;
- first->prev = last;
- pScrn->modes = first;
-
- /*FIXME: May need to validate line pitch here*/
- {
- int dummy = 0;
- switch(pScrn->depth / 8)
- {
- case 1:
- dummy = 128 - pScrn->virtualX % 128;
- break;
- case 2:
- dummy = 32 - pScrn->virtualX % 32;
- break;
- case 3:
- case 4:
- dummy = 16 - pScrn->virtualX % 16;
- }
- pScrn->displayWidth = pScrn->virtualX + dummy;
- }
-
- }
-
- return count;
-}
-
-
-/* This is called by R128PreInit to validate modes and compute parameters
- for all of the valid modes. */
-static Bool R128PreInitModes(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- ClockRangePtr clockRanges;
- int modesFound;
-
- if(info->isDFP) {
- R128MapMem(pScrn);
- info->BIOSDisplay = R128_BIOS_DISPLAY_FP;
- /* validate if DFP really connected. */
- if(!R128GetDFPInfo(pScrn)) {
- info->isDFP = FALSE;
- info->BIOSDisplay = R128_BIOS_DISPLAY_CRT;
- } else if(!info->isPro2) {
- /* RageProII doesn't support rmx, we can't use native-mode
- stretching for other non-native modes. It will rely on
- whatever VESA modes monitor can support. */
- modesFound = R128ValidateFPModes(pScrn);
- if(modesFound < 1) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "No valid mode found for this DFP/LCD\n");
- R128UnmapMem(pScrn);
- return FALSE;
-
- }
- }
- R128UnmapMem(pScrn);
- }
-
- if(!info->isDFP || info->isPro2) {
- /* Get mode information */
- pScrn->progClock = TRUE;
- clockRanges = xnfcalloc(sizeof(*clockRanges), 1);
- clockRanges->next = NULL;
- clockRanges->minClock = info->pll.min_pll_freq;
- clockRanges->maxClock = info->pll.max_pll_freq * 10;
- clockRanges->clockIndex = -1;
- if (info->HasPanelRegs || info->isDFP) {
- clockRanges->interlaceAllowed = FALSE;
- clockRanges->doubleScanAllowed = FALSE;
- } else {
- clockRanges->interlaceAllowed = TRUE;
- clockRanges->doubleScanAllowed = TRUE;
- }
-
- if(pScrn->monitor->DDC) {
- /*if we still don't know sync range yet, let's try EDID.
- Note that, since we can have dual heads, the Xconfigurator
- may not be able to probe both monitors correctly through
- vbe probe function (R128ProbeDDC). Here we provide an
- additional way to auto-detect sync ranges if they haven't
- been added to XF86Config manually.
- **/
- if(pScrn->monitor->nHsync <= 0)
- R128SetSyncRangeFromEdid(pScrn, 1);
- if(pScrn->monitor->nVrefresh <= 0)
- R128SetSyncRangeFromEdid(pScrn, 0);
- }
-
- modesFound = xf86ValidateModes(pScrn,
- pScrn->monitor->Modes,
- pScrn->display->modes,
- clockRanges,
- NULL, /* linePitches */
- 8 * 64, /* minPitch */
- 8 * 1024, /* maxPitch */
-/*
- * ATI docs say pitchInc must be 8 * 64, but this doesn't permit a pitch of
- * 800 bytes, which is known to work on the Rage128 LF on clamshell iBooks
- */
- 8 * 32, /* pitchInc */
- 128, /* minHeight */
- 2048, /* maxHeight */
- pScrn->display->virtualX,
- pScrn->display->virtualY,
- info->FbMapSize,
- LOOKUP_BEST_REFRESH);
-
- if (modesFound < 1 && info->FBDev) {
- fbdevHWUseBuildinMode(pScrn);
- pScrn->displayWidth = fbdevHWGetLineLength(pScrn)/(pScrn->bitsPerPixel/8);
- modesFound = 1;
- }
-
- if (modesFound == -1) return FALSE;
- xf86PruneDriverModes(pScrn);
- if (!modesFound || !pScrn->modes) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n");
- return FALSE;
- }
- xf86SetCrtcForModes(pScrn, 0);
- }
- /* Set DPI */
- pScrn->currentMode = pScrn->modes;
- xf86PrintModes(pScrn);
-
- xf86SetDpi(pScrn, 0, 0);
-
- /* Get ScreenInit function */
- if (!xf86LoadSubModule(pScrn, "fb")) return FALSE;
-
- info->CurrentLayout.displayWidth = pScrn->displayWidth;
- info->CurrentLayout.mode = pScrn->currentMode;
-
- return TRUE;
-}
-
-/* This is called by R128PreInit to initialize the hardware cursor. */
-static Bool R128PreInitCursor(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- if (!xf86ReturnOptValBool(info->Options, OPTION_SW_CURSOR, FALSE)) {
- if (!xf86LoadSubModule(pScrn, "ramdac")) return FALSE;
- }
- return TRUE;
-}
-
-/* This is called by R128PreInit to initialize hardware acceleration. */
-static Bool R128PreInitAccel(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) {
- if (!xf86LoadSubModule(pScrn, "xaa")) return FALSE;
- }
- return TRUE;
-}
-
-static Bool R128PreInitInt10(ScrnInfoPtr pScrn, xf86Int10InfoPtr *ppInt10)
-{
- R128InfoPtr info = R128PTR(pScrn);
-#if 1 && !defined(__alpha__)
- /* int10 is broken on some Alphas */
- if (xf86LoadSubModule(pScrn, "int10")) {
- xf86DrvMsg(pScrn->scrnIndex,X_INFO,"initializing int10\n");
- *ppInt10 = xf86InitInt10(info->pEnt->index);
- }
-#endif
- return TRUE;
-}
-
-#ifdef XF86DRI
-static Bool R128PreInitDRI(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- if (xf86ReturnOptValBool(info->Options, OPTION_CCE_PIO, FALSE)) {
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Forcing CCE into PIO mode\n");
- info->CCEMode = R128_DEFAULT_CCE_PIO_MODE;
- } else {
- info->CCEMode = R128_DEFAULT_CCE_BM_MODE;
- }
-
- if (xf86ReturnOptValBool(info->Options, OPTION_NO_SECURITY, FALSE)) {
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "WARNING!!! CCE Security checks disabled!!! **********\n");
- info->CCESecure = FALSE;
- } else {
- info->CCESecure = TRUE;
- }
-
- info->agpMode = R128_DEFAULT_AGP_MODE;
- info->agpSize = R128_DEFAULT_AGP_SIZE;
- info->ringSize = R128_DEFAULT_RING_SIZE;
- info->bufSize = R128_DEFAULT_BUFFER_SIZE;
- info->agpTexSize = R128_DEFAULT_AGP_TEX_SIZE;
-
- info->CCEusecTimeout = R128_DEFAULT_CCE_TIMEOUT;
-
- if (!info->IsPCI) {
- if (xf86GetOptValInteger(info->Options,
- OPTION_AGP_MODE, &(info->agpMode))) {
- if (info->agpMode < 1 || info->agpMode > R128_AGP_MAX_MODE) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Illegal AGP Mode: %d\n", info->agpMode);
- return FALSE;
- }
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Using AGP %dx mode\n", info->agpMode);
- }
-
- if (xf86GetOptValInteger(info->Options,
- OPTION_AGP_SIZE, (int *)&(info->agpSize))) {
- switch (info->agpSize) {
- case 4:
- case 8:
- case 16:
- case 32:
- case 64:
- case 128:
- case 256:
- break;
- default:
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Illegal AGP size: %d MB\n", info->agpSize);
- return FALSE;
- }
- }
-
- if (xf86GetOptValInteger(info->Options,
- OPTION_RING_SIZE, &(info->ringSize))) {
- if (info->ringSize < 1 || info->ringSize >= (int)info->agpSize) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Illegal ring buffer size: %d MB\n",
- info->ringSize);
- return FALSE;
- }
- }
-
- if (xf86GetOptValInteger(info->Options,
- OPTION_BUFFER_SIZE, &(info->bufSize))) {
- if (info->bufSize < 1 || info->bufSize >= (int)info->agpSize) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Illegal vertex/indirect buffers size: %d MB\n",
- info->bufSize);
- return FALSE;
- }
- if (info->bufSize > 2) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Illegal vertex/indirect buffers size: %d MB\n",
- info->bufSize);
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Clamping vertex/indirect buffers size to 2 MB\n");
- info->bufSize = 2;
- }
- }
-
- if (info->ringSize + info->bufSize + info->agpTexSize >
- (int)info->agpSize) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Buffers are too big for requested AGP space\n");
- return FALSE;
- }
-
- info->agpTexSize = info->agpSize - (info->ringSize + info->bufSize);
- }
-
- if (xf86GetOptValInteger(info->Options, OPTION_USEC_TIMEOUT,
- &(info->CCEusecTimeout))) {
- /* This option checked by the R128 DRM kernel module */
- }
-
- if (!xf86LoadSubModule(pScrn, "shadowfb")) {
- info->allowPageFlip = 0;
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Couldn't load shadowfb module:\n");
- } else {
- info->allowPageFlip = xf86ReturnOptValBool(info->Options,
- OPTION_PAGE_FLIP,
- FALSE);
- }
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Page flipping %sabled\n",
- info->allowPageFlip ? "en" : "dis");
-
- return TRUE;
-}
-#endif
-
-static void
-R128ProbeDDC(ScrnInfoPtr pScrn, int indx)
-{
- vbeInfoPtr pVbe;
- if (xf86LoadSubModule(pScrn, "vbe")) {
- pVbe = VBEInit(NULL,indx);
- ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
- vbeFree(pVbe);
- }
-}
-
-/* R128PreInit is called once at server startup. */
-Bool R128PreInit(ScrnInfoPtr pScrn, int flags)
-{
- R128InfoPtr info;
- xf86Int10InfoPtr pInt10 = NULL;
-
- R128TRACE(("R128PreInit\n"));
-
- if (pScrn->numEntities != 1) return FALSE;
-
- if (!R128GetRec(pScrn)) return FALSE;
-
- info = R128PTR(pScrn);
-
- info->IsSecondary = FALSE;
- info->IsPrimary = FALSE;
- info->SwitchingMode = FALSE;
-
- info->pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
- if (info->pEnt->location.type != BUS_PCI) goto fail;
-
- if(xf86IsEntityShared(pScrn->entityList[0]))
- {
- if(xf86IsPrimInitDone(pScrn->entityList[0]))
- {
- DevUnion* pPriv;
- R128EntPtr pR128Ent;
- info->IsSecondary = TRUE;
- pPriv = xf86GetEntityPrivate(pScrn->entityList[0],
- getR128EntityIndex());
- pR128Ent = pPriv->ptr;
- if(pR128Ent->BypassSecondary) return FALSE;
- pR128Ent->pSecondaryScrn = pScrn;
- }
- else
- {
- DevUnion* pPriv;
- R128EntPtr pR128Ent;
- info->IsPrimary = TRUE;
- xf86SetPrimInitDone(pScrn->entityList[0]);
- pPriv = xf86GetEntityPrivate(pScrn->entityList[0],
- getR128EntityIndex());
- pR128Ent = pPriv->ptr;
- pR128Ent->pPrimaryScrn = pScrn;
- pR128Ent->IsDRIEnabled = FALSE;
- pR128Ent->BypassSecondary = FALSE;
- pR128Ent->HasSecondary = FALSE;
- pR128Ent->RestorePrimary = FALSE;
- pR128Ent->IsSecondaryRestored = FALSE;
- }
- }
-
- if (flags & PROBE_DETECT) {
- R128ProbeDDC(pScrn, info->pEnt->index);
- return TRUE;
- }
-
- info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index);
- info->PciTag = pciTag(PCI_DEV_BUS(info->PciInfo),
- PCI_DEV_DEV(info->PciInfo),
- PCI_DEV_FUNC(info->PciInfo));
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "PCI bus %d card %d func %d\n",
- PCI_DEV_BUS(info->PciInfo),
- PCI_DEV_DEV(info->PciInfo),
- PCI_DEV_FUNC(info->PciInfo));
-
- if (xf86RegisterResources(info->pEnt->index, 0, ResNone)) goto fail;
- if (xf86SetOperatingState(resVga, info->pEnt->index, ResUnusedOpr)) goto fail;
-
- pScrn->racMemFlags = RAC_FB | RAC_COLORMAP | RAC_VIEWPORT | RAC_CURSOR;
- pScrn->monitor = pScrn->confScreen->monitor;
-
- if (!R128PreInitVisual(pScrn)) goto fail;
-
- /* We can't do this until we have a
- pScrn->display. */
- xf86CollectOptions(pScrn, NULL);
- if (!(info->Options = xalloc(sizeof(R128Options)))) goto fail;
- memcpy(info->Options, R128Options, sizeof(R128Options));
- xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, info->Options);
-
- /* By default, don't do VGA IOs on ppc */
-#if defined(__powerpc__) || defined(__sparc__) || !defined(WITH_VGAHW)
- info->VGAAccess = FALSE;
-#else
- info->VGAAccess = TRUE;
-#endif
-
-#ifdef WITH_VGAHW
- xf86GetOptValBool(info->Options, OPTION_VGA_ACCESS, &info->VGAAccess);
- if (info->VGAAccess) {
- if (!xf86LoadSubModule(pScrn, "vgahw"))
- info->VGAAccess = FALSE;
- else {
- if (!vgaHWGetHWRec(pScrn))
- info->VGAAccess = FALSE;
- }
- if (!info->VGAAccess)
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Loading VGA module failed,"
- " trying to run without it\n");
- } else
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VGAAccess option set to FALSE,"
- " VGA module load skipped\n");
- if (info->VGAAccess)
- vgaHWGetIOBase(VGAHWPTR(pScrn));
-#else
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VGAHW support not compiled, VGA "
- "module load skipped\n");
-#endif
-
-
-
- if (!R128PreInitWeight(pScrn)) goto fail;
-
- if(xf86GetOptValInteger(info->Options, OPTION_VIDEO_KEY, &(info->videoKey))) {
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "video key set to 0x%x\n",
- info->videoKey);
- } else {
- info->videoKey = 0x1E;
- }
-
- if (xf86ReturnOptValBool(info->Options, OPTION_SHOW_CACHE, FALSE)) {
- info->showCache = TRUE;
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ShowCache enabled\n");
- }
-
-#ifdef __powerpc__
- if (xf86ReturnOptValBool(info->Options, OPTION_FBDEV, TRUE))
-#else
- if (xf86ReturnOptValBool(info->Options, OPTION_FBDEV, FALSE))
-#endif
- {
- info->FBDev = TRUE;
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Using framebuffer device\n");
- }
-
- if (info->FBDev) {
- /* check for linux framebuffer device */
- if (!xf86LoadSubModule(pScrn, "fbdevhw")) return FALSE;
- if (!fbdevHWInit(pScrn, info->PciInfo, NULL)) return FALSE;
- pScrn->SwitchMode = fbdevHWSwitchModeWeak();
- pScrn->AdjustFrame = fbdevHWAdjustFrameWeak();
- pScrn->ValidMode = fbdevHWValidModeWeak();
- }
-
- if (!info->FBDev)
- if (!R128PreInitInt10(pScrn, &pInt10)) goto fail;
-
- if (!R128PreInitConfig(pScrn)) goto fail;
-
- if (!R128GetBIOSParameters(pScrn, pInt10)) goto fail;
-
- if (!R128GetPLLParameters(pScrn)) goto fail;
-
- /* Don't fail on this one */
- R128PreInitDDC(pScrn, pInt10);
-
- if (!R128PreInitGamma(pScrn)) goto fail;
-
- if (!R128PreInitModes(pScrn)) goto fail;
-
- if (!R128PreInitCursor(pScrn)) goto fail;
-
- if (!R128PreInitAccel(pScrn)) goto fail;
-
-#ifdef XF86DRI
- if (!R128PreInitDRI(pScrn)) goto fail;
-#endif
-
- /* Free the video bios (if applicable) */
- if (info->VBIOS) {
- xfree(info->VBIOS);
- info->VBIOS = NULL;
- }
-
- /* Free int10 info */
- if (pInt10)
- xf86FreeInt10(pInt10);
-
- xf86DrvMsg(pScrn->scrnIndex, X_NOTICE,
- "For information on using the multimedia capabilities\n\tof this"
- " adapter, please see http://gatos.sf.net.\n");
-
- return TRUE;
-
- fail:
- /* Pre-init failed. */
-
- /* Free the video bios (if applicable) */
- if (info->VBIOS) {
- xfree(info->VBIOS);
- info->VBIOS = NULL;
- }
-
- /* Free int10 info */
- if (pInt10)
- xf86FreeInt10(pInt10);
-
-#ifdef WITH_VGAHW
- if (info->VGAAccess)
- vgaHWFreeHWRec(pScrn);
-#endif
- R128FreeRec(pScrn);
- return FALSE;
-}
-
-/* Load a palette. */
-static void R128LoadPalette(ScrnInfoPtr pScrn, int numColors,
- int *indices, LOCO *colors, VisualPtr pVisual)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int i, j;
- int idx;
- unsigned char r, g, b;
-
- /* If the second monitor is connected, we also
- need to deal with the secondary palette*/
- if (info->IsSecondary) j = 1;
- else j = 0;
-
- PAL_SELECT(j);
-
-
- /* Select palette 0 (main CRTC) if using FP-enabled chip */
- /*if (info->HasPanelRegs || info->isDFP) PAL_SELECT(0);*/
-
- if (info->CurrentLayout.depth == 15) {
- /* 15bpp mode. This sends 32 values. */
- for (i = 0; i < numColors; i++) {
- idx = indices[i];
- r = colors[idx].red;
- g = colors[idx].green;
- b = colors[idx].blue;
- OUTPAL(idx * 8, r, g, b);
- }
- }
- else if (info->CurrentLayout.depth == 16) {
- /* 16bpp mode. This sends 64 values. */
- /* There are twice as many green values as
- there are values for red and blue. So,
- we take each red and blue pair, and
- combine it with each of the two green
- values. */
- for (i = 0; i < numColors; i++) {
- idx = indices[i];
- r = colors[idx / 2].red;
- g = colors[idx].green;
- b = colors[idx / 2].blue;
- OUTPAL(idx * 4, r, g, b);
- }
- }
- else {
- /* 8bpp mode. This sends 256 values. */
- for (i = 0; i < numColors; i++) {
- idx = indices[i];
- r = colors[idx].red;
- b = colors[idx].blue;
- g = colors[idx].green;
- OUTPAL(idx, r, g, b);
- }
- }
-}
-
-static void
-R128BlockHandler(int i, pointer blockData, pointer pTimeout, pointer pReadmask)
-{
- ScreenPtr pScreen = screenInfo.screens[i];
- ScrnInfoPtr pScrn = xf86Screens[i];
- R128InfoPtr info = R128PTR(pScrn);
-
-#ifdef XF86DRI
- if (info->directRenderingEnabled)
- FLUSH_RING();
-#endif
-
- pScreen->BlockHandler = info->BlockHandler;
- (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
- pScreen->BlockHandler = R128BlockHandler;
-
- if(info->VideoTimerCallback) {
- (*info->VideoTimerCallback)(pScrn, currentTime.milliseconds);
- }
-}
-
-/* Called at the start of each server generation. */
-Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen,
- int argc, char **argv)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- BoxRec MemBox;
- int y2;
-
- R128TRACE(("R128ScreenInit %x %d\n", pScrn->memPhysBase, pScrn->fbOffset));
-
-#ifdef XF86DRI
- /* Turn off the CCE for now. */
- info->CCEInUse = FALSE;
- info->indirectBuffer = NULL;
-#endif
-
- if (!R128MapMem(pScrn)) return FALSE;
- pScrn->fbOffset = 0;
- if(info->IsSecondary) pScrn->fbOffset = pScrn->videoRam * 1024;
-#ifdef XF86DRI
- info->fbX = 0;
- info->fbY = 0;
- info->frontOffset = 0;
- info->frontPitch = pScrn->displayWidth;
-#endif
-
- info->PaletteSavedOnVT = FALSE;
-
- R128Save(pScrn);
- if (info->FBDev) {
- if (!fbdevHWModeInit(pScrn, pScrn->currentMode)) return FALSE;
- } else {
- if (!R128ModeInit(pScrn, pScrn->currentMode)) return FALSE;
- }
-
- R128SaveScreen(pScreen, SCREEN_SAVER_ON);
- pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
-
- /* Visual setup */
- miClearVisualTypes();
- if (!miSetVisualTypes(pScrn->depth,
- miGetDefaultVisualMask(pScrn->depth),
- pScrn->rgbBits,
- pScrn->defaultVisual)) return FALSE;
- miSetPixmapDepths ();
-
-#ifdef XF86DRI
- /* Setup DRI after visuals have been
- established, but before fbScreenInit is
- called. fbScreenInit will eventually
- call the driver's InitGLXVisuals call
- back. */
- {
- /* FIXME: When we move to dynamic allocation of back and depth
- buffers, we will want to revisit the following check for 3
- times the virtual size of the screen below. */
- int width_bytes = (pScrn->displayWidth *
- info->CurrentLayout.pixel_bytes);
- int maxy = info->FbMapSize / width_bytes;
-
- if (xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) {
- xf86DrvMsg(scrnIndex, X_WARNING,
- "Acceleration disabled, not initializing the DRI\n");
- info->directRenderingEnabled = FALSE;
- } else if (maxy <= pScrn->virtualY * 3) {
- xf86DrvMsg(scrnIndex, X_WARNING,
- "Static buffer allocation failed -- "
- "need at least %d kB video memory\n",
- (pScrn->displayWidth * pScrn->virtualY *
- info->CurrentLayout.pixel_bytes * 3 + 1023) / 1024);
- info->directRenderingEnabled = FALSE;
- } else {
- if(info->IsSecondary)
- info->directRenderingEnabled = FALSE;
- else
- {
- /* Xinerama has sync problem with DRI, disable it for now */
- if(xf86IsEntityShared(pScrn->entityList[0]))
- {
- info->directRenderingEnabled = FALSE;
- xf86DrvMsg(scrnIndex, X_WARNING,
- "Direct Rendering Disabled -- "
- "Dual-head configuration is not working with DRI "
- "at present.\nPlease use only one Device/Screen "
- "section in your XFConfig file.\n");
- }
- else
- info->directRenderingEnabled =
- R128DRIScreenInit(pScreen);
- if(xf86IsEntityShared(pScrn->entityList[0]))
- {
- DevUnion* pPriv;
- R128EntPtr pR128Ent;
- pPriv = xf86GetEntityPrivate(pScrn->entityList[0],
- getR128EntityIndex());
- pR128Ent = pPriv->ptr;
- pR128Ent->IsDRIEnabled = info->directRenderingEnabled;
- }
- }
- }
- }
-#endif
-
- if (!fbScreenInit (pScreen, info->FB,
- pScrn->virtualX, pScrn->virtualY,
- pScrn->xDpi, pScrn->yDpi, pScrn->displayWidth,
- pScrn->bitsPerPixel))
- return FALSE;
-
- xf86SetBlackWhitePixels(pScreen);
-
- if (pScrn->bitsPerPixel > 8) {
- VisualPtr visual;
-
- visual = pScreen->visuals + pScreen->numVisuals;
- while (--visual >= pScreen->visuals) {
- if ((visual->class | DynamicClass) == DirectColor) {
- visual->offsetRed = pScrn->offset.red;
- visual->offsetGreen = pScrn->offset.green;
- visual->offsetBlue = pScrn->offset.blue;
- visual->redMask = pScrn->mask.red;
- visual->greenMask = pScrn->mask.green;
- visual->blueMask = pScrn->mask.blue;
- }
- }
- }
-
- /* must be after RGB order fixed */
- fbPictureInit (pScreen, 0, 0);
-
- /* Memory manager setup */
-#ifdef XF86DRI
- if (info->directRenderingEnabled) {
- FBAreaPtr fbarea;
- int width_bytes = (pScrn->displayWidth *
- info->CurrentLayout.pixel_bytes);
- int cpp = info->CurrentLayout.pixel_bytes;
- int bufferSize = pScrn->virtualY * width_bytes;
- int l, total;
- int scanlines;
-
- switch (info->CCEMode) {
- case R128_DEFAULT_CCE_PIO_MODE:
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CCE in PIO mode\n");
- break;
- case R128_DEFAULT_CCE_BM_MODE:
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CCE in BM mode\n");
- break;
- default:
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CCE in UNKNOWN mode\n");
- break;
- }
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Using %d MB AGP aperture\n", info->agpSize);
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Using %d MB for the ring buffer\n", info->ringSize);
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Using %d MB for vertex/indirect buffers\n", info->bufSize);
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Using %d MB for AGP textures\n", info->agpTexSize);
-
- /* Try for front, back, depth, and two framebuffers worth of
- * pixmap cache. Should be enough for a fullscreen background
- * image plus some leftovers.
- */
- info->textureSize = info->FbMapSize - 5 * bufferSize;
-
- /* If that gives us less than half the available memory, let's
- * be greedy and grab some more. Sorry, I care more about 3D
- * performance than playing nicely, and you'll get around a full
- * framebuffer's worth of pixmap cache anyway.
- */
- if (info->textureSize < (int)info->FbMapSize / 2) {
- info->textureSize = info->FbMapSize - 4 * bufferSize;
- }
-
- if (info->textureSize > 0) {
- l = R128MinBits((info->textureSize-1) / R128_NR_TEX_REGIONS);
- if (l < R128_LOG_TEX_GRANULARITY) l = R128_LOG_TEX_GRANULARITY;
-
- /* Round the texture size up to the nearest whole number of
- * texture regions. Again, be greedy about this, don't
- * round down.
- */
- info->log2TexGran = l;
- info->textureSize = (info->textureSize >> l) << l;
- } else {
- info->textureSize = 0;
- }
-
- /* Set a minimum usable local texture heap size. This will fit
- * two 256x256x32bpp textures.
- */
- if (info->textureSize < 512 * 1024) {
- info->textureOffset = 0;
- info->textureSize = 0;
- }
-
- total = info->FbMapSize - info->textureSize;
- scanlines = total / width_bytes;
- if (scanlines > 8191) scanlines = 8191;
-
- /* Recalculate the texture offset and size to accomodate any
- * rounding to a whole number of scanlines.
- */
- info->textureOffset = scanlines * width_bytes;
-
- MemBox.x1 = 0;
- MemBox.y1 = 0;
- MemBox.x2 = pScrn->displayWidth;
- MemBox.y2 = scanlines;
-
- if (!xf86InitFBManager(pScreen, &MemBox)) {
- xf86DrvMsg(scrnIndex, X_ERROR,
- "Memory manager initialization to (%d,%d) (%d,%d) failed\n",
- MemBox.x1, MemBox.y1, MemBox.x2, MemBox.y2);
- return FALSE;
- } else {
- int width, height;
-
- xf86DrvMsg(scrnIndex, X_INFO,
- "Memory manager initialized to (%d,%d) (%d,%d)\n",
- MemBox.x1, MemBox.y1, MemBox.x2, MemBox.y2);
- if ((fbarea = xf86AllocateOffscreenArea(pScreen,
- pScrn->displayWidth,
- 2, 0, NULL, NULL, NULL))) {
- xf86DrvMsg(scrnIndex, X_INFO,
- "Reserved area from (%d,%d) to (%d,%d)\n",
- fbarea->box.x1, fbarea->box.y1,
- fbarea->box.x2, fbarea->box.y2);
- } else {
- xf86DrvMsg(scrnIndex, X_ERROR, "Unable to reserve area\n");
- }
- if (xf86QueryLargestOffscreenArea(pScreen, &width,
- &height, 0, 0, 0)) {
- xf86DrvMsg(scrnIndex, X_INFO,
- "Largest offscreen area available: %d x %d\n",
- width, height);
- }
- }
-
- /* Allocate the shared back buffer */
- if ((fbarea = xf86AllocateOffscreenArea(pScreen,
- pScrn->virtualX,
- pScrn->virtualY,
- 32, NULL, NULL, NULL))) {
- xf86DrvMsg(scrnIndex, X_INFO,
- "Reserved back buffer from (%d,%d) to (%d,%d)\n",
- fbarea->box.x1, fbarea->box.y1,
- fbarea->box.x2, fbarea->box.y2);
-
- info->backX = fbarea->box.x1;
- info->backY = fbarea->box.y1;
- info->backOffset = (fbarea->box.y1 * width_bytes +
- fbarea->box.x1 * cpp);
- info->backPitch = pScrn->displayWidth;
- } else {
- xf86DrvMsg(scrnIndex, X_ERROR, "Unable to reserve back buffer\n");
- info->backX = -1;
- info->backY = -1;
- info->backOffset = -1;
- info->backPitch = -1;
- }
-
- /* Allocate the shared depth buffer */
- if ((fbarea = xf86AllocateOffscreenArea(pScreen,
- pScrn->virtualX,
- pScrn->virtualY + 1,
- 32, NULL, NULL, NULL))) {
- xf86DrvMsg(scrnIndex, X_INFO,
- "Reserved depth buffer from (%d,%d) to (%d,%d)\n",
- fbarea->box.x1, fbarea->box.y1,
- fbarea->box.x2, fbarea->box.y2);
-
- info->depthX = fbarea->box.x1;
- info->depthY = fbarea->box.y1;
- info->depthOffset = (fbarea->box.y1 * width_bytes +
- fbarea->box.x1 * cpp);
- info->depthPitch = pScrn->displayWidth;
- info->spanOffset = ((fbarea->box.y2 - 1) * width_bytes +
- fbarea->box.x1 * cpp);
- xf86DrvMsg(scrnIndex, X_INFO,
- "Reserved depth span from (%d,%d) offset 0x%x\n",
- fbarea->box.x1, fbarea->box.y2 - 1, info->spanOffset);
- } else {
- xf86DrvMsg(scrnIndex, X_ERROR, "Unable to reserve depth buffer\n");
- info->depthX = -1;
- info->depthY = -1;
- info->depthOffset = -1;
- info->depthPitch = -1;
- info->spanOffset = -1;
- }
-
- xf86DrvMsg(scrnIndex, X_INFO,
- "Reserved %d kb for textures at offset 0x%x\n",
- info->textureSize/1024, info->textureOffset);
- }
- else
-#endif
- {
- MemBox.x1 = 0;
- MemBox.y1 = 0;
- MemBox.x2 = pScrn->displayWidth;
- y2 = (info->FbMapSize
- / (pScrn->displayWidth *
- info->CurrentLayout.pixel_bytes));
- /* The acceleration engine uses 14 bit
- signed coordinates, so we can't have any
- drawable caches beyond this region. */
- if (y2 > 8191) y2 = 8191;
- MemBox.y2 = y2;
-
- if (!xf86InitFBManager(pScreen, &MemBox)) {
- xf86DrvMsg(scrnIndex, X_ERROR,
- "Memory manager initialization to (%d,%d) (%d,%d) failed\n",
- MemBox.x1, MemBox.y1, MemBox.x2, MemBox.y2);
- return FALSE;
- } else {
- int width, height;
- FBAreaPtr fbarea;
-
- xf86DrvMsg(scrnIndex, X_INFO,
- "Memory manager initialized to (%d,%d) (%d,%d)\n",
- MemBox.x1, MemBox.y1, MemBox.x2, MemBox.y2);
- if ((fbarea = xf86AllocateOffscreenArea(pScreen, pScrn->displayWidth,
- 2, 0, NULL, NULL, NULL))) {
- xf86DrvMsg(scrnIndex, X_INFO,
- "Reserved area from (%d,%d) to (%d,%d)\n",
- fbarea->box.x1, fbarea->box.y1,
- fbarea->box.x2, fbarea->box.y2);
- } else {
- xf86DrvMsg(scrnIndex, X_ERROR, "Unable to reserve area\n");
- }
- if (xf86QueryLargestOffscreenArea(pScreen, &width, &height,
- 0, 0, 0)) {
- xf86DrvMsg(scrnIndex, X_INFO,
- "Largest offscreen area available: %d x %d\n",
- width, height);
- }
- }
- }
-
- /* Acceleration setup */
- if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) {
- if (R128AccelInit(pScreen)) {
- xf86DrvMsg(scrnIndex, X_INFO, "Acceleration enabled\n");
- info->accelOn = TRUE;
- } else {
- xf86DrvMsg(scrnIndex, X_ERROR,
- "Acceleration initialization failed\n");
- xf86DrvMsg(scrnIndex, X_INFO, "Acceleration disabled\n");
- info->accelOn = FALSE;
- }
- } else {
- xf86DrvMsg(scrnIndex, X_INFO, "Acceleration disabled\n");
- info->accelOn = FALSE;
- }
-
- /* DGA setup */
- R128DGAInit(pScreen);
-
- /* Backing store setup */
- miInitializeBackingStore(pScreen);
- xf86SetBackingStore(pScreen);
-
- /* Set Silken Mouse */
- xf86SetSilkenMouse(pScreen);
-
- /* Cursor setup */
- miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
-
- /* Hardware cursor setup */
- if (!xf86ReturnOptValBool(info->Options, OPTION_SW_CURSOR, FALSE)) {
- if (R128CursorInit(pScreen)) {
- int width, height;
-
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Using hardware cursor (scanline %ld)\n",
- info->cursor_start / pScrn->displayWidth);
- if (xf86QueryLargestOffscreenArea(pScreen, &width, &height,
- 0, 0, 0)) {
- xf86DrvMsg(scrnIndex, X_INFO,
- "Largest offscreen area available: %d x %d\n",
- width, height);
- }
- } else {
- xf86DrvMsg(scrnIndex, X_ERROR,
- "Hardware cursor initialization failed\n");
- xf86DrvMsg(scrnIndex, X_INFO, "Using software cursor\n");
- }
- } else {
- info->cursor_start = 0;
- xf86DrvMsg(scrnIndex, X_INFO, "Using software cursor\n");
- }
-
- /* Colormap setup */
- if (!miCreateDefColormap(pScreen)) return FALSE;
- if (!xf86HandleColormaps(pScreen, 256, info->dac6bits ? 6 : 8,
- (info->FBDev ? fbdevHWLoadPaletteWeak() :
- R128LoadPalette), NULL,
- CMAP_PALETTED_TRUECOLOR
- | CMAP_RELOAD_ON_MODE_SWITCH
-#if 0 /* This option messes up text mode! (eich@suse.de) */
- | CMAP_LOAD_EVEN_IF_OFFSCREEN
-#endif
- )) return FALSE;
-
- /* DPMS setup - FIXME: also for mirror mode in non-fbdev case? - Michel */
- if (info->FBDev)
- xf86DPMSInit(pScreen, fbdevHWDPMSSetWeak(), 0);
-
- else {
- if (info->DisplayType == MT_LCD)
- xf86DPMSInit(pScreen, R128DisplayPowerManagementSetLCD, 0);
- else
- xf86DPMSInit(pScreen, R128DisplayPowerManagementSet, 0);
- }
-
- if (!info->IsSecondary)
- R128InitVideo(pScreen);
-
- /* Provide SaveScreen */
- pScreen->SaveScreen = R128SaveScreen;
-
- /* Wrap CloseScreen */
- info->CloseScreen = pScreen->CloseScreen;
- pScreen->CloseScreen = R128CloseScreen;
-
- /* Note unused options */
- if (serverGeneration == 1)
- xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
-
-#ifdef XF86DRI
- /* DRI finalization */
- if (info->directRenderingEnabled) {
- /* Now that mi, fb, drm and others have
- done their thing, complete the DRI
- setup. */
- info->directRenderingEnabled = R128DRIFinishScreenInit(pScreen);
- }
- if (info->directRenderingEnabled) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering enabled\n");
- } else {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Direct rendering disabled\n");
- }
-#endif
-
- info->BlockHandler = pScreen->BlockHandler;
- pScreen->BlockHandler = R128BlockHandler;
-
- return TRUE;
-}
-
-/* Write common registers (initialized to 0). */
-static void R128RestoreCommonRegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- OUTREG(R128_FP_GEN_CNTL, restore->fp_gen_cntl | R128_FP_BLANK_DIS);
-
- OUTREG(R128_OVR_CLR, restore->ovr_clr);
- OUTREG(R128_OVR_WID_LEFT_RIGHT, restore->ovr_wid_left_right);
- OUTREG(R128_OVR_WID_TOP_BOTTOM, restore->ovr_wid_top_bottom);
- OUTREG(R128_OV0_SCALE_CNTL, restore->ov0_scale_cntl);
- OUTREG(R128_MPP_TB_CONFIG, restore->mpp_tb_config );
- OUTREG(R128_MPP_GP_CONFIG, restore->mpp_gp_config );
- OUTREG(R128_SUBPIC_CNTL, restore->subpic_cntl);
- OUTREG(R128_VIPH_CONTROL, restore->viph_control);
- OUTREG(R128_I2C_CNTL_1, restore->i2c_cntl_1);
- OUTREG(R128_GEN_INT_CNTL, restore->gen_int_cntl);
- OUTREG(R128_CAP0_TRIG_CNTL, restore->cap0_trig_cntl);
- OUTREG(R128_CAP1_TRIG_CNTL, restore->cap1_trig_cntl);
- OUTREG(R128_BUS_CNTL, restore->bus_cntl);
- OUTREG(R128_CONFIG_CNTL, restore->config_cntl);
-}
-
-/* Write CRTC registers. */
-static void R128RestoreCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- OUTREG(R128_CRTC_GEN_CNTL, restore->crtc_gen_cntl);
-
- OUTREGP(R128_CRTC_EXT_CNTL, restore->crtc_ext_cntl,
- R128_CRTC_VSYNC_DIS | R128_CRTC_HSYNC_DIS | R128_CRTC_DISPLAY_DIS);
-
- OUTREGP(R128_DAC_CNTL, restore->dac_cntl,
- R128_DAC_RANGE_CNTL | R128_DAC_BLANKING);
-
- OUTREG(R128_CRTC_H_TOTAL_DISP, restore->crtc_h_total_disp);
- OUTREG(R128_CRTC_H_SYNC_STRT_WID, restore->crtc_h_sync_strt_wid);
- OUTREG(R128_CRTC_V_TOTAL_DISP, restore->crtc_v_total_disp);
- OUTREG(R128_CRTC_V_SYNC_STRT_WID, restore->crtc_v_sync_strt_wid);
- OUTREG(R128_CRTC_OFFSET, restore->crtc_offset);
- OUTREG(R128_CRTC_OFFSET_CNTL, restore->crtc_offset_cntl);
- OUTREG(R128_CRTC_PITCH, restore->crtc_pitch);
-}
-
-/* Write CRTC2 registers. */
-static void R128RestoreCrtc2Registers(ScrnInfoPtr pScrn,
- R128SavePtr restore)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- OUTREGP(R128_CRTC2_GEN_CNTL, restore->crtc2_gen_cntl,
- R128_CRTC2_DISP_DIS);
-
- OUTREG(R128_CRTC2_H_TOTAL_DISP, restore->crtc2_h_total_disp);
- OUTREG(R128_CRTC2_H_SYNC_STRT_WID, restore->crtc2_h_sync_strt_wid);
- OUTREG(R128_CRTC2_V_TOTAL_DISP, restore->crtc2_v_total_disp);
- OUTREG(R128_CRTC2_V_SYNC_STRT_WID, restore->crtc2_v_sync_strt_wid);
- OUTREG(R128_CRTC2_OFFSET, restore->crtc2_offset);
- OUTREG(R128_CRTC2_OFFSET_CNTL, restore->crtc2_offset_cntl);
- OUTREG(R128_CRTC2_PITCH, restore->crtc2_pitch);
-}
-
-/* Write flat panel registers */
-static void R128RestoreFPRegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- CARD32 tmp;
-
- if (info->BIOSDisplay != R128_DUALHEAD)
- OUTREG(R128_CRTC2_GEN_CNTL, restore->crtc2_gen_cntl);
- OUTREG(R128_FP_HORZ_STRETCH, restore->fp_horz_stretch);
- OUTREG(R128_FP_VERT_STRETCH, restore->fp_vert_stretch);
- OUTREG(R128_FP_CRTC_H_TOTAL_DISP, restore->fp_crtc_h_total_disp);
- OUTREG(R128_FP_CRTC_V_TOTAL_DISP, restore->fp_crtc_v_total_disp);
- OUTREG(R128_FP_H_SYNC_STRT_WID, restore->fp_h_sync_strt_wid);
- OUTREG(R128_FP_V_SYNC_STRT_WID, restore->fp_v_sync_strt_wid);
- OUTREG(R128_TMDS_CRC, restore->tmds_crc);
- OUTREG(R128_FP_PANEL_CNTL, restore->fp_panel_cntl);
- OUTREG(R128_FP_GEN_CNTL, restore->fp_gen_cntl & ~(CARD32)R128_FP_BLANK_DIS);
-
- if(info->isDFP) return;
-
- tmp = INREG(R128_LVDS_GEN_CNTL);
- if ((tmp & (R128_LVDS_ON | R128_LVDS_BLON)) ==
- (restore->lvds_gen_cntl & (R128_LVDS_ON | R128_LVDS_BLON))) {
- OUTREG(R128_LVDS_GEN_CNTL, restore->lvds_gen_cntl);
- } else {
- if (restore->lvds_gen_cntl & (R128_LVDS_ON | R128_LVDS_BLON)) {
- OUTREG(R128_LVDS_GEN_CNTL,
- restore->lvds_gen_cntl & (CARD32)~R128_LVDS_BLON);
- usleep(R128PTR(pScrn)->PanelPwrDly * 1000);
- OUTREG(R128_LVDS_GEN_CNTL, restore->lvds_gen_cntl);
- } else {
- OUTREG(R128_LVDS_GEN_CNTL, restore->lvds_gen_cntl | R128_LVDS_BLON);
- usleep(R128PTR(pScrn)->PanelPwrDly * 1000);
- OUTREG(R128_LVDS_GEN_CNTL, restore->lvds_gen_cntl);
- }
- }
-}
-
-static void R128PLLWaitForReadUpdateComplete(ScrnInfoPtr pScrn)
-{
- while (INPLL(pScrn, R128_PPLL_REF_DIV) & R128_PPLL_ATOMIC_UPDATE_R);
-}
-
-static void R128PLLWriteUpdate(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- while (INPLL(pScrn, R128_PPLL_REF_DIV) & R128_PPLL_ATOMIC_UPDATE_R);
-
- OUTPLLP(pScrn, R128_PPLL_REF_DIV, R128_PPLL_ATOMIC_UPDATE_W,
- ~R128_PPLL_ATOMIC_UPDATE_W);
-
-}
-
-static void R128PLL2WaitForReadUpdateComplete(ScrnInfoPtr pScrn)
-{
- while (INPLL(pScrn, R128_P2PLL_REF_DIV) & R128_P2PLL_ATOMIC_UPDATE_R);
-}
-
-static void R128PLL2WriteUpdate(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- while (INPLL(pScrn, R128_P2PLL_REF_DIV) & R128_P2PLL_ATOMIC_UPDATE_R);
-
- OUTPLLP(pScrn, R128_P2PLL_REF_DIV,
- R128_P2PLL_ATOMIC_UPDATE_W,
- ~(R128_P2PLL_ATOMIC_UPDATE_W));
-}
-
-/* Write PLL registers. */
-static void R128RestorePLLRegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
-
- OUTPLLP(pScrn, R128_VCLK_ECP_CNTL,
- R128_VCLK_SRC_SEL_CPUCLK,
- ~(R128_VCLK_SRC_SEL_MASK));
-
- OUTPLLP(pScrn,
- R128_PPLL_CNTL,
- R128_PPLL_RESET
- | R128_PPLL_ATOMIC_UPDATE_EN
- | R128_PPLL_VGA_ATOMIC_UPDATE_EN,
- ~(R128_PPLL_RESET
- | R128_PPLL_ATOMIC_UPDATE_EN
- | R128_PPLL_VGA_ATOMIC_UPDATE_EN));
-
- OUTREGP(R128_CLOCK_CNTL_INDEX, R128_PLL_DIV_SEL, ~(R128_PLL_DIV_SEL));
-
-/* R128PLLWaitForReadUpdateComplete(pScrn);*/
- OUTPLLP(pScrn, R128_PPLL_REF_DIV,
- restore->ppll_ref_div, ~R128_PPLL_REF_DIV_MASK);
-/* R128PLLWriteUpdate(pScrn);
-
- R128PLLWaitForReadUpdateComplete(pScrn);*/
- OUTPLLP(pScrn, R128_PPLL_DIV_3,
- restore->ppll_div_3, ~R128_PPLL_FB3_DIV_MASK);
-/* R128PLLWriteUpdate(pScrn);*/
- OUTPLLP(pScrn, R128_PPLL_DIV_3,
- restore->ppll_div_3, ~R128_PPLL_POST3_DIV_MASK);
-
- R128PLLWriteUpdate(pScrn);
- R128PLLWaitForReadUpdateComplete(pScrn);
-
- OUTPLL(R128_HTOTAL_CNTL, restore->htotal_cntl);
-/* R128PLLWriteUpdate(pScrn);*/
-
- OUTPLLP(pScrn, R128_PPLL_CNTL, 0, ~(R128_PPLL_RESET
- | R128_PPLL_SLEEP
- | R128_PPLL_ATOMIC_UPDATE_EN
- | R128_PPLL_VGA_ATOMIC_UPDATE_EN));
-
- R128TRACE(("Wrote: 0x%08x 0x%08x 0x%08x (0x%08x)\n",
- restore->ppll_ref_div,
- restore->ppll_div_3,
- restore->htotal_cntl,
- INPLL(pScrn, R128_PPLL_CNTL)));
- R128TRACE(("Wrote: rd=%d, fd=%d, pd=%d\n",
- restore->ppll_ref_div & R128_PPLL_REF_DIV_MASK,
- restore->ppll_div_3 & R128_PPLL_FB3_DIV_MASK,
- (restore->ppll_div_3 & R128_PPLL_POST3_DIV_MASK) >> 16));
-
- usleep(5000); /* let the clock lock */
-
- OUTPLLP(pScrn, R128_VCLK_ECP_CNTL,
- R128_VCLK_SRC_SEL_PPLLCLK,
- ~(R128_VCLK_SRC_SEL_MASK));
-
-}
-
-/* Write PLL2 registers. */
-static void R128RestorePLL2Registers(ScrnInfoPtr pScrn, R128SavePtr restore)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- OUTPLLP(pScrn, R128_V2CLK_VCLKTV_CNTL,
- R128_V2CLK_SRC_SEL_CPUCLK,
- ~R128_V2CLK_SRC_SEL_MASK);
-
- OUTPLLP(pScrn,
- R128_P2PLL_CNTL,
- R128_P2PLL_RESET
- | R128_P2PLL_ATOMIC_UPDATE_EN
- | R128_P2PLL_VGA_ATOMIC_UPDATE_EN,
- ~(R128_P2PLL_RESET
- | R128_P2PLL_ATOMIC_UPDATE_EN
- | R128_P2PLL_VGA_ATOMIC_UPDATE_EN));
-
-#if 1
- OUTREGP(R128_CLOCK_CNTL_INDEX, 0, R128_PLL2_DIV_SEL_MASK);
-#endif
-
- /*R128PLL2WaitForReadUpdateComplete(pScrn);*/
-
- OUTPLLP(pScrn, R128_P2PLL_REF_DIV, restore->p2pll_ref_div, ~R128_P2PLL_REF_DIV_MASK);
-
-/* R128PLL2WriteUpdate(pScrn);
- R128PLL2WaitForReadUpdateComplete(pScrn);*/
-
- OUTPLLP(pScrn, R128_P2PLL_DIV_0,
- restore->p2pll_div_0, ~R128_P2PLL_FB0_DIV_MASK);
-
-/* R128PLL2WriteUpdate(pScrn);
- R128PLL2WaitForReadUpdateComplete(pScrn);*/
-
- OUTPLLP(pScrn, R128_P2PLL_DIV_0,
- restore->p2pll_div_0, ~R128_P2PLL_POST0_DIV_MASK);
-
- R128PLL2WriteUpdate(pScrn);
- R128PLL2WaitForReadUpdateComplete(pScrn);
-
- OUTPLL(R128_HTOTAL2_CNTL, restore->htotal_cntl2);
-
-/* R128PLL2WriteUpdate(pScrn);*/
-
- OUTPLLP(pScrn, R128_P2PLL_CNTL, 0, ~(R128_P2PLL_RESET
- | R128_P2PLL_SLEEP
- | R128_P2PLL_ATOMIC_UPDATE_EN
- | R128_P2PLL_VGA_ATOMIC_UPDATE_EN));
-
- R128TRACE(("Wrote: 0x%08x 0x%08x 0x%08x (0x%08x)\n",
- restore->p2pll_ref_div,
- restore->p2pll_div_0,
- restore->htotal_cntl2,
- INPLL(pScrn, RADEON_P2PLL_CNTL)));
- R128TRACE(("Wrote: rd=%d, fd=%d, pd=%d\n",
- restore->p2pll_ref_div & RADEON_P2PLL_REF_DIV_MASK,
- restore->p2pll_div_0 & RADEON_P2PLL_FB3_DIV_MASK,
- (restore->p2pll_div_0 & RADEON_P2PLL_POST3_DIV_MASK) >>16));
-
- usleep(5000); /* Let the clock to lock */
-
- OUTPLLP(pScrn, R128_V2CLK_VCLKTV_CNTL,
- R128_V2CLK_SRC_SEL_P2PLLCLK,
- ~R128_V2CLK_SRC_SEL_MASK);
-
-}
-
-/* Write DDA registers. */
-static void R128RestoreDDARegisters(ScrnInfoPtr pScrn, R128SavePtr restore)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- OUTREG(R128_DDA_CONFIG, restore->dda_config);
- OUTREG(R128_DDA_ON_OFF, restore->dda_on_off);
-}
-
-/* Write DDA registers. */
-static void R128RestoreDDA2Registers(ScrnInfoPtr pScrn, R128SavePtr restore)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- OUTREG(R128_DDA2_CONFIG, restore->dda2_config);
- OUTREG(R128_DDA2_ON_OFF, restore->dda2_on_off);
-}
-
-/* Write palette data. */
-static void R128RestorePalette(ScrnInfoPtr pScrn, R128SavePtr restore)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int i;
-
- if (!restore->palette_valid) return;
-
- PAL_SELECT(1);
- OUTPAL_START(0);
- for (i = 0; i < 256; i++) {
- R128WaitForFifo(pScrn, 32); /* delay */
- OUTPAL_NEXT_CARD32(restore->palette2[i]);
- }
-
- PAL_SELECT(0);
- OUTPAL_START(0);
- for (i = 0; i < 256; i++) {
- R128WaitForFifo(pScrn, 32); /* delay */
- OUTPAL_NEXT_CARD32(restore->palette[i]);
- }
-
-}
-
-/* Write out state to define a new video mode. */
-static void R128RestoreMode(ScrnInfoPtr pScrn, R128SavePtr restore)
-{
- R128InfoPtr info = R128PTR(pScrn);
- DevUnion* pPriv;
- R128EntPtr pR128Ent;
- static R128SaveRec restore0;
-
- R128TRACE(("R128RestoreMode(%p)\n", restore));
- if(!info->HasCRTC2)
- {
- R128RestoreCommonRegisters(pScrn, restore);
- R128RestoreDDARegisters(pScrn, restore);
- R128RestoreCrtcRegisters(pScrn, restore);
- if((info->DisplayType == MT_DFP) ||
- (info->DisplayType == MT_LCD))
- {
- R128RestoreFPRegisters(pScrn, restore);
- }
- R128RestorePLLRegisters(pScrn, restore);
- return;
- }
-
- pPriv = xf86GetEntityPrivate(pScrn->entityList[0],
- getR128EntityIndex());
- pR128Ent = pPriv->ptr;
-
-
- /*****
- When changing mode with Dual-head card (VE/M6), care must
- be taken for the special order in setting registers. CRTC2 has
- to be set before changing CRTC_EXT register.
- In the dual-head setup, X server calls this routine twice with
- primary and secondary pScrn pointers respectively. The calls
- can come with different order. Regardless the order of X server issuing
- the calls, we have to ensure we set registers in the right order!!!
- Otherwise we may get a blank screen.
- *****/
-
- if(info->IsSecondary)
- {
- if (!pR128Ent->RestorePrimary && !info->SwitchingMode)
- R128RestoreCommonRegisters(pScrn, restore);
- R128RestoreDDA2Registers(pScrn, restore);
- R128RestoreCrtc2Registers(pScrn, restore);
- R128RestorePLL2Registers(pScrn, restore);
-
- if(info->SwitchingMode) return;
-
- pR128Ent->IsSecondaryRestored = TRUE;
-
- if(pR128Ent->RestorePrimary)
- {
- R128InfoPtr info0 = R128PTR(pR128Ent->pPrimaryScrn);
- pR128Ent->RestorePrimary = FALSE;
-
- R128RestoreCrtcRegisters(pScrn, &restore0);
- if((info0->DisplayType == MT_DFP) ||
- (info0->DisplayType == MT_LCD))
- {
- R128RestoreFPRegisters(pScrn, &restore0);
- }
-
- R128RestorePLLRegisters(pScrn, &restore0);
- pR128Ent->IsSecondaryRestored = FALSE;
-
- }
- }
- else
- {
- if (!pR128Ent->IsSecondaryRestored)
- R128RestoreCommonRegisters(pScrn, restore);
- R128RestoreDDARegisters(pScrn, restore);
- if(!pR128Ent->HasSecondary || pR128Ent->IsSecondaryRestored
- || info->SwitchingMode)
- {
- pR128Ent->IsSecondaryRestored = FALSE;
- R128RestoreCrtcRegisters(pScrn, restore);
- if((info->DisplayType == MT_DFP) ||
- (info->DisplayType == MT_LCD))
- {
- R128RestoreFPRegisters(pScrn, restore);
- }
- R128RestorePLLRegisters(pScrn, restore);
- }
- else
- {
- memcpy(&restore0, restore, sizeof(restore0));
- pR128Ent->RestorePrimary = TRUE;
- }
- }
-
- R128RestorePalette(pScrn, restore);
-}
-
-/* Read common registers. */
-static void R128SaveCommonRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- save->ovr_clr = INREG(R128_OVR_CLR);
- save->ovr_wid_left_right = INREG(R128_OVR_WID_LEFT_RIGHT);
- save->ovr_wid_top_bottom = INREG(R128_OVR_WID_TOP_BOTTOM);
- save->ov0_scale_cntl = INREG(R128_OV0_SCALE_CNTL);
- save->mpp_tb_config = INREG(R128_MPP_TB_CONFIG);
- save->mpp_gp_config = INREG(R128_MPP_GP_CONFIG);
- save->subpic_cntl = INREG(R128_SUBPIC_CNTL);
- save->viph_control = INREG(R128_VIPH_CONTROL);
- save->i2c_cntl_1 = INREG(R128_I2C_CNTL_1);
- save->gen_int_cntl = INREG(R128_GEN_INT_CNTL);
- save->cap0_trig_cntl = INREG(R128_CAP0_TRIG_CNTL);
- save->cap1_trig_cntl = INREG(R128_CAP1_TRIG_CNTL);
- save->bus_cntl = INREG(R128_BUS_CNTL);
- save->config_cntl = INREG(R128_CONFIG_CNTL);
-}
-
-/* Read CRTC registers. */
-static void R128SaveCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- save->crtc_gen_cntl = INREG(R128_CRTC_GEN_CNTL);
- save->crtc_ext_cntl = INREG(R128_CRTC_EXT_CNTL);
- save->dac_cntl = INREG(R128_DAC_CNTL);
- save->crtc_h_total_disp = INREG(R128_CRTC_H_TOTAL_DISP);
- save->crtc_h_sync_strt_wid = INREG(R128_CRTC_H_SYNC_STRT_WID);
- save->crtc_v_total_disp = INREG(R128_CRTC_V_TOTAL_DISP);
- save->crtc_v_sync_strt_wid = INREG(R128_CRTC_V_SYNC_STRT_WID);
- save->crtc_offset = INREG(R128_CRTC_OFFSET);
- save->crtc_offset_cntl = INREG(R128_CRTC_OFFSET_CNTL);
- save->crtc_pitch = INREG(R128_CRTC_PITCH);
-}
-
-/* Read flat panel registers */
-static void R128SaveFPRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- if (info->BIOSDisplay != R128_DUALHEAD)
- save->crtc2_gen_cntl = INREG(R128_CRTC2_GEN_CNTL);
- save->fp_crtc_h_total_disp = INREG(R128_FP_CRTC_H_TOTAL_DISP);
- save->fp_crtc_v_total_disp = INREG(R128_FP_CRTC_V_TOTAL_DISP);
- save->fp_gen_cntl = INREG(R128_FP_GEN_CNTL);
- save->fp_h_sync_strt_wid = INREG(R128_FP_H_SYNC_STRT_WID);
- save->fp_horz_stretch = INREG(R128_FP_HORZ_STRETCH);
- save->fp_panel_cntl = INREG(R128_FP_PANEL_CNTL);
- save->fp_v_sync_strt_wid = INREG(R128_FP_V_SYNC_STRT_WID);
- save->fp_vert_stretch = INREG(R128_FP_VERT_STRETCH);
- save->lvds_gen_cntl = INREG(R128_LVDS_GEN_CNTL);
- save->tmds_crc = INREG(R128_TMDS_CRC);
- save->tmds_transmitter_cntl = INREG(R128_TMDS_TRANSMITTER_CNTL);
-}
-
-/* Read CRTC2 registers. */
-static void R128SaveCrtc2Registers(ScrnInfoPtr pScrn, R128SavePtr save)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- save->crtc2_gen_cntl = INREG(R128_CRTC2_GEN_CNTL);
- save->crtc2_h_total_disp = INREG(R128_CRTC2_H_TOTAL_DISP);
- save->crtc2_h_sync_strt_wid = INREG(R128_CRTC2_H_SYNC_STRT_WID);
- save->crtc2_v_total_disp = INREG(R128_CRTC2_V_TOTAL_DISP);
- save->crtc2_v_sync_strt_wid = INREG(R128_CRTC2_V_SYNC_STRT_WID);
- save->crtc2_offset = INREG(R128_CRTC2_OFFSET);
- save->crtc2_offset_cntl = INREG(R128_CRTC2_OFFSET_CNTL);
- save->crtc2_pitch = INREG(R128_CRTC2_PITCH);
-}
-
-/* Read PLL registers. */
-static void R128SavePLLRegisters(ScrnInfoPtr pScrn, R128SavePtr save)
-{
- save->ppll_ref_div = INPLL(pScrn, R128_PPLL_REF_DIV);
- save->ppll_div_3 = INPLL(pScrn, R128_PPLL_DIV_3);
- save->htotal_cntl = INPLL(pScrn, R128_HTOTAL_CNTL);
-
- R128TRACE(("Read: 0x%08x 0x%08x 0x%08x\n",
- save->ppll_ref_div,
- save->ppll_div_3,
- save->htotal_cntl));
- R128TRACE(("Read: rd=%d, fd=%d, pd=%d\n",
- save->ppll_ref_div & R128_PPLL_REF_DIV_MASK,
- save->ppll_div_3 & R128_PPLL_FB3_DIV_MASK,
- (save->ppll_div_3 & R128_PPLL_POST3_DIV_MASK) >> 16));
-}
-
-/* Read PLL2 registers. */
-static void R128SavePLL2Registers(ScrnInfoPtr pScrn, R128SavePtr save)
-{
- save->p2pll_ref_div = INPLL(pScrn, R128_P2PLL_REF_DIV);
- save->p2pll_div_0 = INPLL(pScrn, R128_P2PLL_DIV_0);
- save->htotal_cntl2 = INPLL(pScrn, R128_HTOTAL2_CNTL);
-
- R128TRACE(("Read: 0x%08x 0x%08x 0x%08x\n",
- save->p2pll_ref_div,
- save->p2pll_div_0,
- save->htotal_cntl2));
- R128TRACE(("Read: rd=%d, fd=%d, pd=%d\n",
- save->p2pll_ref_div & R128_P2PLL_REF_DIV_MASK,
- save->p2pll_div_0 & R128_P2PLL_FB0_DIV_MASK,
- (save->p2pll_div_0 & R128_P2PLL_POST0_DIV_MASK) >> 16));
-}
-
-/* Read DDA registers. */
-static void R128SaveDDARegisters(ScrnInfoPtr pScrn, R128SavePtr save)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- save->dda_config = INREG(R128_DDA_CONFIG);
- save->dda_on_off = INREG(R128_DDA_ON_OFF);
-}
-
-/* Read DDA2 registers. */
-static void R128SaveDDA2Registers(ScrnInfoPtr pScrn, R128SavePtr save)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
-
- save->dda2_config = INREG(R128_DDA2_CONFIG);
- save->dda2_on_off = INREG(R128_DDA2_ON_OFF);
-}
-
-/* Read palette data. */
-static void R128SavePalette(ScrnInfoPtr pScrn, R128SavePtr save)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int i;
-
- PAL_SELECT(1);
- INPAL_START(0);
- for (i = 0; i < 256; i++) save->palette2[i] = INPAL_NEXT();
- PAL_SELECT(0);
- INPAL_START(0);
- for (i = 0; i < 256; i++) save->palette[i] = INPAL_NEXT();
- save->palette_valid = TRUE;
-}
-
-/* Save state that defines current video mode. */
-static void R128SaveMode(ScrnInfoPtr pScrn, R128SavePtr save)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- R128TRACE(("R128SaveMode(%p)\n", save));
-
- if(info->IsSecondary)
- {
- R128SaveCrtc2Registers(pScrn, save);
- R128SavePLL2Registers(pScrn, save);
- R128SaveDDA2Registers(pScrn, save);
- }
- else
- {
- R128SaveCommonRegisters(pScrn, save);
- R128SaveCrtcRegisters(pScrn, save);
- if((info->DisplayType == MT_DFP) ||
- (info->DisplayType == MT_LCD))
- {
- R128SaveFPRegisters(pScrn, save);
- }
- R128SavePLLRegisters(pScrn, save);
- R128SaveDDARegisters(pScrn, save);
- R128SavePalette(pScrn, save);
- }
-
- R128TRACE(("R128SaveMode returns %p\n", save));
-}
-
-/* Save everything needed to restore the original VC state. */
-static void R128Save(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- R128SavePtr save = &info->SavedReg;
-
- R128TRACE(("R128Save\n"));
- if (info->FBDev) {
- fbdevHWSave(pScrn);
- return;
- }
-
- if (!info->IsSecondary) {
-#ifdef WITH_VGAHW
- if (info->VGAAccess) {
- vgaHWPtr hwp = VGAHWPTR(pScrn);
-
- vgaHWUnlock(hwp);
-# if defined(__powerpc__)
- /* temporary hack to prevent crashing on PowerMacs when trying to
- * read VGA fonts and colormap, will find a better solution
- * in the future. TODO: Check if there's actually some VGA stuff
- * setup in the card at all !!
- */
- vgaHWSave(pScrn, &hwp->SavedReg, VGA_SR_MODE); /* Save mode only */
-# else
- /* Save mode * & fonts & cmap */
- vgaHWSave(pScrn, &hwp->SavedReg, VGA_SR_MODE | VGA_SR_FONTS);
-# endif
- vgaHWLock(hwp);
- }
-#endif
-
- save->dp_datatype = INREG(R128_DP_DATATYPE);
- save->gen_reset_cntl = INREG(R128_GEN_RESET_CNTL);
- save->clock_cntl_index = INREG(R128_CLOCK_CNTL_INDEX);
- save->amcgpio_en_reg = INREG(R128_AMCGPIO_EN_REG);
- save->amcgpio_mask = INREG(R128_AMCGPIO_MASK);
- }
-
- R128SaveMode(pScrn, save);
-
-}
-
-/* Restore the original (text) mode. */
-static void R128Restore(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- R128SavePtr restore = &info->SavedReg;
-
- R128TRACE(("R128Restore\n"));
- if (info->FBDev) {
- fbdevHWRestore(pScrn);
- return;
- }
-
- R128Blank(pScrn);
-
- if (!info->IsSecondary) {
- OUTREG(R128_AMCGPIO_MASK, restore->amcgpio_mask);
- OUTREG(R128_AMCGPIO_EN_REG, restore->amcgpio_en_reg);
- OUTREG(R128_CLOCK_CNTL_INDEX, restore->clock_cntl_index);
- OUTREG(R128_GEN_RESET_CNTL, restore->gen_reset_cntl);
- OUTREG(R128_DP_DATATYPE, restore->dp_datatype);
- }
-
- R128RestoreMode(pScrn, restore);
-#ifdef WITH_VGAHW
- if (info->VGAAccess) {
- vgaHWPtr hwp = VGAHWPTR(pScrn);
- if (!info->IsSecondary) {
- vgaHWUnlock(hwp);
-# if defined(__powerpc__)
- /* Temporary hack to prevent crashing on PowerMacs when trying to
- * write VGA fonts, will find a better solution in the future
- */
- vgaHWRestore(pScrn, &hwp->SavedReg, VGA_SR_MODE );
-# else
- vgaHWRestore(pScrn, &hwp->SavedReg, VGA_SR_MODE | VGA_SR_FONTS );
-# endif
- vgaHWLock(hwp);
- } else {
- R128EntPtr pR128Ent = R128EntPriv(pScrn);
- ScrnInfoPtr pScrn0 = pR128Ent->pPrimaryScrn;
- R128InfoPtr info0 = R128PTR(pScrn0);
- vgaHWPtr hwp0;
-
- if (info0->VGAAccess) {
- hwp0 = VGAHWPTR(pScrn0);
- vgaHWUnlock(hwp0);
-#if defined(__powerpc__)
- vgaHWRestore(pScrn0, &hwp0->SavedReg, VGA_SR_MODE);
-#else
- vgaHWRestore(pScrn0, &hwp0->SavedReg, VGA_SR_MODE | VGA_SR_FONTS );
-#endif
- vgaHWLock(hwp0);
- }
- }
- }
-#endif
-
- R128WaitForVerticalSync(pScrn);
- R128Unblank(pScrn);
-}
-
-/* Define common registers for requested video mode. */
-static void R128InitCommonRegisters(R128SavePtr save, R128InfoPtr info)
-{
- save->ovr_clr = 0;
- save->ovr_wid_left_right = 0;
- save->ovr_wid_top_bottom = 0;
- save->ov0_scale_cntl = 0;
- save->mpp_tb_config = 0;
- save->mpp_gp_config = 0;
- save->subpic_cntl = 0;
- save->viph_control = 0;
- save->i2c_cntl_1 = 0;
-#ifdef XF86DRI
- save->gen_int_cntl = info->gen_int_cntl;
-#else
- save->gen_int_cntl = 0;
-#endif
- save->cap0_trig_cntl = 0;
- save->cap1_trig_cntl = 0;
- save->bus_cntl = info->BusCntl;
- /*
- * If bursts are enabled, turn on discards and aborts
- */
- if (save->bus_cntl & (R128_BUS_WRT_BURST|R128_BUS_READ_BURST))
- save->bus_cntl |= R128_BUS_RD_DISCARD_EN | R128_BUS_RD_ABORT_EN;
-}
-
-/* Define CRTC registers for requested video mode. */
-static Bool R128InitCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr save,
- DisplayModePtr mode, R128InfoPtr info)
-{
- int format;
- int hsync_start;
- int hsync_wid;
- int hsync_fudge;
- int vsync_wid;
- int hsync_fudge_default[] = { 0x00, 0x12, 0x09, 0x09, 0x06, 0x05 };
- int hsync_fudge_fp[] = { 0x12, 0x11, 0x09, 0x09, 0x05, 0x05 };
-// int hsync_fudge_fp_crt[] = { 0x12, 0x10, 0x08, 0x08, 0x04, 0x04 };
-
- switch (info->CurrentLayout.pixel_code) {
- case 4: format = 1; break;
- case 8: format = 2; break;
- case 15: format = 3; break; /* 555 */
- case 16: format = 4; break; /* 565 */
- case 24: format = 5; break; /* RGB */
- case 32: format = 6; break; /* xRGB */
- default:
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Unsupported pixel depth (%d)\n",
- info->CurrentLayout.bitsPerPixel);
- return FALSE;
- }
-
- if ((info->DisplayType == MT_DFP) ||
- (info->DisplayType == MT_LCD))
- hsync_fudge = hsync_fudge_fp[format-1];
- else
- hsync_fudge = hsync_fudge_default[format-1];
-
- save->crtc_gen_cntl = (R128_CRTC_EXT_DISP_EN
- | R128_CRTC_EN
- | (format << 8)
- | ((mode->Flags & V_DBLSCAN)
- ? R128_CRTC_DBL_SCAN_EN
- : 0)
- | ((mode->Flags & V_INTERLACE)
- ? R128_CRTC_INTERLACE_EN
- : 0)
- | ((mode->Flags & V_CSYNC)
- ? R128_CRTC_CSYNC_EN
- : 0));
-
- if((info->DisplayType == MT_DFP) ||
- (info->DisplayType == MT_LCD))
- {
- save->crtc_ext_cntl = R128_VGA_ATI_LINEAR |
- R128_XCRT_CNT_EN;
- save->crtc_gen_cntl &= ~(R128_CRTC_DBL_SCAN_EN |
- R128_CRTC_INTERLACE_EN);
- }
- else
- save->crtc_ext_cntl = R128_VGA_ATI_LINEAR |
- R128_XCRT_CNT_EN |
- R128_CRTC_CRT_ON;
-
- save->dac_cntl = (R128_DAC_MASK_ALL
- | R128_DAC_VGA_ADR_EN
- | (info->dac6bits ? 0 : R128_DAC_8BIT_EN));
-
-
- if(info->isDFP && !info->isPro2)
- {
- if(info->PanelXRes < mode->CrtcHDisplay)
- mode->HDisplay = mode->CrtcHDisplay = info->PanelXRes;
- if(info->PanelYRes < mode->CrtcVDisplay)
- mode->VDisplay = mode->CrtcVDisplay = info->PanelYRes;
- mode->CrtcHTotal = mode->CrtcHDisplay + info->HBlank;
- mode->CrtcHSyncStart = mode->CrtcHDisplay + info->HOverPlus;
- mode->CrtcHSyncEnd = mode->CrtcHSyncStart + info->HSyncWidth;
- mode->CrtcVTotal = mode->CrtcVDisplay + info->VBlank;
- mode->CrtcVSyncStart = mode->CrtcVDisplay + info->VOverPlus;
- mode->CrtcVSyncEnd = mode->CrtcVSyncStart + info->VSyncWidth;
- }
-
- save->crtc_h_total_disp = ((((mode->CrtcHTotal / 8) - 1) & 0xffff)
- | (((mode->CrtcHDisplay / 8) - 1) << 16));
-
- hsync_wid = (mode->CrtcHSyncEnd - mode->CrtcHSyncStart) / 8;
- if (!hsync_wid) hsync_wid = 1;
- if (hsync_wid > 0x3f) hsync_wid = 0x3f;
-
- hsync_start = mode->CrtcHSyncStart - 8 + hsync_fudge;
-
- save->crtc_h_sync_strt_wid = ((hsync_start & 0xfff)
- | (hsync_wid << 16)
- | ((mode->Flags & V_NHSYNC)
- ? R128_CRTC_H_SYNC_POL
- : 0));
-
-#if 1
- /* This works for double scan mode. */
- save->crtc_v_total_disp = (((mode->CrtcVTotal - 1) & 0xffff)
- | ((mode->CrtcVDisplay - 1) << 16));
-#else
- /* This is what cce/nbmode.c example code
- does -- is this correct? */
- save->crtc_v_total_disp = (((mode->CrtcVTotal - 1) & 0xffff)
- | ((mode->CrtcVDisplay
- * ((mode->Flags & V_DBLSCAN) ? 2 : 1) - 1)
- << 16));
-#endif
-
- vsync_wid = mode->CrtcVSyncEnd - mode->CrtcVSyncStart;
- if (!vsync_wid) vsync_wid = 1;
- if (vsync_wid > 0x1f) vsync_wid = 0x1f;
-
- save->crtc_v_sync_strt_wid = (((mode->CrtcVSyncStart - 1) & 0xfff)
- | (vsync_wid << 16)
- | ((mode->Flags & V_NVSYNC)
- ? R128_CRTC_V_SYNC_POL
- : 0));
- save->crtc_offset = 0;
- save->crtc_offset_cntl = 0;
- save->crtc_pitch = info->CurrentLayout.displayWidth / 8;
-
- R128TRACE(("Pitch = %d bytes (virtualX = %d, displayWidth = %d)\n",
- save->crtc_pitch, pScrn->virtualX, info->CurrentLayout.displayWidth));
-
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- /* Change the endianness of the aperture */
- switch (info->CurrentLayout.pixel_code) {
- case 15:
- case 16: save->config_cntl |= APER_0_BIG_ENDIAN_16BPP_SWAP; break;
- case 32: save->config_cntl |= APER_0_BIG_ENDIAN_32BPP_SWAP; break;
- default: break;
- }
-#endif
-
- return TRUE;
-}
-
-/* Define CRTC2 registers for requested video mode. */
-static Bool R128InitCrtc2Registers(ScrnInfoPtr pScrn, R128SavePtr save,
- DisplayModePtr mode, R128InfoPtr info)
-{
- int format;
- int hsync_start;
- int hsync_wid;
- int hsync_fudge;
- int vsync_wid;
- int bytpp;
- int hsync_fudge_default[] = { 0x00, 0x12, 0x09, 0x09, 0x06, 0x05 };
-
- switch (info->CurrentLayout.pixel_code) {
- case 4: format = 1; bytpp = 0; break;
- case 8: format = 2; bytpp = 1; break;
- case 15: format = 3; bytpp = 2; break; /* 555 */
- case 16: format = 4; bytpp = 2; break; /* 565 */
- case 24: format = 5; bytpp = 3; break; /* RGB */
- case 32: format = 6; bytpp = 4; break; /* xRGB */
- default:
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Unsupported pixel depth (%d)\n", info->CurrentLayout.bitsPerPixel);
- return FALSE;
- }
- R128TRACE(("Format = %d (%d bytes per pixel)\n", format, bytpp));
-
- hsync_fudge = hsync_fudge_default[format-1];
-
- save->crtc2_gen_cntl = (R128_CRTC2_EN
- | (format << 8)
- | ((mode->Flags & V_DBLSCAN)
- ? R128_CRTC2_DBL_SCAN_EN
- : 0));
-/*
- save->crtc2_gen_cntl &= ~R128_CRTC_EXT_DISP_EN;
- save->crtc2_gen_cntl |= (1 << 21);
-*/
- save->crtc2_h_total_disp = ((((mode->CrtcHTotal / 8) - 1) & 0xffff)
- | (((mode->CrtcHDisplay / 8) - 1) << 16));
-
- hsync_wid = (mode->CrtcHSyncEnd - mode->CrtcHSyncStart) / 8;
- if (!hsync_wid) hsync_wid = 1;
- if (hsync_wid > 0x3f) hsync_wid = 0x3f;
-
- hsync_start = mode->CrtcHSyncStart - 8 + hsync_fudge;
-
- save->crtc2_h_sync_strt_wid = ((hsync_start & 0xfff)
- | (hsync_wid << 16)
- | ((mode->Flags & V_NHSYNC)
- ? R128_CRTC2_H_SYNC_POL
- : 0));
-
-#if 1
- /* This works for double scan mode. */
- save->crtc2_v_total_disp = (((mode->CrtcVTotal - 1) & 0xffff)
- | ((mode->CrtcVDisplay - 1) << 16));
-#else
- /* This is what cce/nbmode.c example code
- does -- is this correct? */
- save->crtc2_v_total_disp = (((mode->CrtcVTotal - 1) & 0xffff)
- | ((mode->CrtcVDisplay
- * ((mode->Flags & V_DBLSCAN) ? 2 : 1) - 1)
- << 16));
-#endif
-
- vsync_wid = mode->CrtcVSyncEnd - mode->CrtcVSyncStart;
- if (!vsync_wid) vsync_wid = 1;
- if (vsync_wid > 0x1f) vsync_wid = 0x1f;
-
- save->crtc2_v_sync_strt_wid = (((mode->CrtcVSyncStart - 1) & 0xfff)
- | (vsync_wid << 16)
- | ((mode->Flags & V_NVSYNC)
- ? R128_CRTC2_V_SYNC_POL
- : 0));
-
- save->crtc2_offset = 0;
- save->crtc2_offset_cntl = 0;
-
- save->crtc2_pitch = info->CurrentLayout.displayWidth / 8;
-
- R128TRACE(("Pitch = %d bytes (virtualX = %d, displayWidth = %d)\n",
- save->crtc2_pitch, pScrn->virtualX,
- info->CurrentLayout.displayWidth));
- return TRUE;
-}
-
-/* Define CRTC registers for requested video mode. */
-static void R128InitFPRegisters(R128SavePtr orig, R128SavePtr save,
- DisplayModePtr mode, R128InfoPtr info)
-{
- int xres = mode->CrtcHDisplay;
- int yres = mode->CrtcVDisplay;
- float Hratio, Vratio;
-
- if (info->BIOSDisplay == R128_BIOS_DISPLAY_CRT) {
- save->crtc_ext_cntl |= R128_CRTC_CRT_ON;
- save->crtc2_gen_cntl = 0;
- save->fp_gen_cntl = orig->fp_gen_cntl;
- save->fp_gen_cntl &= ~(R128_FP_FPON |
- R128_FP_CRTC_USE_SHADOW_VEND |
- R128_FP_CRTC_HORZ_DIV2_EN |
- R128_FP_CRTC_HOR_CRT_DIV2_DIS |
- R128_FP_USE_SHADOW_EN);
- save->fp_gen_cntl |= (R128_FP_SEL_CRTC2 |
- R128_FP_CRTC_DONT_SHADOW_VPAR);
- save->fp_panel_cntl = orig->fp_panel_cntl & (CARD32)~R128_FP_DIGON;
- save->lvds_gen_cntl = orig->lvds_gen_cntl &
- (CARD32)~(R128_LVDS_ON | R128_LVDS_BLON);
- return;
- }
-
- if (xres > info->PanelXRes) xres = info->PanelXRes;
- if (yres > info->PanelYRes) yres = info->PanelYRes;
-
- Hratio = (float)xres/(float)info->PanelXRes;
- Vratio = (float)yres/(float)info->PanelYRes;
-
- save->fp_horz_stretch =
- (((((int)(Hratio * R128_HORZ_STRETCH_RATIO_MAX + 0.5))
- & R128_HORZ_STRETCH_RATIO_MASK) << R128_HORZ_STRETCH_RATIO_SHIFT) |
- (orig->fp_horz_stretch & (R128_HORZ_PANEL_SIZE |
- R128_HORZ_FP_LOOP_STRETCH |
- R128_HORZ_STRETCH_RESERVED)));
- save->fp_horz_stretch &= ~R128_HORZ_AUTO_RATIO_FIX_EN;
- save->fp_horz_stretch &= ~R128_AUTO_HORZ_RATIO;
- if (xres == info->PanelXRes)
- save->fp_horz_stretch &= ~(R128_HORZ_STRETCH_BLEND | R128_HORZ_STRETCH_ENABLE);
- else
- save->fp_horz_stretch |= (R128_HORZ_STRETCH_BLEND | R128_HORZ_STRETCH_ENABLE);
-
- save->fp_vert_stretch =
- (((((int)(Vratio * R128_VERT_STRETCH_RATIO_MAX + 0.5))
- & R128_VERT_STRETCH_RATIO_MASK) << R128_VERT_STRETCH_RATIO_SHIFT) |
- (orig->fp_vert_stretch & (R128_VERT_PANEL_SIZE |
- R128_VERT_STRETCH_RESERVED)));
- save->fp_vert_stretch &= ~R128_VERT_AUTO_RATIO_EN;
- if (yres == info->PanelYRes)
- save->fp_vert_stretch &= ~(R128_VERT_STRETCH_ENABLE | R128_VERT_STRETCH_BLEND);
- else
- save->fp_vert_stretch |= (R128_VERT_STRETCH_ENABLE | R128_VERT_STRETCH_BLEND);
-
- save->fp_gen_cntl = (orig->fp_gen_cntl &
- (CARD32)~(R128_FP_SEL_CRTC2 |
- R128_FP_CRTC_USE_SHADOW_VEND |
- R128_FP_CRTC_HORZ_DIV2_EN |
- R128_FP_CRTC_HOR_CRT_DIV2_DIS |
- R128_FP_USE_SHADOW_EN));
-
- save->fp_panel_cntl = orig->fp_panel_cntl;
- save->lvds_gen_cntl = orig->lvds_gen_cntl;
- save->tmds_crc = orig->tmds_crc;
-
- /* Disable CRT output by disabling CRT output and setting the CRT
- DAC to use CRTC2, which we set to 0's. In the future, we will
- want to use the dual CRTC capabilities of the R128 to allow both
- the flat panel and external CRT to either simultaneously display
- the same image or display two different images. */
-
-
- if(!info->isDFP){
- if (info->BIOSDisplay == R128_BIOS_DISPLAY_FP_CRT) {
- save->crtc_ext_cntl |= R128_CRTC_CRT_ON;
- } else if (info->BIOSDisplay == R128_DUALHEAD) {
- save->crtc_ext_cntl |= R128_CRTC_CRT_ON;
- save->dac_cntl |= R128_DAC_CRT_SEL_CRTC2;
- save->dac_cntl |= R128_DAC_PALETTE2_SNOOP_EN;
- } else {
- save->crtc_ext_cntl &= ~R128_CRTC_CRT_ON;
- save->dac_cntl |= R128_DAC_CRT_SEL_CRTC2;
- save->crtc2_gen_cntl = 0;
- }
- }
-
- /* WARNING: Be careful about turning on the flat panel */
- if(info->isDFP){
- save->fp_gen_cntl = orig->fp_gen_cntl;
-
- save->fp_gen_cntl &= ~(R128_FP_CRTC_USE_SHADOW_VEND |
- R128_FP_CRTC_USE_SHADOW_ROWCUR |
- R128_FP_CRTC_HORZ_DIV2_EN |
- R128_FP_CRTC_HOR_CRT_DIV2_DIS |
- R128_FP_CRT_SYNC_SEL |
- R128_FP_USE_SHADOW_EN);
-
- save->fp_panel_cntl |= (R128_FP_DIGON | R128_FP_BLON);
- save->fp_gen_cntl |= (R128_FP_FPON | R128_FP_TDMS_EN |
- R128_FP_CRTC_DONT_SHADOW_VPAR | R128_FP_CRTC_DONT_SHADOW_HEND);
- save->tmds_transmitter_cntl = (orig->tmds_transmitter_cntl
- & ~(CARD32)R128_TMDS_PLLRST) | R128_TMDS_PLLEN;
- }
- else
- save->lvds_gen_cntl |= (R128_LVDS_ON | R128_LVDS_BLON);
-
- save->fp_crtc_h_total_disp = save->crtc_h_total_disp;
- save->fp_crtc_v_total_disp = save->crtc_v_total_disp;
- save->fp_h_sync_strt_wid = save->crtc_h_sync_strt_wid;
- save->fp_v_sync_strt_wid = save->crtc_v_sync_strt_wid;
-}
-
-/* Define PLL registers for requested video mode. */
-static void R128InitPLLRegisters(ScrnInfoPtr pScrn, R128SavePtr save,
- R128PLLPtr pll, double dot_clock)
-{
- unsigned long freq = dot_clock * 100;
- struct {
- int divider;
- int bitvalue;
- } *post_div,
- post_divs[] = {
- /* From RAGE 128 VR/RAGE 128 GL Register
- Reference Manual (Technical Reference
- Manual P/N RRG-G04100-C Rev. 0.04), page
- 3-17 (PLL_DIV_[3:0]). */
- { 1, 0 }, /* VCLK_SRC */
- { 2, 1 }, /* VCLK_SRC/2 */
- { 4, 2 }, /* VCLK_SRC/4 */
- { 8, 3 }, /* VCLK_SRC/8 */
-
- { 3, 4 }, /* VCLK_SRC/3 */
- /* bitvalue = 5 is reserved */
- { 6, 6 }, /* VCLK_SRC/6 */
- { 12, 7 }, /* VCLK_SRC/12 */
- { 0, 0 }
- };
-
- if (freq > pll->max_pll_freq) freq = pll->max_pll_freq;
- if (freq * 12 < pll->min_pll_freq) freq = pll->min_pll_freq / 12;
-
- for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
- save->pll_output_freq = post_div->divider * freq;
- if (save->pll_output_freq >= pll->min_pll_freq
- && save->pll_output_freq <= pll->max_pll_freq) break;
- }
-
- save->dot_clock_freq = freq;
- save->feedback_div = R128Div(pll->reference_div * save->pll_output_freq,
- pll->reference_freq);
- save->post_div = post_div->divider;
-
- R128TRACE(("dc=%d, of=%d, fd=%d, pd=%d\n",
- save->dot_clock_freq,
- save->pll_output_freq,
- save->feedback_div,
- save->post_div));
-
- save->ppll_ref_div = pll->reference_div;
- save->ppll_div_3 = (save->feedback_div | (post_div->bitvalue << 16));
- save->htotal_cntl = 0;
-
-}
-
-/* Define PLL2 registers for requested video mode. */
-static void R128InitPLL2Registers(R128SavePtr save, R128PLLPtr pll,
- double dot_clock)
-{
- unsigned long freq = dot_clock * 100;
- struct {
- int divider;
- int bitvalue;
- } *post_div,
- post_divs[] = {
- /* From RAGE 128 VR/RAGE 128 GL Register
- Reference Manual (Technical Reference
- Manual P/N RRG-G04100-C Rev. 0.04), page
- 3-17 (PLL_DIV_[3:0]). */
- { 1, 0 }, /* VCLK_SRC */
- { 2, 1 }, /* VCLK_SRC/2 */
- { 4, 2 }, /* VCLK_SRC/4 */
- { 8, 3 }, /* VCLK_SRC/8 */
-
- { 3, 4 }, /* VCLK_SRC/3 */
- /* bitvalue = 5 is reserved */
- { 6, 6 }, /* VCLK_SRC/6 */
- { 12, 7 }, /* VCLK_SRC/12 */
- { 0, 0 }
- };
-
- if (freq > pll->max_pll_freq) freq = pll->max_pll_freq;
- if (freq * 12 < pll->min_pll_freq) freq = pll->min_pll_freq / 12;
-
- for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
- save->pll_output_freq_2 = post_div->divider * freq;
- if (save->pll_output_freq_2 >= pll->min_pll_freq
- && save->pll_output_freq_2 <= pll->max_pll_freq) break;
- }
-
- save->dot_clock_freq_2 = freq;
- save->feedback_div_2 = R128Div(pll->reference_div
- * save->pll_output_freq_2,
- pll->reference_freq);
- save->post_div_2 = post_div->divider;
-
- R128TRACE(("dc=%d, of=%d, fd=%d, pd=%d\n",
- save->dot_clock_freq_2,
- save->pll_output_freq_2,
- save->feedback_div_2,
- save->post_div_2));
-
- save->p2pll_ref_div = pll->reference_div;
- save->p2pll_div_0 = (save->feedback_div_2 | (post_div->bitvalue<<16));
- save->htotal_cntl2 = 0;
-}
-
-/* Define DDA registers for requested video mode. */
-static Bool R128InitDDARegisters(ScrnInfoPtr pScrn, R128SavePtr save,
- R128PLLPtr pll, R128InfoPtr info,
- DisplayModePtr mode)
-{
- int DisplayFifoWidth = 128;
- int DisplayFifoDepth = 32;
- int XclkFreq;
- int VclkFreq;
- int XclksPerTransfer;
- int XclksPerTransferPrecise;
- int UseablePrecision;
- int Roff;
- int Ron;
-
- XclkFreq = pll->xclk;
-
- VclkFreq = R128Div(pll->reference_freq * save->feedback_div,
- pll->reference_div * save->post_div);
-
- if(info->isDFP && !info->isPro2){
- if(info->PanelXRes != mode->CrtcHDisplay)
- VclkFreq = (VclkFreq * mode->CrtcHDisplay)/info->PanelXRes;
- }
-
- XclksPerTransfer = R128Div(XclkFreq * DisplayFifoWidth,
- VclkFreq * (info->CurrentLayout.pixel_bytes * 8));
-
- UseablePrecision = R128MinBits(XclksPerTransfer) + 1;
-
- XclksPerTransferPrecise = R128Div((XclkFreq * DisplayFifoWidth)
- << (11 - UseablePrecision),
- VclkFreq * (info->CurrentLayout.pixel_bytes * 8));
-
- Roff = XclksPerTransferPrecise * (DisplayFifoDepth - 4);
-
- Ron = (4 * info->ram->MB
- + 3 * MAX(info->ram->Trcd - 2, 0)
- + 2 * info->ram->Trp
- + info->ram->Twr
- + info->ram->CL
- + info->ram->Tr2w
- + XclksPerTransfer) << (11 - UseablePrecision);
-
- if (Ron + info->ram->Rloop >= Roff) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "(Ron = %d) + (Rloop = %d) >= (Roff = %d)\n",
- Ron, info->ram->Rloop, Roff);
- return FALSE;
- }
-
- save->dda_config = (XclksPerTransferPrecise
- | (UseablePrecision << 16)
- | (info->ram->Rloop << 20));
-
- save->dda_on_off = (Ron << 16) | Roff;
-
- R128TRACE(("XclkFreq = %d; VclkFreq = %d; per = %d, %d (useable = %d)\n",
- XclkFreq,
- VclkFreq,
- XclksPerTransfer,
- XclksPerTransferPrecise,
- UseablePrecision));
- R128TRACE(("Roff = %d, Ron = %d, Rloop = %d\n",
- Roff, Ron, info->ram->Rloop));
-
- return TRUE;
-}
-
-/* Define DDA2 registers for requested video mode. */
-static Bool R128InitDDA2Registers(ScrnInfoPtr pScrn, R128SavePtr save,
- R128PLLPtr pll, R128InfoPtr info,
- DisplayModePtr mode)
-{
- int DisplayFifoWidth = 128;
- int DisplayFifoDepth = 32;
- int XclkFreq;
- int VclkFreq;
- int XclksPerTransfer;
- int XclksPerTransferPrecise;
- int UseablePrecision;
- int Roff;
- int Ron;
-
- XclkFreq = pll->xclk;
-
- VclkFreq = R128Div(pll->reference_freq * save->feedback_div_2,
- pll->reference_div * save->post_div_2);
-
- if(info->isDFP && !info->isPro2){
- if(info->PanelXRes != mode->CrtcHDisplay)
- VclkFreq = (VclkFreq * mode->CrtcHDisplay)/info->PanelXRes;
- }
-
- XclksPerTransfer = R128Div(XclkFreq * DisplayFifoWidth,
- VclkFreq * (info->CurrentLayout.pixel_bytes * 8));
-
- UseablePrecision = R128MinBits(XclksPerTransfer) + 1;
-
- XclksPerTransferPrecise = R128Div((XclkFreq * DisplayFifoWidth)
- << (11 - UseablePrecision),
- VclkFreq * (info->CurrentLayout.pixel_bytes * 8));
-
- Roff = XclksPerTransferPrecise * (DisplayFifoDepth - 4);
-
- Ron = (4 * info->ram->MB
- + 3 * MAX(info->ram->Trcd - 2, 0)
- + 2 * info->ram->Trp
- + info->ram->Twr
- + info->ram->CL
- + info->ram->Tr2w
- + XclksPerTransfer) << (11 - UseablePrecision);
-
-
- if (Ron + info->ram->Rloop >= Roff) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "(Ron = %d) + (Rloop = %d) >= (Roff = %d)\n",
- Ron, info->ram->Rloop, Roff);
- return FALSE;
- }
-
- save->dda2_config = (XclksPerTransferPrecise
- | (UseablePrecision << 16)
- | (info->ram->Rloop << 20));
-
- /*save->dda2_on_off = (Ron << 16) | Roff;*/
- /* shift most be 18 otherwise there's corruption on crtc2 */
- save->dda2_on_off = (Ron << 18) | Roff;
-
- R128TRACE(("XclkFreq = %d; VclkFreq = %d; per = %d, %d (useable = %d)\n",
- XclkFreq,
- VclkFreq,
- XclksPerTransfer,
- XclksPerTransferPrecise,
- UseablePrecision));
- R128TRACE(("Roff = %d, Ron = %d, Rloop = %d\n",
- Roff, Ron, info->ram->Rloop));
-
- return TRUE;
-}
-
-#if 0
-/* Define initial palette for requested video mode. This doesn't do
- anything for XFree86 4.0. */
-static void R128InitPalette(R128SavePtr save)
-{
- save->palette_valid = FALSE;
-}
-#endif
-
-/* Define registers for a requested video mode. */
-static Bool R128Init(ScrnInfoPtr pScrn, DisplayModePtr mode, R128SavePtr save)
-{
- R128InfoPtr info = R128PTR(pScrn);
- double dot_clock = mode->Clock/1000.0;
-
-#if R128_DEBUG
- ErrorF("%-12.12s %7.2f %4d %4d %4d %4d %4d %4d %4d %4d (%d,%d)",
- mode->name,
- dot_clock,
-
- mode->HDisplay,
- mode->HSyncStart,
- mode->HSyncEnd,
- mode->HTotal,
-
- mode->VDisplay,
- mode->VSyncStart,
- mode->VSyncEnd,
- mode->VTotal,
- pScrn->depth,
- pScrn->bitsPerPixel);
- if (mode->Flags & V_DBLSCAN) ErrorF(" D");
- if (mode->Flags & V_CSYNC) ErrorF(" C");
- if (mode->Flags & V_INTERLACE) ErrorF(" I");
- if (mode->Flags & V_PHSYNC) ErrorF(" +H");
- if (mode->Flags & V_NHSYNC) ErrorF(" -H");
- if (mode->Flags & V_PVSYNC) ErrorF(" +V");
- if (mode->Flags & V_NVSYNC) ErrorF(" -V");
- ErrorF("\n");
- ErrorF("%-12.12s %7.2f %4d %4d %4d %4d %4d %4d %4d %4d (%d,%d)",
- mode->name,
- dot_clock,
-
- mode->CrtcHDisplay,
- mode->CrtcHSyncStart,
- mode->CrtcHSyncEnd,
- mode->CrtcHTotal,
-
- mode->CrtcVDisplay,
- mode->CrtcVSyncStart,
- mode->CrtcVSyncEnd,
- mode->CrtcVTotal,
- pScrn->depth,
- pScrn->bitsPerPixel);
- if (mode->Flags & V_DBLSCAN) ErrorF(" D");
- if (mode->Flags & V_CSYNC) ErrorF(" C");
- if (mode->Flags & V_INTERLACE) ErrorF(" I");
- if (mode->Flags & V_PHSYNC) ErrorF(" +H");
- if (mode->Flags & V_NHSYNC) ErrorF(" -H");
- if (mode->Flags & V_PVSYNC) ErrorF(" +V");
- if (mode->Flags & V_NVSYNC) ErrorF(" -V");
- ErrorF("\n");
-#endif
-
- info->Flags = mode->Flags;
-
- if(info->IsSecondary)
- {
- if (!R128InitCrtc2Registers(pScrn, save,
- pScrn->currentMode,info))
- return FALSE;
- R128InitPLL2Registers(save, &info->pll, dot_clock);
- if (!R128InitDDA2Registers(pScrn, save, &info->pll, info, mode))
- return FALSE;
- }
- else
- {
- R128InitCommonRegisters(save, info);
- if(!R128InitCrtcRegisters(pScrn, save, mode, info))
- return FALSE;
- if(dot_clock)
- {
- R128InitPLLRegisters(pScrn, save, &info->pll, dot_clock);
- if (!R128InitDDARegisters(pScrn, save, &info->pll, info, mode))
- return FALSE;
- }
- else
- {
- save->ppll_ref_div = info->SavedReg.ppll_ref_div;
- save->ppll_div_3 = info->SavedReg.ppll_div_3;
- save->htotal_cntl = info->SavedReg.htotal_cntl;
- save->dda_config = info->SavedReg.dda_config;
- save->dda_on_off = info->SavedReg.dda_on_off;
- }
- /* not used for now */
- /*if (!info->PaletteSavedOnVT) RADEONInitPalette(save);*/
- }
-
- if (((info->DisplayType == MT_DFP) ||
- (info->DisplayType == MT_LCD)))
- {
- R128InitFPRegisters(&info->SavedReg, save, mode, info);
- }
-
- R128TRACE(("R128Init returns %p\n", save));
- return TRUE;
-}
-
-/* Initialize a new mode. */
-static Bool R128ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
-{
- R128InfoPtr info = R128PTR(pScrn);
-
- if (!R128Init(pScrn, mode, &info->ModeReg)) return FALSE;
- /* FIXME? DRILock/DRIUnlock here? */
- pScrn->vtSema = TRUE;
- R128Blank(pScrn);
- R128RestoreMode(pScrn, &info->ModeReg);
- R128Unblank(pScrn);
-
- info->CurrentLayout.mode = mode;
-
- return TRUE;
-}
-
-static Bool R128SaveScreen(ScreenPtr pScreen, int mode)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- Bool unblank;
-
- unblank = xf86IsUnblank(mode);
- if (unblank)
- SetTimeSinceLastInputEvent();
-
- if ((pScrn != NULL) && pScrn->vtSema) {
- if (unblank)
- R128Unblank(pScrn);
- else
- R128Blank(pScrn);
- }
- return TRUE;
-}
-
-/*
- * SwitchMode() doesn't work right on crtc2 on some laptops.
- * The workaround is to switch the mode, then switch to another VT, then
- * switch back. --AGD
- */
-Bool R128SwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
-{
- ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
- R128InfoPtr info = R128PTR(pScrn);
- Bool ret;
-
- info->SwitchingMode = TRUE;
- ret = R128ModeInit(xf86Screens[scrnIndex], mode);
- info->SwitchingMode = FALSE;
- return ret;
-}
-
-/* Used to disallow modes that are not supported by the hardware. */
-ModeStatus R128ValidMode(int scrnIndex, DisplayModePtr mode,
- Bool verbose, int flags)
-{
- ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
- R128InfoPtr info = R128PTR(pScrn);
-
- if (info->BIOSDisplay == R128_BIOS_DISPLAY_CRT)
- return MODE_OK;
-
- if(info->isDFP) {
- if(info->PanelXRes < mode->CrtcHDisplay ||
- info->PanelYRes < mode->CrtcVDisplay)
- return MODE_NOMODE;
- else
- return MODE_OK;
- }
-
- if (info->DisplayType == MT_LCD) {
- if (mode->Flags & V_INTERLACE) return MODE_NO_INTERLACE;
- if (mode->Flags & V_DBLSCAN) return MODE_NO_DBLESCAN;
- }
-
- if (info->DisplayType == MT_LCD &&
- info->VBIOS) {
- int i;
- for (i = info->FPBIOSstart+64; R128_BIOS16(i) != 0; i += 2) {
- int j = R128_BIOS16(i);
-
- if (mode->CrtcHDisplay == R128_BIOS16(j) &&
- mode->CrtcVDisplay == R128_BIOS16(j+2)) {
- if ((flags & MODECHECK_FINAL) == MODECHECK_FINAL) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Modifying mode according to VBIOS: %ix%i [pclk %.1f MHz] for FP to: ",
- mode->CrtcHDisplay,mode->CrtcVDisplay,
- (float)mode->Clock/1000);
-
- /* Assume we are using expanded mode */
- if (R128_BIOS16(j+5)) j = R128_BIOS16(j+5);
- else j += 9;
-
- mode->Clock = (CARD32)R128_BIOS16(j) * 10;
-
- mode->HDisplay = mode->CrtcHDisplay =
- ((R128_BIOS16(j+10) & 0x01ff)+1)*8;
- mode->HSyncStart = mode->CrtcHSyncStart =
- ((R128_BIOS16(j+12) & 0x01ff)+1)*8;
- mode->HSyncEnd = mode->CrtcHSyncEnd =
- mode->CrtcHSyncStart + (R128_BIOS8(j+14) & 0x1f);
- mode->HTotal = mode->CrtcHTotal =
- ((R128_BIOS16(j+8) & 0x01ff)+1)*8;
-
- mode->VDisplay = mode->CrtcVDisplay =
- (R128_BIOS16(j+17) & 0x07ff)+1;
- mode->VSyncStart = mode->CrtcVSyncStart =
- (R128_BIOS16(j+19) & 0x07ff)+1;
- mode->VSyncEnd = mode->CrtcVSyncEnd =
- mode->CrtcVSyncStart + ((R128_BIOS16(j+19) >> 11) & 0x1f);
- mode->VTotal = mode->CrtcVTotal =
- (R128_BIOS16(j+15) & 0x07ff)+1;
- xf86ErrorF("%ix%i [pclk %.1f MHz]\n",
- mode->CrtcHDisplay,mode->CrtcVDisplay,
- (float)mode->Clock/1000);
- }
- return MODE_OK;
- }
- }
- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 5,
- "Mode rejected for FP %ix%i [pclk: %.1f] "
- "(not listed in VBIOS)\n",
- mode->CrtcHDisplay, mode->CrtcVDisplay,
- (float)mode->Clock / 1000);
- return MODE_NOMODE;
- }
-
- return MODE_OK;
-}
-
-/* Adjust viewport into virtual desktop such that (0,0) in viewport space
- is (x,y) in virtual space. */
-void R128AdjustFrame(int scrnIndex, int x, int y, int flags)
-{
- ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int Base;
-
- if(info->showCache && y && pScrn->vtSema)
- y += pScrn->virtualY - 1;
-
- Base = y * info->CurrentLayout.displayWidth + x;
-
- switch (info->CurrentLayout.pixel_code) {
- case 15:
- case 16: Base *= 2; break;
- case 24: Base *= 3; break;
- case 32: Base *= 4; break;
- }
-
- Base &= ~7; /* 3 lower bits are always 0 */
-
- if (info->CurrentLayout.pixel_code == 24)
- Base += 8 * (Base % 3); /* Must be multiple of 8 and 3 */
-
- if(info->IsSecondary)
- {
- Base += pScrn->fbOffset;
- OUTREG(R128_CRTC2_OFFSET, Base);
- }
- else
- OUTREG(R128_CRTC_OFFSET, Base);
-
-}
-
-/* Called when VT switching back to the X server. Reinitialize the video
- mode. */
-Bool R128EnterVT(int scrnIndex, int flags)
-{
- ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
- R128InfoPtr info = R128PTR(pScrn);
-
- R128TRACE(("R128EnterVT\n"));
- if (info->FBDev) {
- if (!fbdevHWEnterVT(scrnIndex,flags)) return FALSE;
- } else
- if (!R128ModeInit(pScrn, pScrn->currentMode)) return FALSE;
- if (info->accelOn)
- R128EngineInit(pScrn);
-
-#ifdef XF86DRI
- if (info->directRenderingEnabled) {
- if (info->irq) {
- /* Need to make sure interrupts are enabled */
- unsigned char *R128MMIO = info->MMIO;
- OUTREG(R128_GEN_INT_CNTL, info->gen_int_cntl);
- }
- R128CCE_START(pScrn, info);
- DRIUnlock(pScrn->pScreen);
- }
-#endif
-
- info->PaletteSavedOnVT = FALSE;
- pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
-
- return TRUE;
-}
-
-/* Called when VT switching away from the X server. Restore the original
- text mode. */
-void R128LeaveVT(int scrnIndex, int flags)
-{
- ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
- R128InfoPtr info = R128PTR(pScrn);
- R128SavePtr save = &info->ModeReg;
-
- R128TRACE(("R128LeaveVT\n"));
-#ifdef XF86DRI
- if (info->directRenderingEnabled) {
- DRILock(pScrn->pScreen, 0);
- R128CCE_STOP(pScrn, info);
- }
-#endif
- R128SavePalette(pScrn, save);
- info->PaletteSavedOnVT = TRUE;
- if (info->FBDev)
- fbdevHWLeaveVT(scrnIndex,flags);
- else
- R128Restore(pScrn);
-}
-
-
-/* Called at the end of each server generation. Restore the original text
- mode, unmap video memory, and unwrap and call the saved CloseScreen
- function. */
-static Bool R128CloseScreen(int scrnIndex, ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
- R128InfoPtr info = R128PTR(pScrn);
-
- R128TRACE(("R128CloseScreen\n"));
-
-#ifdef XF86DRI
- /* Disable direct rendering */
- if (info->directRenderingEnabled) {
- R128DRICloseScreen(pScreen);
- info->directRenderingEnabled = FALSE;
- }
-#endif
-
- if (pScrn->vtSema) {
- R128Restore(pScrn);
- R128UnmapMem(pScrn);
- }
-
- if (info->accel) XAADestroyInfoRec(info->accel);
- info->accel = NULL;
-
- if (info->scratch_save) xfree(info->scratch_save);
- info->scratch_save = NULL;
-
- if (info->cursor) xf86DestroyCursorInfoRec(info->cursor);
- info->cursor = NULL;
-
- if (info->DGAModes) xfree(info->DGAModes);
- info->DGAModes = NULL;
-
- if (info->adaptor) {
- xfree(info->adaptor->pPortPrivates[0].ptr);
- xf86XVFreeVideoAdaptorRec(info->adaptor);
- info->adaptor = NULL;
- }
-
- pScrn->vtSema = FALSE;
-
- pScreen->BlockHandler = info->BlockHandler;
- pScreen->CloseScreen = info->CloseScreen;
- return (*pScreen->CloseScreen)(scrnIndex, pScreen);
-}
-
-void R128FreeScreen(int scrnIndex, int flags)
-{
- ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
- R128InfoPtr info = R128PTR(pScrn);
-
- R128TRACE(("R128FreeScreen\n"));
-#ifdef WITH_VGAHW
- if (info->VGAAccess && xf86LoaderCheckSymbol("vgaHWFreeHWRec"))
- vgaHWFreeHWRec(pScrn);
-#endif
- R128FreeRec(pScrn);
-}
-
-/* Sets VESA Display Power Management Signaling (DPMS) Mode. */
-static void R128DisplayPowerManagementSet(ScrnInfoPtr pScrn,
- int PowerManagementMode, int flags)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int mask = (R128_CRTC_DISPLAY_DIS
- | R128_CRTC_HSYNC_DIS
- | R128_CRTC_VSYNC_DIS);
- int mask2 = R128_CRTC2_DISP_DIS;
-
- switch (PowerManagementMode) {
- case DPMSModeOn:
- /* Screen: On; HSync: On, VSync: On */
- if (info->IsSecondary)
- OUTREGP(R128_CRTC2_GEN_CNTL, 0, ~mask2);
- else
- OUTREGP(R128_CRTC_EXT_CNTL, 0, ~mask);
- break;
- case DPMSModeStandby:
- /* Screen: Off; HSync: Off, VSync: On */
- if (info->IsSecondary)
- OUTREGP(R128_CRTC2_GEN_CNTL, R128_CRTC2_DISP_DIS, ~mask2);
- else
- OUTREGP(R128_CRTC_EXT_CNTL,
- R128_CRTC_DISPLAY_DIS | R128_CRTC_HSYNC_DIS, ~mask);
- break;
- case DPMSModeSuspend:
- /* Screen: Off; HSync: On, VSync: Off */
- if (info->IsSecondary)
- OUTREGP(R128_CRTC2_GEN_CNTL, R128_CRTC2_DISP_DIS, ~mask2);
- else
- OUTREGP(R128_CRTC_EXT_CNTL,
- R128_CRTC_DISPLAY_DIS | R128_CRTC_VSYNC_DIS, ~mask);
- break;
- case DPMSModeOff:
- /* Screen: Off; HSync: Off, VSync: Off */
- if (info->IsSecondary)
- OUTREGP(R128_CRTC2_GEN_CNTL, mask2, ~mask2);
- else
- OUTREGP(R128_CRTC_EXT_CNTL, mask, ~mask);
- break;
- }
- if(info->isDFP) {
- switch (PowerManagementMode) {
- case DPMSModeOn:
- OUTREG(R128_FP_GEN_CNTL, INREG(R128_FP_GEN_CNTL) | (R128_FP_FPON | R128_FP_TDMS_EN));
- break;
- case DPMSModeStandby:
- case DPMSModeSuspend:
- case DPMSModeOff:
- OUTREG(R128_FP_GEN_CNTL, INREG(R128_FP_GEN_CNTL) & ~(R128_FP_FPON | R128_FP_TDMS_EN));
- break;
- }
- }
-}
-
-static int r128_set_backlight_enable(ScrnInfoPtr pScrn, int on);
-
-static void R128DisplayPowerManagementSetLCD(ScrnInfoPtr pScrn,
- int PowerManagementMode, int flags)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int mask = R128_LVDS_DISPLAY_DIS;
-
- switch (PowerManagementMode) {
- case DPMSModeOn:
- /* Screen: On; HSync: On, VSync: On */
- OUTREGP(R128_LVDS_GEN_CNTL, 0, ~mask);
- r128_set_backlight_enable(pScrn, 1);
- break;
- case DPMSModeStandby:
- /* Fall through */
- case DPMSModeSuspend:
- /* Fall through */
- break;
- case DPMSModeOff:
- /* Screen: Off; HSync: Off, VSync: Off */
- OUTREGP(R128_LVDS_GEN_CNTL, mask, ~mask);
- r128_set_backlight_enable(pScrn, 0);
- break;
- }
-}
-
-static int r128_set_backlight_enable(ScrnInfoPtr pScrn, int on)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- unsigned int lvds_gen_cntl = INREG(R128_LVDS_GEN_CNTL);
-
- lvds_gen_cntl |= (/*R128_LVDS_BL_MOD_EN |*/ R128_LVDS_BLON);
- if (on) {
- lvds_gen_cntl |= R128_LVDS_DIGON;
- if (!(lvds_gen_cntl & R128_LVDS_ON)) {
- lvds_gen_cntl &= ~R128_LVDS_BLON;
- OUTREG(R128_LVDS_GEN_CNTL, lvds_gen_cntl);
- (void)INREG(R128_LVDS_GEN_CNTL);
- usleep(10000);
- lvds_gen_cntl |= R128_LVDS_BLON;
- OUTREG(R128_LVDS_GEN_CNTL, lvds_gen_cntl);
- }
-#if 0
- lvds_gen_cntl &= ~R128_LVDS_BL_MOD_LEVEL_MASK;
- lvds_gen_cntl |= (0xFF /* backlight_conv[level] */ <<
- R128_LVDS_BL_MOD_LEVEL_SHIFT);
-#endif
- lvds_gen_cntl |= (R128_LVDS_ON | R128_LVDS_EN);
- lvds_gen_cntl &= ~R128_LVDS_DISPLAY_DIS;
- } else {
-#if 0
- lvds_gen_cntl &= ~R128_LVDS_BL_MOD_LEVEL_MASK;
- lvds_gen_cntl |= (0xFF /* backlight_conv[0] */ <<
- R128_LVDS_BL_MOD_LEVEL_SHIFT);
-#endif
- lvds_gen_cntl |= R128_LVDS_DISPLAY_DIS;
- OUTREG(R128_LVDS_GEN_CNTL, lvds_gen_cntl);
- usleep(10);
- lvds_gen_cntl &= ~(R128_LVDS_ON | R128_LVDS_EN | R128_LVDS_BLON
- | R128_LVDS_DIGON);
- }
-
- OUTREG(R128_LVDS_GEN_CNTL, lvds_gen_cntl);
-
- return 0;
-}
diff --git a/src/r128_misc.c b/src/r128_misc.c
deleted file mode 100644
index 2dc6040a..00000000
--- a/src/r128_misc.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Copyright 2000 through 2004 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that copyright
- * notice and this permission notice appear in supporting documentation, and
- * that the name of Marc Aurele La France not be used in advertising or
- * publicity pertaining to distribution of the software without specific,
- * written prior permission. Marc Aurele La France makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as-is" without express or implied warranty.
- *
- * MARC AURELE LA FRANCE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO
- * EVENT SHALL MARC AURELE LA FRANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "r128_probe.h"
-#include "r128_version.h"
-
-#include "xf86.h"
-
-/* Module loader interface for subsidiary driver module */
-
-static XF86ModuleVersionInfo R128VersionRec =
-{
- R128_DRIVER_NAME,
- MODULEVENDORSTRING,
- MODINFOSTRING1,
- MODINFOSTRING2,
- XORG_VERSION_CURRENT,
- R128_VERSION_MAJOR, R128_VERSION_MINOR, R128_VERSION_PATCH,
- ABI_CLASS_VIDEODRV,
- ABI_VIDEODRV_VERSION,
- MOD_CLASS_VIDEODRV,
- {0, 0, 0, 0}
-};
-
-/*
- * R128Setup --
- *
- * This function is called every time the module is loaded.
- */
-static pointer
-R128Setup
-(
- pointer Module,
- pointer Options,
- int *ErrorMajor,
- int *ErrorMinor
-)
-{
- static Bool Inited = FALSE;
-
- if (!Inited)
- {
- Inited = TRUE;
- xf86AddDriver(&R128, Module, HaveDriverFuncs);
- }
-
- return (pointer)TRUE;
-}
-
-/* The following record must be called r128ModuleData */
-_X_EXPORT XF86ModuleData r128ModuleData =
-{
- &R128VersionRec,
- R128Setup,
- NULL
-};
diff --git a/src/r128_probe.c b/src/r128_probe.c
deleted file mode 100644
index b1f427a4..00000000
--- a/src/r128_probe.c
+++ /dev/null
@@ -1,378 +0,0 @@
-/*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
- * Precision Insight, Inc., Cedar Park, Texas, and
- * VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
- * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <string.h>
-
-/*
- * Authors:
- * Rickard E. Faith <faith@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- */
-
-#include "r128_probe.h"
-#include "r128_version.h"
-#include "atipcirename.h"
-
-#include "xf86.h"
-#include "xf86PciInfo.h"
-#include "xf86Resources.h"
-
-#ifndef XSERVER_LIBPCIACCESS
-static Bool R128Probe(DriverPtr drv, int flags);
-#endif
-
-SymTabRec R128Chipsets[] = {
- { PCI_CHIP_RAGE128LE, "ATI Rage 128 Mobility M3 LE (PCI)" },
- { PCI_CHIP_RAGE128LF, "ATI Rage 128 Mobility M3 LF (AGP)" },
- { PCI_CHIP_RAGE128MF, "ATI Rage 128 Mobility M4 MF (AGP)" },
- { PCI_CHIP_RAGE128ML, "ATI Rage 128 Mobility M4 ML (AGP)" },
- { PCI_CHIP_RAGE128PA, "ATI Rage 128 Pro GL PA (PCI/AGP)" },
- { PCI_CHIP_RAGE128PB, "ATI Rage 128 Pro GL PB (PCI/AGP)" },
- { PCI_CHIP_RAGE128PC, "ATI Rage 128 Pro GL PC (PCI/AGP)" },
- { PCI_CHIP_RAGE128PD, "ATI Rage 128 Pro GL PD (PCI)" },
- { PCI_CHIP_RAGE128PE, "ATI Rage 128 Pro GL PE (PCI/AGP)" },
- { PCI_CHIP_RAGE128PF, "ATI Rage 128 Pro GL PF (AGP)" },
- { PCI_CHIP_RAGE128PG, "ATI Rage 128 Pro VR PG (PCI/AGP)" },
- { PCI_CHIP_RAGE128PH, "ATI Rage 128 Pro VR PH (PCI/AGP)" },
- { PCI_CHIP_RAGE128PI, "ATI Rage 128 Pro VR PI (PCI/AGP)" },
- { PCI_CHIP_RAGE128PJ, "ATI Rage 128 Pro VR PJ (PCI/AGP)" },
- { PCI_CHIP_RAGE128PK, "ATI Rage 128 Pro VR PK (PCI/AGP)" },
- { PCI_CHIP_RAGE128PL, "ATI Rage 128 Pro VR PL (PCI/AGP)" },
- { PCI_CHIP_RAGE128PM, "ATI Rage 128 Pro VR PM (PCI/AGP)" },
- { PCI_CHIP_RAGE128PN, "ATI Rage 128 Pro VR PN (PCI/AGP)" },
- { PCI_CHIP_RAGE128PO, "ATI Rage 128 Pro VR PO (PCI/AGP)" },
- { PCI_CHIP_RAGE128PP, "ATI Rage 128 Pro VR PP (PCI)" },
- { PCI_CHIP_RAGE128PQ, "ATI Rage 128 Pro VR PQ (PCI/AGP)" },
- { PCI_CHIP_RAGE128PR, "ATI Rage 128 Pro VR PR (PCI)" },
- { PCI_CHIP_RAGE128PS, "ATI Rage 128 Pro VR PS (PCI/AGP)" },
- { PCI_CHIP_RAGE128PT, "ATI Rage 128 Pro VR PT (PCI/AGP)" },
- { PCI_CHIP_RAGE128PU, "ATI Rage 128 Pro VR PU (PCI/AGP)" },
- { PCI_CHIP_RAGE128PV, "ATI Rage 128 Pro VR PV (PCI/AGP)" },
- { PCI_CHIP_RAGE128PW, "ATI Rage 128 Pro VR PW (PCI/AGP)" },
- { PCI_CHIP_RAGE128PX, "ATI Rage 128 Pro VR PX (PCI/AGP)" },
- { PCI_CHIP_RAGE128RE, "ATI Rage 128 GL RE (PCI)" },
- { PCI_CHIP_RAGE128RF, "ATI Rage 128 GL RF (AGP)" },
- { PCI_CHIP_RAGE128RG, "ATI Rage 128 RG (AGP)" },
- { PCI_CHIP_RAGE128RK, "ATI Rage 128 VR RK (PCI)" },
- { PCI_CHIP_RAGE128RL, "ATI Rage 128 VR RL (AGP)" },
- { PCI_CHIP_RAGE128SE, "ATI Rage 128 4X SE (PCI/AGP)" },
- { PCI_CHIP_RAGE128SF, "ATI Rage 128 4X SF (PCI/AGP)" },
- { PCI_CHIP_RAGE128SG, "ATI Rage 128 4X SG (PCI/AGP)" },
- { PCI_CHIP_RAGE128SH, "ATI Rage 128 4X SH (PCI/AGP)" },
- { PCI_CHIP_RAGE128SK, "ATI Rage 128 4X SK (PCI/AGP)" },
- { PCI_CHIP_RAGE128SL, "ATI Rage 128 4X SL (PCI/AGP)" },
- { PCI_CHIP_RAGE128SM, "ATI Rage 128 4X SM (AGP)" },
- { PCI_CHIP_RAGE128SN, "ATI Rage 128 4X SN (PCI/AGP)" },
- { PCI_CHIP_RAGE128TF, "ATI Rage 128 Pro ULTRA TF (AGP)" },
- { PCI_CHIP_RAGE128TL, "ATI Rage 128 Pro ULTRA TL (AGP)" },
- { PCI_CHIP_RAGE128TR, "ATI Rage 128 Pro ULTRA TR (AGP)" },
- { PCI_CHIP_RAGE128TS, "ATI Rage 128 Pro ULTRA TS (AGP?)" },
- { PCI_CHIP_RAGE128TT, "ATI Rage 128 Pro ULTRA TT (AGP?)" },
- { PCI_CHIP_RAGE128TU, "ATI Rage 128 Pro ULTRA TU (AGP?)" },
- { -1, NULL }
-};
-
-static PciChipsets R128PciChipsets[] = {
- { PCI_CHIP_RAGE128LE, PCI_CHIP_RAGE128LE, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128LF, PCI_CHIP_RAGE128LF, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128MF, PCI_CHIP_RAGE128MF, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128ML, PCI_CHIP_RAGE128ML, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PA, PCI_CHIP_RAGE128PA, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PB, PCI_CHIP_RAGE128PB, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PC, PCI_CHIP_RAGE128PC, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PD, PCI_CHIP_RAGE128PD, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PE, PCI_CHIP_RAGE128PE, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PF, PCI_CHIP_RAGE128PF, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PG, PCI_CHIP_RAGE128PG, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PH, PCI_CHIP_RAGE128PH, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PI, PCI_CHIP_RAGE128PI, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PJ, PCI_CHIP_RAGE128PJ, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PK, PCI_CHIP_RAGE128PK, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PL, PCI_CHIP_RAGE128PL, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PM, PCI_CHIP_RAGE128PM, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PN, PCI_CHIP_RAGE128PN, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PO, PCI_CHIP_RAGE128PO, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PP, PCI_CHIP_RAGE128PP, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PQ, PCI_CHIP_RAGE128PQ, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PR, PCI_CHIP_RAGE128PR, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PS, PCI_CHIP_RAGE128PS, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PT, PCI_CHIP_RAGE128PT, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PU, PCI_CHIP_RAGE128PU, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PV, PCI_CHIP_RAGE128PV, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PW, PCI_CHIP_RAGE128PW, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128PX, PCI_CHIP_RAGE128PX, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128RE, PCI_CHIP_RAGE128RE, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128RF, PCI_CHIP_RAGE128RF, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128RG, PCI_CHIP_RAGE128RG, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128RK, PCI_CHIP_RAGE128RK, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128RL, PCI_CHIP_RAGE128RL, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128SE, PCI_CHIP_RAGE128SE, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128SF, PCI_CHIP_RAGE128SF, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128SG, PCI_CHIP_RAGE128SG, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128SH, PCI_CHIP_RAGE128SH, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128SK, PCI_CHIP_RAGE128SK, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128SL, PCI_CHIP_RAGE128SL, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128SM, PCI_CHIP_RAGE128SM, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128SN, PCI_CHIP_RAGE128SN, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128TF, PCI_CHIP_RAGE128TF, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128TL, PCI_CHIP_RAGE128TL, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128TR, PCI_CHIP_RAGE128TR, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128TS, PCI_CHIP_RAGE128TS, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128TT, PCI_CHIP_RAGE128TT, RES_SHARED_VGA },
- { PCI_CHIP_RAGE128TU, PCI_CHIP_RAGE128TU, RES_SHARED_VGA },
- { -1, -1, RES_UNDEFINED }
-};
-
-#ifdef XSERVER_LIBPCIACCESS
-
-static const struct pci_id_match r128_device_match[] = {
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128LE, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128LF, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128MF, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128ML, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PA, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PB, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PC, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PD, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PE, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PF, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PG, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PH, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PI, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PJ, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PK, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PL, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PM, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PN, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PO, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PP, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PQ, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PR, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PS, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PT, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PU, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PV, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PW, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PX, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128RE, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128RF, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128RG, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128RK, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128RL, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SE, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SF, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SG, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SH, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SK, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SL, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SM, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SN, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128TF, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128TL, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128TR, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128TS, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128TT, 0 ),
- ATI_DEVICE_MATCH( PCI_CHIP_RAGE128TU, 0 ),
- { 0, 0, 0 }
-};
-
-#endif /* XSERVER_LIBPCIACCESS */
-
-int gR128EntityIndex = -1;
-
-/* Return the options for supported chipset 'n'; NULL otherwise */
-static const OptionInfoRec *
-R128AvailableOptions(int chipid, int busid)
-{
- return R128OptionsWeak();
-}
-
-/* Return the string name for supported chipset 'n'; NULL otherwise. */
-static void
-R128Identify(int flags)
-{
- xf86PrintChipsets(R128_NAME,
- "Driver for ATI Rage 128 chipsets",
- R128Chipsets);
-}
-
-static Bool
-r128_get_scrninfo(int entity_num)
-{
- ScrnInfoPtr pScrn = NULL;
- EntityInfoPtr pEnt;
-
- pScrn = xf86ConfigPciEntity(pScrn, 0, entity_num, R128PciChipsets,
- NULL,
- NULL, NULL, NULL, NULL);
-
- if (!pScrn)
- return FALSE;
-
- pScrn->driverVersion = R128_VERSION_CURRENT;
- pScrn->driverName = R128_DRIVER_NAME;
- pScrn->name = R128_NAME;
-#ifdef XSERVER_LIBPCIACCESS
- pScrn->Probe = NULL;
-#else
- pScrn->Probe = R128Probe;
-#endif
- pScrn->PreInit = R128PreInit;
- pScrn->ScreenInit = R128ScreenInit;
- pScrn->SwitchMode = R128SwitchMode;
- pScrn->AdjustFrame = R128AdjustFrame;
- pScrn->EnterVT = R128EnterVT;
- pScrn->LeaveVT = R128LeaveVT;
- pScrn->FreeScreen = R128FreeScreen;
- pScrn->ValidMode = R128ValidMode;
-
- pEnt = xf86GetEntityInfo(entity_num);
-
- /* mobility cards support Dual-Head, mark the entity as sharable*/
- if (pEnt->chipset == PCI_CHIP_RAGE128LE ||
- pEnt->chipset == PCI_CHIP_RAGE128LF ||
- pEnt->chipset == PCI_CHIP_RAGE128MF ||
- pEnt->chipset == PCI_CHIP_RAGE128ML)
- {
- static int instance = 0;
- DevUnion* pPriv;
-
- xf86SetEntitySharable(entity_num);
-
- xf86SetEntityInstanceForScreen(pScrn,
- pScrn->entityList[0],
- instance);
-
- if (gR128EntityIndex < 0)
- {
- gR128EntityIndex = xf86AllocateEntityPrivateIndex();
-
- pPriv = xf86GetEntityPrivate(pScrn->entityList[0],
- gR128EntityIndex);
-
- if (!pPriv->ptr)
- {
- R128EntPtr pR128Ent;
- pPriv->ptr = xnfcalloc(sizeof(R128EntRec), 1);
- pR128Ent = pPriv->ptr;
- pR128Ent->IsDRIEnabled = FALSE;
- pR128Ent->BypassSecondary = FALSE;
- pR128Ent->HasSecondary = FALSE;
- pR128Ent->IsSecondaryRestored = FALSE;
- }
- }
- instance++;
- }
-
- xfree(pEnt);
-
- return TRUE;
-}
-
-#ifndef XSERVER_LIBPCIACCESS
-
-/* Return TRUE if chipset is present; FALSE otherwise. */
-static Bool
-R128Probe(DriverPtr drv, int flags)
-{
- int numUsed;
- int numDevSections;
- int *usedChips;
- GDevPtr *devSections;
- Bool foundScreen = FALSE;
- int i;
-
- if (!xf86GetPciVideoInfo()) return FALSE;
-
- numDevSections = xf86MatchDevice(R128_NAME, &devSections);
-
- if (!numDevSections) return FALSE;
-
- numUsed = xf86MatchPciInstances(R128_NAME,
- PCI_VENDOR_ATI,
- R128Chipsets,
- R128PciChipsets,
- devSections,
- numDevSections,
- drv,
- &usedChips);
-
- if (numUsed<=0) return FALSE;
-
- if (flags & PROBE_DETECT)
- foundScreen = TRUE;
- else for (i = 0; i < numUsed; i++) {
- if (r128_get_scrninfo(usedChips[i]))
- foundScreen = TRUE;
- }
-
- xfree(usedChips);
- xfree(devSections);
-
- return foundScreen;
-}
-
-#else /* XSERVER_LIBPCIACCESS */
-
-static Bool
-r128_pci_probe(
- DriverPtr pDriver,
- int entity_num,
- struct pci_device *device,
- intptr_t match_data
-)
-{
- return r128_get_scrninfo(entity_num);
-}
-
-#endif /* XSERVER_LIBPCIACCESS */
-
-_X_EXPORT DriverRec R128 =
-{
- R128_VERSION_CURRENT,
- R128_DRIVER_NAME,
- R128Identify,
-#ifdef XSERVER_LIBPCIACCESS
- NULL,
-#else
- R128Probe,
-#endif
- R128AvailableOptions,
- NULL,
- 0,
- NULL,
-#ifdef XSERVER_LIBPCIACCESS
- r128_device_match,
- r128_pci_probe
-#endif
-};
diff --git a/src/r128_probe.h b/src/r128_probe.h
deleted file mode 100644
index 59c9a006..00000000
--- a/src/r128_probe.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
- * VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
- * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-/*
- * Authors:
- * Kevin E. Martin <martin@valinux.com>
- *
- * Modified by Marc Aurele La France <tsi@xfree86.org> for ATI driver merge.
- */
-
-#ifndef _R128_PROBE_H_
-#define _R128_PROBE_H_ 1
-
-#include "xf86str.h"
-
-extern DriverRec R128;
-
-typedef struct
-{
- Bool IsDRIEnabled;
-
- Bool HasSecondary;
- Bool BypassSecondary;
- /*These two registers are used to make sure the CRTC2 is
- retored before CRTC_EXT, otherwise it could lead to blank screen.*/
- Bool IsSecondaryRestored;
- Bool RestorePrimary;
-
- ScrnInfoPtr pSecondaryScrn;
- ScrnInfoPtr pPrimaryScrn;
-} R128EntRec, *R128EntPtr;
-
-/* r128_probe.c */
-extern SymTabRec R128Chipsets[];
-
-/* r128_driver.c */
-extern Bool R128PreInit(ScrnInfoPtr, int);
-extern Bool R128ScreenInit(int, ScreenPtr, int, char **);
-extern Bool R128SwitchMode(int, DisplayModePtr, int);
-extern void R128AdjustFrame(int, int, int, int);
-extern Bool R128EnterVT(int, int);
-extern void R128LeaveVT(int, int);
-extern void R128FreeScreen(int, int);
-extern ModeStatus R128ValidMode(int, DisplayModePtr, Bool, int);
-
-extern const OptionInfoRec * R128OptionsWeak(void);
-
-#endif /* _R128_PROBE_H_ */
diff --git a/src/r128_reg.h b/src/r128_reg.h
deleted file mode 100644
index dac22e6b..00000000
--- a/src/r128_reg.h
+++ /dev/null
@@ -1,1533 +0,0 @@
-/*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
- * Precision Insight, Inc., Cedar Park, Texas, and
- * VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
- * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/*
- * Authors:
- * Rickard E. Faith <faith@valinux.com>
- * Kevin E. Martin <martin@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- * References:
- *
- * RAGE 128 VR/ RAGE 128 GL Register Reference Manual (Technical
- * Reference Manual P/N RRG-G04100-C Rev. 0.04), ATI Technologies: April
- * 1999.
- *
- * RAGE 128 Software Development Manual (Technical Reference Manual P/N
- * SDK-G04000 Rev. 0.01), ATI Technologies: June 1999.
- *
- */
-
-#ifndef _R128_REG_H_
-#define _R128_REG_H_
-
-#include "compiler.h"
-
- /* Memory mapped register access macros */
-#define INREG8(addr) MMIO_IN8(R128MMIO, addr)
-#define INREG16(addr) MMIO_IN16(R128MMIO, addr)
-#define INREG(addr) MMIO_IN32(R128MMIO, addr)
-#define OUTREG8(addr, val) MMIO_OUT8(R128MMIO, addr, val)
-#define OUTREG16(addr, val) MMIO_OUT16(R128MMIO, addr, val)
-#define OUTREG(addr, val) MMIO_OUT32(R128MMIO, addr, val)
-
-#define ADDRREG(addr) ((volatile CARD32 *)(pointer)(R128MMIO + (addr)))
-
-
-#define OUTREGP(addr, val, mask) \
- do { \
- CARD32 tmp = INREG(addr); \
- tmp &= (mask); \
- tmp |= ((val) & ~(mask)); \
- OUTREG(addr, tmp); \
- } while (0)
-
-#define INPLL(pScrn, addr) R128INPLL(pScrn, addr)
-
-#define OUTPLL(addr, val) \
- do { \
- OUTREG8(R128_CLOCK_CNTL_INDEX, ((addr) & 0x3f) | R128_PLL_WR_EN); \
- OUTREG(R128_CLOCK_CNTL_DATA, val); \
- } while (0)
-
-#define OUTPLLP(pScrn, addr, val, mask) \
- do { \
- CARD32 tmp = INPLL(pScrn, addr); \
- tmp &= (mask); \
- tmp |= ((val) & ~(mask)); \
- OUTPLL(addr, tmp); \
- } while (0)
-
-#define OUTPAL_START(idx) \
- do { \
- OUTREG8(R128_PALETTE_INDEX, (idx)); \
- } while (0)
-
-#define OUTPAL_NEXT(r, g, b) \
- do { \
- OUTREG(R128_PALETTE_DATA, ((r) << 16) | ((g) << 8) | (b)); \
- } while (0)
-
-#define OUTPAL_NEXT_CARD32(v) \
- do { \
- OUTREG(R128_PALETTE_DATA, (v & 0x00ffffff)); \
- } while (0)
-
-#define OUTPAL(idx, r, g, b) \
- do { \
- OUTPAL_START((idx)); \
- OUTPAL_NEXT((r), (g), (b)); \
- } while (0)
-
-#define INPAL_START(idx) \
- do { \
- OUTREG(R128_PALETTE_INDEX, (idx) << 16); \
- } while (0)
-
-#define INPAL_NEXT() INREG(R128_PALETTE_DATA)
-
-#define PAL_SELECT(idx) \
- do { \
- CARD32 tmp = INREG(R128_DAC_CNTL); \
- if (idx) { \
- OUTREG(R128_DAC_CNTL, tmp | R128_DAC_PALETTE_ACC_CTL); \
- } else { \
- OUTREG(R128_DAC_CNTL, tmp & \
- (CARD32)~R128_DAC_PALETTE_ACC_CTL); \
- } \
- } while (0)
-
-#define R128_ADAPTER_ID 0x0f2c /* PCI */
-#define R128_AGP_APER_OFFSET 0x0178
-#define R128_AGP_BASE 0x0170
-#define R128_AGP_CNTL 0x0174
-# define R128_AGP_APER_SIZE_256MB (0x00 << 0)
-# define R128_AGP_APER_SIZE_128MB (0x20 << 0)
-# define R128_AGP_APER_SIZE_64MB (0x30 << 0)
-# define R128_AGP_APER_SIZE_32MB (0x38 << 0)
-# define R128_AGP_APER_SIZE_16MB (0x3c << 0)
-# define R128_AGP_APER_SIZE_8MB (0x3e << 0)
-# define R128_AGP_APER_SIZE_4MB (0x3f << 0)
-# define R128_AGP_APER_SIZE_MASK (0x3f << 0)
-#define R128_AGP_CNTL_B 0x0b44
-#define R128_AGP_COMMAND 0x0f58 /* PCI */
-#define R128_AGP_PLL_CNTL 0x0010 /* PLL */
-#define R128_AGP_STATUS 0x0f54 /* PCI */
-# define R128_AGP_1X_MODE 0x01
-# define R128_AGP_2X_MODE 0x02
-# define R128_AGP_4X_MODE 0x04
-# define R128_AGP_MODE_MASK 0x07
-#define R128_AMCGPIO_A_REG 0x01a0
-#define R128_AMCGPIO_EN_REG 0x01a8
-#define R128_AMCGPIO_MASK 0x0194
-#define R128_AMCGPIO_Y_REG 0x01a4
-#define R128_ATTRDR 0x03c1 /* VGA */
-#define R128_ATTRDW 0x03c0 /* VGA */
-#define R128_ATTRX 0x03c0 /* VGA */
-#define R128_AUX_SC_CNTL 0x1660
-# define R128_AUX1_SC_EN (1 << 0)
-# define R128_AUX1_SC_MODE_OR (0 << 1)
-# define R128_AUX1_SC_MODE_NAND (1 << 1)
-# define R128_AUX2_SC_EN (1 << 2)
-# define R128_AUX2_SC_MODE_OR (0 << 3)
-# define R128_AUX2_SC_MODE_NAND (1 << 3)
-# define R128_AUX3_SC_EN (1 << 4)
-# define R128_AUX3_SC_MODE_OR (0 << 5)
-# define R128_AUX3_SC_MODE_NAND (1 << 5)
-#define R128_AUX1_SC_BOTTOM 0x1670
-#define R128_AUX1_SC_LEFT 0x1664
-#define R128_AUX1_SC_RIGHT 0x1668
-#define R128_AUX1_SC_TOP 0x166c
-#define R128_AUX2_SC_BOTTOM 0x1680
-#define R128_AUX2_SC_LEFT 0x1674
-#define R128_AUX2_SC_RIGHT 0x1678
-#define R128_AUX2_SC_TOP 0x167c
-#define R128_AUX3_SC_BOTTOM 0x1690
-#define R128_AUX3_SC_LEFT 0x1684
-#define R128_AUX3_SC_RIGHT 0x1688
-#define R128_AUX3_SC_TOP 0x168c
-#define R128_AUX_WINDOW_HORZ_CNTL 0x02d8
-#define R128_AUX_WINDOW_VERT_CNTL 0x02dc
-
-#define R128_BASE_CODE 0x0f0b
-#define R128_BIOS_0_SCRATCH 0x0010
-#define R128_BIOS_1_SCRATCH 0x0014
-#define R128_BIOS_2_SCRATCH 0x0018
-#define R128_BIOS_3_SCRATCH 0x001c
-#define R128_BIOS_4_SCRATCH 0x0020
-#define R128_BIOS_5_SCRATCH 0x0024
-# define R128_BIOS_DISPLAY_FP (1 << 0)
-# define R128_BIOS_DISPLAY_CRT (2 << 0)
-# define R128_BIOS_DISPLAY_FP_CRT (3 << 0)
-/* R128_DUALHEAD is just a flag for the driver;
- it doesn't actually correspond to any bits */
-# define R128_DUALHEAD 4
-#define R128_BIOS_6_SCRATCH 0x0028
-#define R128_BIOS_7_SCRATCH 0x002c
-#define R128_BIOS_ROM 0x0f30 /* PCI */
-#define R128_BIST 0x0f0f /* PCI */
-#define R128_BM_CHUNK_0_VAL 0x0a18
-# define R128_BM_PTR_FORCE_TO_PCI (1 << 21)
-# define R128_BM_PM4_RD_FORCE_TO_PCI (1 << 22)
-# define R128_BM_GLOBAL_FORCE_TO_PCI (1 << 23)
-#define R128_BRUSH_DATA0 0x1480
-#define R128_BRUSH_DATA1 0x1484
-#define R128_BRUSH_DATA10 0x14a8
-#define R128_BRUSH_DATA11 0x14ac
-#define R128_BRUSH_DATA12 0x14b0
-#define R128_BRUSH_DATA13 0x14b4
-#define R128_BRUSH_DATA14 0x14b8
-#define R128_BRUSH_DATA15 0x14bc
-#define R128_BRUSH_DATA16 0x14c0
-#define R128_BRUSH_DATA17 0x14c4
-#define R128_BRUSH_DATA18 0x14c8
-#define R128_BRUSH_DATA19 0x14cc
-#define R128_BRUSH_DATA2 0x1488
-#define R128_BRUSH_DATA20 0x14d0
-#define R128_BRUSH_DATA21 0x14d4
-#define R128_BRUSH_DATA22 0x14d8
-#define R128_BRUSH_DATA23 0x14dc
-#define R128_BRUSH_DATA24 0x14e0
-#define R128_BRUSH_DATA25 0x14e4
-#define R128_BRUSH_DATA26 0x14e8
-#define R128_BRUSH_DATA27 0x14ec
-#define R128_BRUSH_DATA28 0x14f0
-#define R128_BRUSH_DATA29 0x14f4
-#define R128_BRUSH_DATA3 0x148c
-#define R128_BRUSH_DATA30 0x14f8
-#define R128_BRUSH_DATA31 0x14fc
-#define R128_BRUSH_DATA32 0x1500
-#define R128_BRUSH_DATA33 0x1504
-#define R128_BRUSH_DATA34 0x1508
-#define R128_BRUSH_DATA35 0x150c
-#define R128_BRUSH_DATA36 0x1510
-#define R128_BRUSH_DATA37 0x1514
-#define R128_BRUSH_DATA38 0x1518
-#define R128_BRUSH_DATA39 0x151c
-#define R128_BRUSH_DATA4 0x1490
-#define R128_BRUSH_DATA40 0x1520
-#define R128_BRUSH_DATA41 0x1524
-#define R128_BRUSH_DATA42 0x1528
-#define R128_BRUSH_DATA43 0x152c
-#define R128_BRUSH_DATA44 0x1530
-#define R128_BRUSH_DATA45 0x1534
-#define R128_BRUSH_DATA46 0x1538
-#define R128_BRUSH_DATA47 0x153c
-#define R128_BRUSH_DATA48 0x1540
-#define R128_BRUSH_DATA49 0x1544
-#define R128_BRUSH_DATA5 0x1494
-#define R128_BRUSH_DATA50 0x1548
-#define R128_BRUSH_DATA51 0x154c
-#define R128_BRUSH_DATA52 0x1550
-#define R128_BRUSH_DATA53 0x1554
-#define R128_BRUSH_DATA54 0x1558
-#define R128_BRUSH_DATA55 0x155c
-#define R128_BRUSH_DATA56 0x1560
-#define R128_BRUSH_DATA57 0x1564
-#define R128_BRUSH_DATA58 0x1568
-#define R128_BRUSH_DATA59 0x156c
-#define R128_BRUSH_DATA6 0x1498
-#define R128_BRUSH_DATA60 0x1570
-#define R128_BRUSH_DATA61 0x1574
-#define R128_BRUSH_DATA62 0x1578
-#define R128_BRUSH_DATA63 0x157c
-#define R128_BRUSH_DATA7 0x149c
-#define R128_BRUSH_DATA8 0x14a0
-#define R128_BRUSH_DATA9 0x14a4
-#define R128_BRUSH_SCALE 0x1470
-#define R128_BRUSH_Y_X 0x1474
-#define R128_BUS_CNTL 0x0030
-# define R128_BUS_MASTER_DIS (1 << 6)
-# define R128_BUS_RD_DISCARD_EN (1 << 24)
-# define R128_BUS_RD_ABORT_EN (1 << 25)
-# define R128_BUS_MSTR_DISCONNECT_EN (1 << 28)
-# define R128_BUS_WRT_BURST (1 << 29)
-# define R128_BUS_READ_BURST (1 << 30)
-#define R128_BUS_CNTL1 0x0034
-# define R128_BUS_WAIT_ON_LOCK_EN (1 << 4)
-
-#define R128_CACHE_CNTL 0x1724
-#define R128_CACHE_LINE 0x0f0c /* PCI */
-#define R128_CAP0_TRIG_CNTL 0x0950 /* ? */
-#define R128_CAP1_TRIG_CNTL 0x09c0 /* ? */
-#define R128_CAPABILITIES_ID 0x0f50 /* PCI */
-#define R128_CAPABILITIES_PTR 0x0f34 /* PCI */
-#define R128_CLK_PIN_CNTL 0x0001 /* PLL */
-#define R128_CLOCK_CNTL_DATA 0x000c
-#define R128_CLOCK_CNTL_INDEX 0x0008
-# define R128_PLL_WR_EN (1 << 7)
-# define R128_PLL_DIV_SEL (3 << 8)
-# define R128_PLL2_DIV_SEL_MASK ~(3 << 8)
-#define R128_CLR_CMP_CLR_3D 0x1a24
-#define R128_CLR_CMP_CLR_DST 0x15c8
-#define R128_CLR_CMP_CLR_SRC 0x15c4
-#define R128_CLR_CMP_CNTL 0x15c0
-# define R128_SRC_CMP_EQ_COLOR (4 << 0)
-# define R128_SRC_CMP_NEQ_COLOR (5 << 0)
-# define R128_CLR_CMP_SRC_SOURCE (1 << 24)
-#define R128_CLR_CMP_MASK 0x15cc
-# define R128_CLR_CMP_MSK 0xffffffff
-#define R128_CLR_CMP_MASK_3D 0x1A28
-#define R128_COMMAND 0x0f04 /* PCI */
-#define R128_COMPOSITE_SHADOW_ID 0x1a0c
-#define R128_CONFIG_APER_0_BASE 0x0100
-#define R128_CONFIG_APER_1_BASE 0x0104
-#define R128_CONFIG_APER_SIZE 0x0108
-#define R128_CONFIG_BONDS 0x00e8
-#define R128_CONFIG_CNTL 0x00e0
-# define APER_0_BIG_ENDIAN_16BPP_SWAP (1 << 0)
-# define APER_0_BIG_ENDIAN_32BPP_SWAP (2 << 0)
-#define R128_CONFIG_MEMSIZE 0x00f8
-#define R128_CONFIG_MEMSIZE_EMBEDDED 0x0114
-#define R128_CONFIG_REG_1_BASE 0x010c
-#define R128_CONFIG_REG_APER_SIZE 0x0110
-#define R128_CONFIG_XSTRAP 0x00e4
-#define R128_CONSTANT_COLOR_C 0x1d34
-# define R128_CONSTANT_COLOR_MASK 0x00ffffff
-# define R128_CONSTANT_COLOR_ONE 0x00ffffff
-# define R128_CONSTANT_COLOR_ZERO 0x00000000
-#define R128_CRC_CMDFIFO_ADDR 0x0740
-#define R128_CRC_CMDFIFO_DOUT 0x0744
-#define R128_CRTC_CRNT_FRAME 0x0214
-#define R128_CRTC_DEBUG 0x021c
-#define R128_CRTC_EXT_CNTL 0x0054
-# define R128_CRTC_VGA_XOVERSCAN (1 << 0)
-# define R128_VGA_ATI_LINEAR (1 << 3)
-# define R128_XCRT_CNT_EN (1 << 6)
-# define R128_CRTC_HSYNC_DIS (1 << 8)
-# define R128_CRTC_VSYNC_DIS (1 << 9)
-# define R128_CRTC_DISPLAY_DIS (1 << 10)
-# define R128_CRTC_CRT_ON (1 << 15)
-# define R128_FP_OUT_EN (1 << 22)
-# define R128_FP_ACTIVE (1 << 23)
-#define R128_CRTC_EXT_CNTL_DPMS_BYTE 0x0055
-# define R128_CRTC_HSYNC_DIS_BYTE (1 << 0)
-# define R128_CRTC_VSYNC_DIS_BYTE (1 << 1)
-# define R128_CRTC_DISPLAY_DIS_BYTE (1 << 2)
-#define R128_CRTC_GEN_CNTL 0x0050
-# define R128_CRTC_DBL_SCAN_EN (1 << 0)
-# define R128_CRTC_INTERLACE_EN (1 << 1)
-# define R128_CRTC_CSYNC_EN (1 << 4)
-# define R128_CRTC_CUR_EN (1 << 16)
-# define R128_CRTC_CUR_MODE_MASK (7 << 17)
-# define R128_CRTC_ICON_EN (1 << 20)
-# define R128_CRTC_EXT_DISP_EN (1 << 24)
-# define R128_CRTC_EN (1 << 25)
-# define R128_CRTC_DISP_REQ_EN_B (1 << 26)
-#define R128_CRTC_GUI_TRIG_VLINE 0x0218
-#define R128_CRTC_H_SYNC_STRT_WID 0x0204
-# define R128_CRTC_H_SYNC_STRT_PIX (0x07 << 0)
-# define R128_CRTC_H_SYNC_STRT_CHAR (0x1ff << 3)
-# define R128_CRTC_H_SYNC_STRT_CHAR_SHIFT 3
-# define R128_CRTC_H_SYNC_WID (0x3f << 16)
-# define R128_CRTC_H_SYNC_WID_SHIFT 16
-# define R128_CRTC_H_SYNC_POL (1 << 23)
-#define R128_CRTC_H_TOTAL_DISP 0x0200
-# define R128_CRTC_H_TOTAL (0x01ff << 0)
-# define R128_CRTC_H_TOTAL_SHIFT 0
-# define R128_CRTC_H_DISP (0x00ff << 16)
-# define R128_CRTC_H_DISP_SHIFT 16
-#define R128_CRTC_OFFSET 0x0224
-#define R128_CRTC_OFFSET_CNTL 0x0228
-#define R128_CRTC_PITCH 0x022c
-#define R128_CRTC_STATUS 0x005c
-# define R128_CRTC_VBLANK_SAVE (1 << 1)
-#define R128_CRTC_V_SYNC_STRT_WID 0x020c
-# define R128_CRTC_V_SYNC_STRT (0x7ff << 0)
-# define R128_CRTC_V_SYNC_STRT_SHIFT 0
-# define R128_CRTC_V_SYNC_WID (0x1f << 16)
-# define R128_CRTC_V_SYNC_WID_SHIFT 16
-# define R128_CRTC_V_SYNC_POL (1 << 23)
-#define R128_CRTC_V_TOTAL_DISP 0x0208
-# define R128_CRTC_V_TOTAL (0x07ff << 0)
-# define R128_CRTC_V_TOTAL_SHIFT 0
-# define R128_CRTC_V_DISP (0x07ff << 16)
-# define R128_CRTC_V_DISP_SHIFT 16
-#define R128_CRTC_VLINE_CRNT_VLINE 0x0210
-# define R128_CRTC_CRNT_VLINE_MASK (0x7ff << 16)
-#define R128_CRTC2_CRNT_FRAME 0x0314
-#define R128_CRTC2_DEBUG 0x031c
-#define R128_CRTC2_GEN_CNTL 0x03f8
-# define R128_CRTC2_DBL_SCAN_EN (1 << 0)
-# define R128_CRTC2_CUR_EN (1 << 16)
-# define R128_CRTC2_ICON_EN (1 << 20)
-# define R128_CRTC2_DISP_DIS (1 << 23)
-# define R128_CRTC2_EN (1 << 25)
-# define R128_CRTC2_DISP_REQ_EN_B (1 << 26)
-#define R128_CRTC2_GUI_TRIG_VLINE 0x0318
-#define R128_CRTC2_H_SYNC_STRT_WID 0x0304
-# define R128_CRTC2_H_SYNC_STRT_PIX (0x07 << 0)
-# define R128_CRTC2_H_SYNC_STRT_CHAR (0x1ff << 3)
-# define R128_CRTC2_H_SYNC_STRT_CHAR_SHIFT 3
-# define R128_CRTC2_H_SYNC_WID (0x3f << 16)
-# define R128_CRTC2_H_SYNC_WID_SHIFT 16
-# define R128_CRTC2_H_SYNC_POL (1 << 23)
-#define R128_CRTC2_H_TOTAL_DISP 0x0300
-# define R128_CRTC2_H_TOTAL (0x01ff << 0)
-# define R128_CRTC2_H_TOTAL_SHIFT 0
-# define R128_CRTC2_H_DISP (0x00ff << 16)
-# define R128_CRTC2_H_DISP_SHIFT 16
-#define R128_CRTC2_OFFSET 0x0324
-#define R128_CRTC2_OFFSET_CNTL 0x0328
-# define R128_CRTC2_TILE_EN (1 << 15)
-#define R128_CRTC2_PITCH 0x032c
-#define R128_CRTC2_STATUS 0x03fc
-#define R128_CRTC2_V_SYNC_STRT_WID 0x030c
-# define R128_CRTC2_V_SYNC_STRT (0x7ff << 0)
-# define R128_CRTC2_V_SYNC_STRT_SHIFT 0
-# define R128_CRTC2_V_SYNC_WID (0x1f << 16)
-# define R128_CRTC2_V_SYNC_WID_SHIFT 16
-# define R128_CRTC2_V_SYNC_POL (1 << 23)
-#define R128_CRTC2_V_TOTAL_DISP 0x0308
-# define R128_CRTC2_V_TOTAL (0x07ff << 0)
-# define R128_CRTC2_V_TOTAL_SHIFT 0
-# define R128_CRTC2_V_DISP (0x07ff << 16)
-# define R128_CRTC2_V_DISP_SHIFT 16
-#define R128_CRTC2_VLINE_CRNT_VLINE 0x0310
-#define R128_CRTC8_DATA 0x03d5 /* VGA, 0x3b5 */
-#define R128_CRTC8_IDX 0x03d4 /* VGA, 0x3b4 */
-#define R128_CUR_CLR0 0x026c
-#define R128_CUR_CLR1 0x0270
-#define R128_CUR_HORZ_VERT_OFF 0x0268
-#define R128_CUR_HORZ_VERT_POSN 0x0264
-#define R128_CUR_OFFSET 0x0260
-# define R128_CUR_LOCK (1 << 31)
-#define R128_CUR2_CLR0 0x036c
-#define R128_CUR2_CLR1 0x0370
-#define R128_CUR2_HORZ_VERT_OFF 0x0368
-#define R128_CUR2_HORZ_VERT_POSN 0x0364
-#define R128_CUR2_OFFSET 0x0360
-# define R128_CUR2_LOCK (1 << 31)
-
-#define R128_DAC_CNTL 0x0058
-# define R128_DAC_RANGE_CNTL (3 << 0)
-# define R128_DAC_BLANKING (1 << 2)
-# define R128_DAC_CRT_SEL_CRTC2 (1 << 4)
-# define R128_DAC_PALETTE_ACC_CTL (1 << 5)
-# define R128_DAC_PALETTE2_SNOOP_EN (1 << 6)
-# define R128_DAC_8BIT_EN (1 << 8)
-# define R128_DAC_VGA_ADR_EN (1 << 13)
-# define R128_DAC_MASK_ALL (0xff << 24)
-#define R128_DAC_CRC_SIG 0x02cc
-#define R128_DAC_DATA 0x03c9 /* VGA */
-#define R128_DAC_MASK 0x03c6 /* VGA */
-#define R128_DAC_R_INDEX 0x03c7 /* VGA */
-#define R128_DAC_W_INDEX 0x03c8 /* VGA */
-#define R128_DDA_CONFIG 0x02e0
-#define R128_DDA_ON_OFF 0x02e4
-#define R128_DDA2_CONFIG 0x03e0
-#define R128_DDA2_ON_OFF 0x03e4
-#define R128_DEFAULT_OFFSET 0x16e0
-#define R128_DEFAULT_PITCH 0x16e4
-#define R128_DEFAULT_SC_BOTTOM_RIGHT 0x16e8
-# define R128_DEFAULT_SC_RIGHT_MAX (0x1fff << 0)
-# define R128_DEFAULT_SC_BOTTOM_MAX (0x1fff << 16)
-#define R128_DEFAULT2_OFFSET 0x16f8
-#define R128_DEFAULT2_PITCH 0x16fc
-#define R128_DEFAULT2_SC_BOTTOM_RIGHT 0x16dc
-#define R128_DESTINATION_3D_CLR_CMP_VAL 0x1820
-#define R128_DESTINATION_3D_CLR_CMP_MSK 0x1824
-#define R128_DEVICE_ID 0x0f02 /* PCI */
-#define R128_DP_BRUSH_BKGD_CLR 0x1478
-#define R128_DP_BRUSH_FRGD_CLR 0x147c
-#define R128_DP_CNTL 0x16c0
-# define R128_DST_X_LEFT_TO_RIGHT (1 << 0)
-# define R128_DST_Y_TOP_TO_BOTTOM (1 << 1)
-#define R128_DP_CNTL_XDIR_YDIR_YMAJOR 0x16d0
-# define R128_DST_Y_MAJOR (1 << 2)
-# define R128_DST_Y_DIR_TOP_TO_BOTTOM (1 << 15)
-# define R128_DST_X_DIR_LEFT_TO_RIGHT (1 << 31)
-#define R128_DP_DATATYPE 0x16c4
-# define R128_HOST_BIG_ENDIAN_EN (1 << 29)
-#define R128_DP_GUI_MASTER_CNTL 0x146c
-# define R128_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0)
-# define R128_GMC_DST_PITCH_OFFSET_CNTL (1 << 1)
-# define R128_GMC_SRC_CLIPPING (1 << 2)
-# define R128_GMC_DST_CLIPPING (1 << 3)
-# define R128_GMC_BRUSH_DATATYPE_MASK (0x0f << 4)
-# define R128_GMC_BRUSH_8X8_MONO_FG_BG (0 << 4)
-# define R128_GMC_BRUSH_8X8_MONO_FG_LA (1 << 4)
-# define R128_GMC_BRUSH_1X8_MONO_FG_BG (4 << 4)
-# define R128_GMC_BRUSH_1X8_MONO_FG_LA (5 << 4)
-# define R128_GMC_BRUSH_32x1_MONO_FG_BG (6 << 4)
-# define R128_GMC_BRUSH_32x1_MONO_FG_LA (7 << 4)
-# define R128_GMC_BRUSH_32x32_MONO_FG_BG (8 << 4)
-# define R128_GMC_BRUSH_32x32_MONO_FG_LA (9 << 4)
-# define R128_GMC_BRUSH_8x8_COLOR (10 << 4)
-# define R128_GMC_BRUSH_1X8_COLOR (12 << 4)
-# define R128_GMC_BRUSH_SOLID_COLOR (13 << 4)
-# define R128_GMC_BRUSH_NONE (15 << 4)
-# define R128_GMC_DST_8BPP_CI (2 << 8)
-# define R128_GMC_DST_15BPP (3 << 8)
-# define R128_GMC_DST_16BPP (4 << 8)
-# define R128_GMC_DST_24BPP (5 << 8)
-# define R128_GMC_DST_32BPP (6 << 8)
-# define R128_GMC_DST_8BPP_RGB (7 << 8)
-# define R128_GMC_DST_Y8 (8 << 8)
-# define R128_GMC_DST_RGB8 (9 << 8)
-# define R128_GMC_DST_VYUY (11 << 8)
-# define R128_GMC_DST_YVYU (12 << 8)
-# define R128_GMC_DST_AYUV444 (14 << 8)
-# define R128_GMC_DST_ARGB4444 (15 << 8)
-# define R128_GMC_DST_DATATYPE_MASK (0x0f << 8)
-# define R128_GMC_DST_DATATYPE_SHIFT 8
-# define R128_GMC_SRC_DATATYPE_MASK (3 << 12)
-# define R128_GMC_SRC_DATATYPE_MONO_FG_BG (0 << 12)
-# define R128_GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12)
-# define R128_GMC_SRC_DATATYPE_COLOR (3 << 12)
-# define R128_GMC_BYTE_PIX_ORDER (1 << 14)
-# define R128_GMC_BYTE_MSB_TO_LSB (0 << 14)
-# define R128_GMC_BYTE_LSB_TO_MSB (1 << 14)
-# define R128_GMC_CONVERSION_TEMP (1 << 15)
-# define R128_GMC_CONVERSION_TEMP_6500 (0 << 15)
-# define R128_GMC_CONVERSION_TEMP_9300 (1 << 15)
-# define R128_GMC_ROP3_MASK (0xff << 16)
-# define R128_DP_SRC_SOURCE_MASK (7 << 24)
-# define R128_DP_SRC_SOURCE_MEMORY (2 << 24)
-# define R128_DP_SRC_SOURCE_HOST_DATA (3 << 24)
-# define R128_GMC_3D_FCN_EN (1 << 27)
-# define R128_GMC_CLR_CMP_CNTL_DIS (1 << 28)
-# define R128_GMC_AUX_CLIP_DIS (1 << 29)
-# define R128_GMC_WR_MSK_DIS (1 << 30)
-# define R128_GMC_LD_BRUSH_Y_X (1 << 31)
-# define R128_ROP3_ZERO 0x00000000
-# define R128_ROP3_DSa 0x00880000
-# define R128_ROP3_SDna 0x00440000
-# define R128_ROP3_S 0x00cc0000
-# define R128_ROP3_DSna 0x00220000
-# define R128_ROP3_D 0x00aa0000
-# define R128_ROP3_DSx 0x00660000
-# define R128_ROP3_DSo 0x00ee0000
-# define R128_ROP3_DSon 0x00110000
-# define R128_ROP3_DSxn 0x00990000
-# define R128_ROP3_Dn 0x00550000
-# define R128_ROP3_SDno 0x00dd0000
-# define R128_ROP3_Sn 0x00330000
-# define R128_ROP3_DSno 0x00bb0000
-# define R128_ROP3_DSan 0x00770000
-# define R128_ROP3_ONE 0x00ff0000
-# define R128_ROP3_DPa 0x00a00000
-# define R128_ROP3_PDna 0x00500000
-# define R128_ROP3_P 0x00f00000
-# define R128_ROP3_DPna 0x000a0000
-# define R128_ROP3_D 0x00aa0000
-# define R128_ROP3_DPx 0x005a0000
-# define R128_ROP3_DPo 0x00fa0000
-# define R128_ROP3_DPon 0x00050000
-# define R128_ROP3_PDxn 0x00a50000
-# define R128_ROP3_PDno 0x00f50000
-# define R128_ROP3_Pn 0x000f0000
-# define R128_ROP3_DPno 0x00af0000
-# define R128_ROP3_DPan 0x005f0000
-
-
-#define R128_DP_GUI_MASTER_CNTL_C 0x1c84
-#define R128_DP_MIX 0x16c8
-#define R128_DP_SRC_BKGD_CLR 0x15dc
-#define R128_DP_SRC_FRGD_CLR 0x15d8
-#define R128_DP_WRITE_MASK 0x16cc
-#define R128_DST_BRES_DEC 0x1630
-#define R128_DST_BRES_ERR 0x1628
-#define R128_DST_BRES_INC 0x162c
-#define R128_DST_BRES_LNTH 0x1634
-#define R128_DST_BRES_LNTH_SUB 0x1638
-#define R128_DST_HEIGHT 0x1410
-#define R128_DST_HEIGHT_WIDTH 0x143c
-#define R128_DST_HEIGHT_WIDTH_8 0x158c
-#define R128_DST_HEIGHT_WIDTH_BW 0x15b4
-#define R128_DST_HEIGHT_Y 0x15a0
-#define R128_DST_OFFSET 0x1404
-#define R128_DST_PITCH 0x1408
-#define R128_DST_PITCH_OFFSET 0x142c
-#define R128_DST_PITCH_OFFSET_C 0x1c80
-# define R128_PITCH_SHIFT 21
-# define R128_DST_TILE (1 << 31)
-#define R128_DST_WIDTH 0x140c
-#define R128_DST_WIDTH_HEIGHT 0x1598
-#define R128_DST_WIDTH_X 0x1588
-#define R128_DST_WIDTH_X_INCY 0x159c
-#define R128_DST_X 0x141c
-#define R128_DST_X_SUB 0x15a4
-#define R128_DST_X_Y 0x1594
-#define R128_DST_Y 0x1420
-#define R128_DST_Y_SUB 0x15a8
-#define R128_DST_Y_X 0x1438
-
-#define R128_EXT_MEM_CNTL 0x0144
-
-#define R128_FCP_CNTL 0x0012 /* PLL */
-#define R128_FLUSH_1 0x1704
-#define R128_FLUSH_2 0x1708
-#define R128_FLUSH_3 0x170c
-#define R128_FLUSH_4 0x1710
-#define R128_FLUSH_5 0x1714
-#define R128_FLUSH_6 0x1718
-#define R128_FLUSH_7 0x171c
-#define R128_FOG_3D_TABLE_START 0x1810
-#define R128_FOG_3D_TABLE_END 0x1814
-#define R128_FOG_3D_TABLE_DENSITY 0x181c
-#define R128_FOG_TABLE_INDEX 0x1a14
-#define R128_FOG_TABLE_DATA 0x1a18
-#define R128_FP_CRTC_H_TOTAL_DISP 0x0250
-#define R128_FP_CRTC_V_TOTAL_DISP 0x0254
-#define R128_FP_GEN_CNTL 0x0284
-# define R128_FP_FPON (1 << 0)
-# define R128_FP_BLANK_DIS (1 << 1)
-# define R128_FP_TDMS_EN (1 << 2)
-# define R128_FP_DETECT_SENSE (1 << 8)
-# define R128_FP_SEL_CRTC2 (1 << 13)
-# define R128_FP_CRTC_DONT_SHADOW_VPAR (1 << 16)
-# define R128_FP_CRTC_DONT_SHADOW_HEND (1 << 17)
-# define R128_FP_CRTC_USE_SHADOW_VEND (1 << 18)
-# define R128_FP_CRTC_USE_SHADOW_ROWCUR (1 << 19)
-# define R128_FP_CRTC_HORZ_DIV2_EN (1 << 20)
-# define R128_FP_CRTC_HOR_CRT_DIV2_DIS (1 << 21)
-# define R128_FP_CRT_SYNC_SEL (1 << 23)
-# define R128_FP_USE_SHADOW_EN (1 << 24)
-#define R128_FP_H_SYNC_STRT_WID 0x02c4
-#define R128_FP_HORZ_STRETCH 0x028c
-# define R128_HORZ_STRETCH_RATIO_MASK 0xffff
-# define R128_HORZ_STRETCH_RATIO_SHIFT 0
-# define R128_HORZ_STRETCH_RATIO_MAX 4096
-# define R128_HORZ_PANEL_SIZE (0xff << 16)
-# define R128_HORZ_PANEL_SHIFT 16
-# define R128_AUTO_HORZ_RATIO (0 << 24)
-# define R128_HORZ_STRETCH_PIXREP (0 << 25)
-# define R128_HORZ_STRETCH_BLEND (1 << 25)
-# define R128_HORZ_STRETCH_ENABLE (1 << 26)
-# define R128_HORZ_FP_LOOP_STRETCH (0x7 << 27)
-# define R128_HORZ_STRETCH_RESERVED (1 << 30)
-# define R128_HORZ_AUTO_RATIO_FIX_EN (1 << 31)
-
-#define R128_FP_PANEL_CNTL 0x0288
-# define R128_FP_DIGON (1 << 0)
-# define R128_FP_BLON (1 << 1)
-#define R128_FP_V_SYNC_STRT_WID 0x02c8
-#define R128_FP_VERT_STRETCH 0x0290
-# define R128_VERT_PANEL_SIZE (0x7ff << 0)
-# define R128_VERT_PANEL_SHIFT 0
-# define R128_VERT_STRETCH_RATIO_MASK 0x3ff
-# define R128_VERT_STRETCH_RATIO_SHIFT 11
-# define R128_VERT_STRETCH_RATIO_MAX 1024
-# define R128_VERT_STRETCH_ENABLE (1 << 24)
-# define R128_VERT_STRETCH_LINEREP (0 << 25)
-# define R128_VERT_STRETCH_BLEND (1 << 25)
-# define R128_VERT_AUTO_RATIO_EN (1 << 26)
-# define R128_VERT_STRETCH_RESERVED 0xf8e00000
-
-#define R128_GEN_INT_CNTL 0x0040
-#define R128_GEN_INT_STATUS 0x0044
-# define R128_VSYNC_INT_AK (1 << 2)
-# define R128_VSYNC_INT (1 << 2)
-#define R128_GEN_RESET_CNTL 0x00f0
-# define R128_SOFT_RESET_GUI (1 << 0)
-# define R128_SOFT_RESET_VCLK (1 << 8)
-# define R128_SOFT_RESET_PCLK (1 << 9)
-# define R128_SOFT_RESET_DISPENG_XCLK (1 << 11)
-# define R128_SOFT_RESET_MEMCTLR_XCLK (1 << 12)
-#define R128_GENENB 0x03c3 /* VGA */
-#define R128_GENFC_RD 0x03ca /* VGA */
-#define R128_GENFC_WT 0x03da /* VGA, 0x03ba */
-#define R128_GENMO_RD 0x03cc /* VGA */
-#define R128_GENMO_WT 0x03c2 /* VGA */
-#define R128_GENS0 0x03c2 /* VGA */
-#define R128_GENS1 0x03da /* VGA, 0x03ba */
-#define R128_GPIO_MONID 0x0068
-# define R128_GPIO_MONID_A_0 (1 << 0)
-# define R128_GPIO_MONID_A_1 (1 << 1)
-# define R128_GPIO_MONID_A_2 (1 << 2)
-# define R128_GPIO_MONID_A_3 (1 << 3)
-# define R128_GPIO_MONID_Y_0 (1 << 8)
-# define R128_GPIO_MONID_Y_1 (1 << 9)
-# define R128_GPIO_MONID_Y_2 (1 << 10)
-# define R128_GPIO_MONID_Y_3 (1 << 11)
-# define R128_GPIO_MONID_EN_0 (1 << 16)
-# define R128_GPIO_MONID_EN_1 (1 << 17)
-# define R128_GPIO_MONID_EN_2 (1 << 18)
-# define R128_GPIO_MONID_EN_3 (1 << 19)
-# define R128_GPIO_MONID_MASK_0 (1 << 24)
-# define R128_GPIO_MONID_MASK_1 (1 << 25)
-# define R128_GPIO_MONID_MASK_2 (1 << 26)
-# define R128_GPIO_MONID_MASK_3 (1 << 27)
-#define R128_GPIO_MONIDB 0x006c
-#define R128_GRPH8_DATA 0x03cf /* VGA */
-#define R128_GRPH8_IDX 0x03ce /* VGA */
-#define R128_GUI_DEBUG0 0x16a0
-#define R128_GUI_DEBUG1 0x16a4
-#define R128_GUI_DEBUG2 0x16a8
-#define R128_GUI_DEBUG3 0x16ac
-#define R128_GUI_DEBUG4 0x16b0
-#define R128_GUI_DEBUG5 0x16b4
-#define R128_GUI_DEBUG6 0x16b8
-#define R128_GUI_PROBE 0x16bc
-#define R128_GUI_SCRATCH_REG0 0x15e0
-#define R128_GUI_SCRATCH_REG1 0x15e4
-#define R128_GUI_SCRATCH_REG2 0x15e8
-#define R128_GUI_SCRATCH_REG3 0x15ec
-#define R128_GUI_SCRATCH_REG4 0x15f0
-#define R128_GUI_SCRATCH_REG5 0x15f4
-#define R128_GUI_STAT 0x1740
-# define R128_GUI_FIFOCNT_MASK 0x0fff
-# define R128_GUI_ACTIVE (1 << 31)
-
-#define R128_HEADER 0x0f0e /* PCI */
-#define R128_HOST_DATA0 0x17c0
-#define R128_HOST_DATA1 0x17c4
-#define R128_HOST_DATA2 0x17c8
-#define R128_HOST_DATA3 0x17cc
-#define R128_HOST_DATA4 0x17d0
-#define R128_HOST_DATA5 0x17d4
-#define R128_HOST_DATA6 0x17d8
-#define R128_HOST_DATA7 0x17dc
-#define R128_HOST_DATA_LAST 0x17e0
-#define R128_HOST_PATH_CNTL 0x0130
-#define R128_HTOTAL_CNTL 0x0009 /* PLL */
-#define R128_HTOTAL2_CNTL 0x002e /* PLL */
-#define R128_HW_DEBUG 0x0128
-#define R128_HW_DEBUG2 0x011c
-
-#define R128_I2C_CNTL_1 0x0094 /* ? */
-#define R128_INTERRUPT_LINE 0x0f3c /* PCI */
-#define R128_INTERRUPT_PIN 0x0f3d /* PCI */
-#define R128_IO_BASE 0x0f14 /* PCI */
-
-#define R128_LATENCY 0x0f0d /* PCI */
-#define R128_LEAD_BRES_DEC 0x1608
-#define R128_LEAD_BRES_ERR 0x1600
-#define R128_LEAD_BRES_INC 0x1604
-#define R128_LEAD_BRES_LNTH 0x161c
-#define R128_LEAD_BRES_LNTH_SUB 0x1624
-#define R128_LVDS_GEN_CNTL 0x02d0
-# define R128_LVDS_ON (1 << 0)
-# define R128_LVDS_DISPLAY_DIS (1 << 1)
-# define R128_LVDS_EN (1 << 7)
-# define R128_LVDS_DIGON (1 << 18)
-# define R128_LVDS_BLON (1 << 19)
-# define R128_LVDS_SEL_CRTC2 (1 << 23)
-# define R128_HSYNC_DELAY_SHIFT 28
-# define R128_HSYNC_DELAY_MASK (0xf << 28)
-
-#define R128_MAX_LATENCY 0x0f3f /* PCI */
-#define R128_MCLK_CNTL 0x000f /* PLL */
-# define R128_FORCE_GCP (1 << 16)
-# define R128_FORCE_PIPE3D_CP (1 << 17)
-# define R128_FORCE_RCP (1 << 18)
-#define R128_MDGPIO_A_REG 0x01ac
-#define R128_MDGPIO_EN_REG 0x01b0
-#define R128_MDGPIO_MASK 0x0198
-#define R128_MDGPIO_Y_REG 0x01b4
-#define R128_MEM_ADDR_CONFIG 0x0148
-#define R128_MEM_BASE 0x0f10 /* PCI */
-#define R128_MEM_CNTL 0x0140
-#define R128_MEM_INIT_LAT_TIMER 0x0154
-#define R128_MEM_INTF_CNTL 0x014c
-#define R128_MEM_SDRAM_MODE_REG 0x0158
-#define R128_MEM_STR_CNTL 0x0150
-#define R128_MEM_VGA_RP_SEL 0x003c
-#define R128_MEM_VGA_WP_SEL 0x0038
-#define R128_MIN_GRANT 0x0f3e /* PCI */
-#define R128_MM_DATA 0x0004
-#define R128_MM_INDEX 0x0000
-#define R128_MPLL_CNTL 0x000e /* PLL */
-#define R128_MPP_TB_CONFIG 0x01c0 /* ? */
-#define R128_MPP_GP_CONFIG 0x01c8 /* ? */
-
-#define R128_N_VIF_COUNT 0x0248
-
-#define R128_OVR_CLR 0x0230
-#define R128_OVR_WID_LEFT_RIGHT 0x0234
-#define R128_OVR_WID_TOP_BOTTOM 0x0238
-
-/* first overlay unit (there is only one) */
-
-#define R128_OV0_Y_X_START 0x0400
-#define R128_OV0_Y_X_END 0x0404
-#define R128_OV0_EXCLUSIVE_HORZ 0x0408
-# define R128_EXCL_HORZ_START_MASK 0x000000ff
-# define R128_EXCL_HORZ_END_MASK 0x0000ff00
-# define R128_EXCL_HORZ_BACK_PORCH_MASK 0x00ff0000
-# define R128_EXCL_HORZ_EXCLUSIVE_EN 0x80000000
-#define R128_OV0_EXCLUSIVE_VERT 0x040C
-# define R128_EXCL_VERT_START_MASK 0x000003ff
-# define R128_EXCL_VERT_END_MASK 0x03ff0000
-#define R128_OV0_REG_LOAD_CNTL 0x0410
-# define R128_REG_LD_CTL_LOCK 0x00000001L
-# define R128_REG_LD_CTL_VBLANK_DURING_LOCK 0x00000002L
-# define R128_REG_LD_CTL_STALL_GUI_UNTIL_FLIP 0x00000004L
-# define R128_REG_LD_CTL_LOCK_READBACK 0x00000008L
-#define R128_OV0_SCALE_CNTL 0x0420
-# define R128_SCALER_PIX_EXPAND 0x00000001L
-# define R128_SCALER_Y2R_TEMP 0x00000002L
-# define R128_SCALER_HORZ_PICK_NEAREST 0x00000003L
-# define R128_SCALER_VERT_PICK_NEAREST 0x00000004L
-# define R128_SCALER_SIGNED_UV 0x00000010L
-# define R128_SCALER_GAMMA_SEL_MASK 0x00000060L
-# define R128_SCALER_GAMMA_SEL_BRIGHT 0x00000000L
-# define R128_SCALER_GAMMA_SEL_G22 0x00000020L
-# define R128_SCALER_GAMMA_SEL_G18 0x00000040L
-# define R128_SCALER_GAMMA_SEL_G14 0x00000060L
-# define R128_SCALER_COMCORE_SHIFT_UP_ONE 0x00000080L
-# define R128_SCALER_SURFAC_FORMAT 0x00000f00L
-# define R128_SCALER_SOURCE_15BPP 0x00000300L
-# define R128_SCALER_SOURCE_16BPP 0x00000400L
-# define R128_SCALER_SOURCE_32BPP 0x00000600L
-# define R128_SCALER_SOURCE_YUV9 0x00000900L
-# define R128_SCALER_SOURCE_YUV12 0x00000A00L
-# define R128_SCALER_SOURCE_VYUY422 0x00000B00L
-# define R128_SCALER_SOURCE_YVYU422 0x00000C00L
-# define R128_SCALER_SMART_SWITCH 0x00008000L
-# define R128_SCALER_BURST_PER_PLANE 0x00ff0000L
-# define R128_SCALER_DOUBLE_BUFFER 0x01000000L
-# define R128_SCALER_DIS_LIMIT 0x08000000L
-# define R128_SCALER_PRG_LOAD_START 0x10000000L
-# define R128_SCALER_INT_EMU 0x20000000L
-# define R128_SCALER_ENABLE 0x40000000L
-# define R128_SCALER_SOFT_RESET 0x80000000L
-#define R128_OV0_V_INC 0x0424
-#define R128_OV0_P1_V_ACCUM_INIT 0x0428
-# define R128_OV0_P1_MAX_LN_IN_PER_LN_OUT 0x00000003L
-# define R128_OV0_P1_V_ACCUM_INIT_MASK 0x01ff8000L
-#define R128_OV0_P23_V_ACCUM_INIT 0x042C
-#define R128_OV0_P1_BLANK_LINES_AT_TOP 0x0430
-# define R128_P1_BLNK_LN_AT_TOP_M1_MASK 0x00000fffL
-# define R128_P1_ACTIVE_LINES_M1 0x0fff0000L
-#define R128_OV0_P23_BLANK_LINES_AT_TOP 0x0434
-# define R128_P23_BLNK_LN_AT_TOP_M1_MASK 0x000007ffL
-# define R128_P23_ACTIVE_LINES_M1 0x07ff0000L
-#define R128_OV0_VID_BUF0_BASE_ADRS 0x0440
-# define R128_VIF_BUF0_PITCH_SEL 0x00000001L
-# define R128_VIF_BUF0_TILE_ADRS 0x00000002L
-# define R128_VIF_BUF0_BASE_ADRS_MASK 0x03fffff0L
-# define R128_VIF_BUF0_1ST_LINE_LSBS_MASK 0x48000000L
-#define R128_OV0_VID_BUF1_BASE_ADRS 0x0444
-# define R128_VIF_BUF1_PITCH_SEL 0x00000001L
-# define R128_VIF_BUF1_TILE_ADRS 0x00000002L
-# define R128_VIF_BUF1_BASE_ADRS_MASK 0x03fffff0L
-# define R128_VIF_BUF1_1ST_LINE_LSBS_MASK 0x48000000L
-#define R128_OV0_VID_BUF2_BASE_ADRS 0x0448
-# define R128_VIF_BUF2_PITCH_SEL 0x00000001L
-# define R128_VIF_BUF2_TILE_ADRS 0x00000002L
-# define R128_VIF_BUF2_BASE_ADRS_MASK 0x03fffff0L
-# define R128_VIF_BUF2_1ST_LINE_LSBS_MASK 0x48000000L
-#define R128_OV0_VID_BUF3_BASE_ADRS 0x044C
-#define R128_OV0_VID_BUF4_BASE_ADRS 0x0450
-#define R128_OV0_VID_BUF5_BASE_ADRS 0x0454
-#define R128_OV0_VID_BUF_PITCH0_VALUE 0x0460
-#define R128_OV0_VID_BUF_PITCH1_VALUE 0x0464
-#define R128_OV0_AUTO_FLIP_CNTL 0x0470
-#define R128_OV0_DEINTERLACE_PATTERN 0x0474
-#define R128_OV0_H_INC 0x0480
-#define R128_OV0_STEP_BY 0x0484
-#define R128_OV0_P1_H_ACCUM_INIT 0x0488
-#define R128_OV0_P23_H_ACCUM_INIT 0x048C
-#define R128_OV0_P1_X_START_END 0x0494
-#define R128_OV0_P2_X_START_END 0x0498
-#define R128_OV0_P3_X_START_END 0x049C
-#define R128_OV0_FILTER_CNTL 0x04A0
-#define R128_OV0_FOUR_TAP_COEF_0 0x04B0
-#define R128_OV0_FOUR_TAP_COEF_1 0x04B4
-#define R128_OV0_FOUR_TAP_COEF_2 0x04B8
-#define R128_OV0_FOUR_TAP_COEF_3 0x04BC
-#define R128_OV0_FOUR_TAP_COEF_4 0x04C0
-#define R128_OV0_COLOUR_CNTL 0x04E0
-#define R128_OV0_VIDEO_KEY_CLR 0x04E4
-#define R128_OV0_VIDEO_KEY_MSK 0x04E8
-#define R128_OV0_GRAPHICS_KEY_CLR 0x04EC
-#define R128_OV0_GRAPHICS_KEY_MSK 0x04F0
-#define R128_OV0_KEY_CNTL 0x04F4
-# define R128_VIDEO_KEY_FN_MASK 0x00000007L
-# define R128_VIDEO_KEY_FN_FALSE 0x00000000L
-# define R128_VIDEO_KEY_FN_TRUE 0x00000001L
-# define R128_VIDEO_KEY_FN_EQ 0x00000004L
-# define R128_VIDEO_KEY_FN_NE 0x00000005L
-# define R128_GRAPHIC_KEY_FN_MASK 0x00000070L
-# define R128_GRAPHIC_KEY_FN_FALSE 0x00000000L
-# define R128_GRAPHIC_KEY_FN_TRUE 0x00000010L
-# define R128_GRAPHIC_KEY_FN_EQ 0x00000040L
-# define R128_GRAPHIC_KEY_FN_NE 0x00000050L
-# define R128_CMP_MIX_MASK 0x00000100L
-# define R128_CMP_MIX_OR 0x00000000L
-# define R128_CMP_MIX_AND 0x00000100L
-#define R128_OV0_TEST 0x04F8
-
-
-#define R128_PALETTE_DATA 0x00b4
-#define R128_PALETTE_INDEX 0x00b0
-#define R128_PC_DEBUG_MODE 0x1760
-#define R128_PC_GUI_CTLSTAT 0x1748
-#define R128_PC_GUI_MODE 0x1744
-# define R128_PC_IGNORE_UNIFY (1 << 5)
-#define R128_PC_MISC_CNTL 0x0188
-#define R128_PC_NGUI_CTLSTAT 0x0184
-# define R128_PC_FLUSH_GUI (3 << 0)
-# define R128_PC_RI_GUI (1 << 2)
-# define R128_PC_FLUSH_ALL 0x00ff
-# define R128_PC_BUSY (1 << 31)
-#define R128_PC_NGUI_MODE 0x0180
-#define R128_PCI_GART_PAGE 0x017c
-#define R128_PLANE_3D_MASK_C 0x1d44
-#define R128_PLL_TEST_CNTL 0x0013 /* PLL */
-#define R128_PMI_CAP_ID 0x0f5c /* PCI */
-#define R128_PMI_DATA 0x0f63 /* PCI */
-#define R128_PMI_NXT_CAP_PTR 0x0f5d /* PCI */
-#define R128_PMI_PMC_REG 0x0f5e /* PCI */
-#define R128_PMI_PMCSR_REG 0x0f60 /* PCI */
-#define R128_PMI_REGISTER 0x0f5c /* PCI */
-#define R128_PPLL_CNTL 0x0002 /* PLL */
-# define R128_PPLL_RESET (1 << 0)
-# define R128_PPLL_SLEEP (1 << 1)
-# define R128_PPLL_ATOMIC_UPDATE_EN (1 << 16)
-# define R128_PPLL_VGA_ATOMIC_UPDATE_EN (1 << 17)
-#define R128_PPLL_DIV_0 0x0004 /* PLL */
-#define R128_PPLL_DIV_1 0x0005 /* PLL */
-#define R128_PPLL_DIV_2 0x0006 /* PLL */
-#define R128_PPLL_DIV_3 0x0007 /* PLL */
-# define R128_PPLL_FB3_DIV_MASK 0x07ff
-# define R128_PPLL_POST3_DIV_MASK 0x00070000
-#define R128_PPLL_REF_DIV 0x0003 /* PLL */
-# define R128_PPLL_REF_DIV_MASK 0x03ff
-# define R128_PPLL_ATOMIC_UPDATE_R (1 << 15) /* same as _W */
-# define R128_PPLL_ATOMIC_UPDATE_W (1 << 15) /* same as _R */
-#define R128_P2PLL_CNTL 0x002a /* P2PLL */
-# define R128_P2PLL_RESET (1 << 0)
-# define R128_P2PLL_SLEEP (1 << 1)
-# define R128_P2PLL_ATOMIC_UPDATE_EN (1 << 16)
-# define R128_P2PLL_VGA_ATOMIC_UPDATE_EN (1 << 17)
-# define R128_P2PLL_ATOMIC_UPDATE_VSYNC (1 << 18)
-#define R128_P2PLL_DIV_0 0x002c
-# define R128_P2PLL_FB0_DIV_MASK 0x07ff
-# define R128_P2PLL_POST0_DIV_MASK 0x00070000
-#define R128_P2PLL_REF_DIV 0x002B /* PLL */
-# define R128_P2PLL_REF_DIV_MASK 0x03ff
-# define R128_P2PLL_ATOMIC_UPDATE_R (1 << 15) /* same as _W */
-# define R128_P2PLL_ATOMIC_UPDATE_W (1 << 15) /* same as _R */
-#define R128_PWR_MNGMT_CNTL_STATUS 0x0f60 /* PCI */
-#define R128_REG_BASE 0x0f18 /* PCI */
-#define R128_REGPROG_INF 0x0f09 /* PCI */
-#define R128_REVISION_ID 0x0f08 /* PCI */
-
-#define R128_SC_BOTTOM 0x164c
-#define R128_SC_BOTTOM_RIGHT 0x16f0
-#define R128_SC_BOTTOM_RIGHT_C 0x1c8c
-#define R128_SC_LEFT 0x1640
-#define R128_SC_RIGHT 0x1644
-#define R128_SC_TOP 0x1648
-#define R128_SC_TOP_LEFT 0x16ec
-#define R128_SC_TOP_LEFT_C 0x1c88
-#define R128_SEQ8_DATA 0x03c5 /* VGA */
-#define R128_SEQ8_IDX 0x03c4 /* VGA */
-#define R128_SNAPSHOT_F_COUNT 0x0244
-#define R128_SNAPSHOT_VH_COUNTS 0x0240
-#define R128_SNAPSHOT_VIF_COUNT 0x024c
-#define R128_SRC_OFFSET 0x15ac
-#define R128_SRC_PITCH 0x15b0
-#define R128_SRC_PITCH_OFFSET 0x1428
-#define R128_SRC_SC_BOTTOM 0x165c
-#define R128_SRC_SC_BOTTOM_RIGHT 0x16f4
-#define R128_SRC_SC_RIGHT 0x1654
-#define R128_SRC_X 0x1414
-#define R128_SRC_X_Y 0x1590
-#define R128_SRC_Y 0x1418
-#define R128_SRC_Y_X 0x1434
-#define R128_STATUS 0x0f06 /* PCI */
-#define R128_SUBPIC_CNTL 0x0540 /* ? */
-#define R128_SUB_CLASS 0x0f0a /* PCI */
-#define R128_SURFACE_DELAY 0x0b00
-#define R128_SURFACE0_INFO 0x0b0c
-#define R128_SURFACE0_LOWER_BOUND 0x0b04
-#define R128_SURFACE0_UPPER_BOUND 0x0b08
-#define R128_SURFACE1_INFO 0x0b1c
-#define R128_SURFACE1_LOWER_BOUND 0x0b14
-#define R128_SURFACE1_UPPER_BOUND 0x0b18
-#define R128_SURFACE2_INFO 0x0b2c
-#define R128_SURFACE2_LOWER_BOUND 0x0b24
-#define R128_SURFACE2_UPPER_BOUND 0x0b28
-#define R128_SURFACE3_INFO 0x0b3c
-#define R128_SURFACE3_LOWER_BOUND 0x0b34
-#define R128_SURFACE3_UPPER_BOUND 0x0b38
-#define R128_SW_SEMAPHORE 0x013c
-
-#define R128_TEST_DEBUG_CNTL 0x0120
-#define R128_TEST_DEBUG_MUX 0x0124
-#define R128_TEST_DEBUG_OUT 0x012c
-#define R128_TMDS_CRC 0x02a0
-#define R128_TMDS_TRANSMITTER_CNTL 0x02a4
-# define R128_TMDS_PLLEN (1 << 0)
-# define R128_TMDS_PLLRST (1 << 1)
-#define R128_TRAIL_BRES_DEC 0x1614
-#define R128_TRAIL_BRES_ERR 0x160c
-#define R128_TRAIL_BRES_INC 0x1610
-#define R128_TRAIL_X 0x1618
-#define R128_TRAIL_X_SUB 0x1620
-
-#define R128_VCLK_ECP_CNTL 0x0008 /* PLL */
-# define R128_VCLK_SRC_SEL_MASK 0x03
-# define R128_VCLK_SRC_SEL_CPUCLK 0x00
-# define R128_VCLK_SRC_SEL_PPLLCLK 0x03
-# define R128_ECP_DIV_MASK (3 << 8)
-#define R128_V2CLK_VCLKTV_CNTL 0x002d /* PLL */
-# define R128_V2CLK_SRC_SEL_MASK 0x03
-# define R128_V2CLK_SRC_SEL_CPUCLK 0x00
-# define R128_V2CLK_SRC_SEL_P2PLLCLK 0x03
-#define R128_VENDOR_ID 0x0f00 /* PCI */
-#define R128_VGA_DDA_CONFIG 0x02e8
-#define R128_VGA_DDA_ON_OFF 0x02ec
-#define R128_VID_BUFFER_CONTROL 0x0900
-#define R128_VIDEOMUX_CNTL 0x0190
-#define R128_VIPH_CONTROL 0x01D0 /* ? */
-
-#define R128_WAIT_UNTIL 0x1720
-
-#define R128_X_MPLL_REF_FB_DIV 0x000a /* PLL */
-#define R128_XCLK_CNTL 0x000d /* PLL */
-#define R128_XDLL_CNTL 0x000c /* PLL */
-#define R128_XPLL_CNTL 0x000b /* PLL */
-
- /* Registers for CCE and Microcode Engine */
-#define R128_PM4_MICROCODE_ADDR 0x07d4
-#define R128_PM4_MICROCODE_RADDR 0x07d8
-#define R128_PM4_MICROCODE_DATAH 0x07dc
-#define R128_PM4_MICROCODE_DATAL 0x07e0
-
-#define R128_PM4_BUFFER_OFFSET 0x0700
-#define R128_PM4_BUFFER_CNTL 0x0704
-# define R128_PM4_NONPM4 (0 << 28)
-# define R128_PM4_192PIO (1 << 28)
-# define R128_PM4_192BM (2 << 28)
-# define R128_PM4_128PIO_64INDBM (3 << 28)
-# define R128_PM4_128BM_64INDBM (4 << 28)
-# define R128_PM4_64PIO_128INDBM (5 << 28)
-# define R128_PM4_64BM_128INDBM (6 << 28)
-# define R128_PM4_64PIO_64VCBM_64INDBM (7 << 28)
-# define R128_PM4_64BM_64VCBM_64INDBM (8 << 28)
-# define R128_PM4_64PIO_64VCPIO_64INDPIO (15 << 28)
-#define R128_PM4_BUFFER_WM_CNTL 0x0708
-# define R128_WMA_SHIFT 0
-# define R128_WMB_SHIFT 8
-# define R128_WMC_SHIFT 16
-# define R128_WB_WM_SHIFT 24
-#define R128_PM4_BUFFER_DL_RPTR_ADDR 0x070c
-#define R128_PM4_BUFFER_DL_RPTR 0x0710
-#define R128_PM4_BUFFER_DL_WPTR 0x0714
-# define R128_PM4_BUFFER_DL_DONE (1 << 31)
-#define R128_PM4_BUFFER_DL_WPTR_DELAY 0x0718
-# define R128_PRE_WRITE_TIMER_SHIFT 0
-# define R128_PRE_WRITE_LIMIT_SHIFT 23
-#define R128_PM4_VC_FPU_SETUP 0x071c
-# define R128_FRONT_DIR_CW (0 << 0)
-# define R128_FRONT_DIR_CCW (1 << 0)
-# define R128_FRONT_DIR_MASK (1 << 0)
-# define R128_BACKFACE_CULL (0 << 1)
-# define R128_BACKFACE_POINTS (1 << 1)
-# define R128_BACKFACE_LINES (2 << 1)
-# define R128_BACKFACE_SOLID (3 << 1)
-# define R128_BACKFACE_MASK (3 << 1)
-# define R128_FRONTFACE_CULL (0 << 3)
-# define R128_FRONTFACE_POINTS (1 << 3)
-# define R128_FRONTFACE_LINES (2 << 3)
-# define R128_FRONTFACE_SOLID (3 << 3)
-# define R128_FRONTFACE_MASK (3 << 3)
-# define R128_FPU_COLOR_SOLID (0 << 5)
-# define R128_FPU_COLOR_FLAT (1 << 5)
-# define R128_FPU_COLOR_GOURAUD (2 << 5)
-# define R128_FPU_COLOR_GOURAUD2 (3 << 5)
-# define R128_FPU_COLOR_MASK (3 << 5)
-# define R128_FPU_SUB_PIX_2BITS (0 << 7)
-# define R128_FPU_SUB_PIX_4BITS (1 << 7)
-# define R128_FPU_MODE_2D (0 << 8)
-# define R128_FPU_MODE_3D (1 << 8)
-# define R128_TRAP_BITS_DISABLE (1 << 9)
-# define R128_EDGE_ANTIALIAS (1 << 10)
-# define R128_SUPERSAMPLE (1 << 11)
-# define R128_XFACTOR_2 (0 << 12)
-# define R128_XFACTOR_4 (1 << 12)
-# define R128_YFACTOR_2 (0 << 13)
-# define R128_YFACTOR_4 (1 << 13)
-# define R128_FLAT_SHADE_VERTEX_D3D (0 << 14)
-# define R128_FLAT_SHADE_VERTEX_OGL (1 << 14)
-# define R128_FPU_ROUND_TRUNCATE (0 << 15)
-# define R128_FPU_ROUND_NEAREST (1 << 15)
-# define R128_WM_SEL_8DW (0 << 16)
-# define R128_WM_SEL_16DW (1 << 16)
-# define R128_WM_SEL_32DW (2 << 16)
-#define R128_PM4_VC_DEBUG_CONFIG 0x07a4
-#define R128_PM4_VC_STAT 0x07a8
-#define R128_PM4_VC_TIMESTAMP0 0x07b0
-#define R128_PM4_VC_TIMESTAMP1 0x07b4
-#define R128_PM4_STAT 0x07b8
-# define R128_PM4_FIFOCNT_MASK 0x0fff
-# define R128_PM4_BUSY (1 << 16)
-# define R128_PM4_GUI_ACTIVE (1 << 31)
-#define R128_PM4_BUFFER_ADDR 0x07f0
-#define R128_PM4_MICRO_CNTL 0x07fc
-# define R128_PM4_MICRO_FREERUN (1 << 30)
-#define R128_PM4_FIFO_DATA_EVEN 0x1000
-#define R128_PM4_FIFO_DATA_ODD 0x1004
-
-#define R128_SCALE_3D_CNTL 0x1a00
-# define R128_SCALE_DITHER_ERR_DIFF (0 << 1)
-# define R128_SCALE_DITHER_TABLE (1 << 1)
-# define R128_TEX_CACHE_SIZE_FULL (0 << 2)
-# define R128_TEX_CACHE_SIZE_HALF (1 << 2)
-# define R128_DITHER_INIT_CURR (0 << 3)
-# define R128_DITHER_INIT_RESET (1 << 3)
-# define R128_ROUND_24BIT (1 << 4)
-# define R128_TEX_CACHE_DISABLE (1 << 5)
-# define R128_SCALE_3D_NOOP (0 << 6)
-# define R128_SCALE_3D_SCALE (1 << 6)
-# define R128_SCALE_3D_TEXMAP_SHADE (2 << 6)
-# define R128_SCALE_PIX_BLEND (0 << 8)
-# define R128_SCALE_PIX_REPLICATE (1 << 8)
-# define R128_TEX_CACHE_SPLIT (1 << 9)
-# define R128_APPLE_YUV_MODE (1 << 10)
-# define R128_TEX_CACHE_PALLETE_MODE (1 << 11)
-# define R128_ALPHA_COMB_ADD_CLAMP (0 << 12)
-# define R128_ALPHA_COMB_ADD_NCLAMP (1 << 12)
-# define R128_ALPHA_COMB_SUB_SRC_DST_CLAMP (2 << 12)
-# define R128_ALPHA_COMB_SUB_SRC_DST_NCLAMP (3 << 12)
-# define R128_ALPHA_COMB_FCN_MASK (3 << 12)
-# define R128_FOG_VERTEX (0 << 14)
-# define R128_FOG_TABLE (1 << 14)
-# define R128_SIGNED_DST_CLAMP (1 << 15)
-
-# define R128_ALPHA_BLEND_ZERO (0 )
-# define R128_ALPHA_BLEND_ONE (1 )
-# define R128_ALPHA_BLEND_SRCCOLOR (2 )
-# define R128_ALPHA_BLEND_INVSRCCOLOR (3 )
-# define R128_ALPHA_BLEND_SRCALPHA (4 )
-# define R128_ALPHA_BLEND_INVSRCALPHA (5 )
-# define R128_ALPHA_BLEND_DSTALPHA (6 )
-# define R128_ALPHA_BLEND_INVDSTALPHA (7 )
-# define R128_ALPHA_BLEND_DSTCOLOR (8 )
-# define R128_ALPHA_BLEND_INVDSTCOLOR (9 )
-# define R128_ALPHA_BLEND_SAT (10) /* aka SRCALPHASAT */
-# define R128_ALPHA_BLEND_BLEND (11) /* aka BOTHSRCALPHA */
-# define R128_ALPHA_BLEND_INVBLEND (12) /* aka BOTHINVSRCALPHA */
-# define R128_ALPHA_BLEND_MASK (15)
-
-# define R128_ALPHA_BLEND_SRC_SHIFT (16)
-# define R128_ALPHA_BLEND_DST_SHIFT (20)
-
-# define R128_ALPHA_TEST_NEVER (0 << 24)
-# define R128_ALPHA_TEST_LESS (1 << 24)
-# define R128_ALPHA_TEST_LESSEQUAL (2 << 24)
-# define R128_ALPHA_TEST_EQUAL (3 << 24)
-# define R128_ALPHA_TEST_GREATEREQUAL (4 << 24)
-# define R128_ALPHA_TEST_GREATER (5 << 24)
-# define R128_ALPHA_TEST_NEQUAL (6 << 24)
-# define R128_ALPHA_TEST_ALWAYS (7 << 24)
-# define R128_ALPHA_TEST_MASK (7 << 24)
-# define R128_COMPOSITE_SHADOW_CMP_EQUAL (0 << 28)
-# define R128_COMPOSITE_SHADOW_CMP_NEQUAL (1 << 28)
-# define R128_COMPOSITE_SHADOW (1 << 29)
-# define R128_TEX_MAP_ALPHA_IN_TEXTURE (1 << 30)
-# define R128_TEX_CACHE_LINE_SIZE_8QW (0 << 31)
-# define R128_TEX_CACHE_LINE_SIZE_4QW (1 << 31)
-#define R128_SCALE_3D_DATATYPE 0x1a20
-
-#define R128_SETUP_CNTL 0x1bc4
-# define R128_DONT_START_TRIANGLE (1 << 0)
-# define R128_Z_BIAS (0 << 1)
-# define R128_DONT_START_ANY_ON (1 << 2)
-# define R128_COLOR_SOLID_COLOR (0 << 3)
-# define R128_COLOR_FLAT_VERT_1 (1 << 3)
-# define R128_COLOR_FLAT_VERT_2 (2 << 3)
-# define R128_COLOR_FLAT_VERT_3 (3 << 3)
-# define R128_COLOR_GOURAUD (4 << 3)
-# define R128_PRIM_TYPE_TRI (0 << 7)
-# define R128_PRIM_TYPE_LINE (1 << 7)
-# define R128_PRIM_TYPE_POINT (2 << 7)
-# define R128_PRIM_TYPE_POLY_EDGE (3 << 7)
-# define R128_TEXTURE_ST_MULT_W (0 << 9)
-# define R128_TEXTURE_ST_DIRECT (1 << 9)
-# define R128_STARTING_VERTEX_1 (1 << 14)
-# define R128_STARTING_VERTEX_2 (2 << 14)
-# define R128_STARTING_VERTEX_3 (3 << 14)
-# define R128_ENDING_VERTEX_1 (1 << 16)
-# define R128_ENDING_VERTEX_2 (2 << 16)
-# define R128_ENDING_VERTEX_3 (3 << 16)
-# define R128_SU_POLY_LINE_LAST (0 << 18)
-# define R128_SU_POLY_LINE_NOT_LAST (1 << 18)
-# define R128_SUB_PIX_2BITS (0 << 19)
-# define R128_SUB_PIX_4BITS (1 << 19)
-# define R128_SET_UP_CONTINUE (1 << 31)
-
-#define R128_WINDOW_XY_OFFSET 0x1bcc
-# define R128_WINDOW_Y_SHIFT 4
-# define R128_WINDOW_X_SHIFT 20
-
-#define R128_Z_OFFSET_C 0x1c90
-#define R128_Z_PITCH_C 0x1c94
-# define R128_Z_TILE (1 << 16)
-#define R128_Z_STEN_CNTL_C 0x1c98
-# define R128_Z_PIX_WIDTH_16 (0 << 1)
-# define R128_Z_PIX_WIDTH_24 (1 << 1)
-# define R128_Z_PIX_WIDTH_32 (2 << 1)
-# define R128_Z_PIX_WIDTH_MASK (3 << 1)
-# define R128_Z_TEST_NEVER (0 << 4)
-# define R128_Z_TEST_LESS (1 << 4)
-# define R128_Z_TEST_LESSEQUAL (2 << 4)
-# define R128_Z_TEST_EQUAL (3 << 4)
-# define R128_Z_TEST_GREATEREQUAL (4 << 4)
-# define R128_Z_TEST_GREATER (5 << 4)
-# define R128_Z_TEST_NEQUAL (6 << 4)
-# define R128_Z_TEST_ALWAYS (7 << 4)
-# define R128_Z_TEST_MASK (7 << 4)
-# define R128_STENCIL_TEST_NEVER (0 << 12)
-# define R128_STENCIL_TEST_LESS (1 << 12)
-# define R128_STENCIL_TEST_LESSEQUAL (2 << 12)
-# define R128_STENCIL_TEST_EQUAL (3 << 12)
-# define R128_STENCIL_TEST_GREATEREQUAL (4 << 12)
-# define R128_STENCIL_TEST_GREATER (5 << 12)
-# define R128_STENCIL_TEST_NEQUAL (6 << 12)
-# define R128_STENCIL_TEST_ALWAYS (7 << 12)
-# define R128_STENCIL_S_FAIL_KEEP (0 << 16)
-# define R128_STENCIL_S_FAIL_ZERO (1 << 16)
-# define R128_STENCIL_S_FAIL_REPLACE (2 << 16)
-# define R128_STENCIL_S_FAIL_INC (3 << 16)
-# define R128_STENCIL_S_FAIL_DEC (4 << 16)
-# define R128_STENCIL_S_FAIL_INV (5 << 16)
-# define R128_STENCIL_ZPASS_KEEP (0 << 20)
-# define R128_STENCIL_ZPASS_ZERO (1 << 20)
-# define R128_STENCIL_ZPASS_REPLACE (2 << 20)
-# define R128_STENCIL_ZPASS_INC (3 << 20)
-# define R128_STENCIL_ZPASS_DEC (4 << 20)
-# define R128_STENCIL_ZPASS_INV (5 << 20)
-# define R128_STENCIL_ZFAIL_KEEP (0 << 24)
-# define R128_STENCIL_ZFAIL_ZERO (1 << 24)
-# define R128_STENCIL_ZFAIL_REPLACE (2 << 24)
-# define R128_STENCIL_ZFAIL_INC (3 << 24)
-# define R128_STENCIL_ZFAIL_DEC (4 << 24)
-# define R128_STENCIL_ZFAIL_INV (5 << 24)
-#define R128_TEX_CNTL_C 0x1c9c
-# define R128_Z_ENABLE (1 << 0)
-# define R128_Z_WRITE_ENABLE (1 << 1)
-# define R128_STENCIL_ENABLE (1 << 3)
-# define R128_SHADE_ENABLE (0 << 4)
-# define R128_TEXMAP_ENABLE (1 << 4)
-# define R128_SEC_TEXMAP_ENABLE (1 << 5)
-# define R128_FOG_ENABLE (1 << 7)
-# define R128_DITHER_ENABLE (1 << 8)
-# define R128_ALPHA_ENABLE (1 << 9)
-# define R128_ALPHA_TEST_ENABLE (1 << 10)
-# define R128_SPEC_LIGHT_ENABLE (1 << 11)
-# define R128_TEX_CHROMA_KEY_ENABLE (1 << 12)
-# define R128_ALPHA_IN_TEX_COMPLETE_A (0 << 13)
-# define R128_ALPHA_IN_TEX_LSB_A (1 << 13)
-# define R128_LIGHT_DIS (0 << 14)
-# define R128_LIGHT_COPY (1 << 14)
-# define R128_LIGHT_MODULATE (2 << 14)
-# define R128_LIGHT_ADD (3 << 14)
-# define R128_LIGHT_BLEND_CONSTANT (4 << 14)
-# define R128_LIGHT_BLEND_TEXTURE (5 << 14)
-# define R128_LIGHT_BLEND_VERTEX (6 << 14)
-# define R128_LIGHT_BLEND_CONST_COLOR (7 << 14)
-# define R128_ALPHA_LIGHT_DIS (0 << 18)
-# define R128_ALPHA_LIGHT_COPY (1 << 18)
-# define R128_ALPHA_LIGHT_MODULATE (2 << 18)
-# define R128_ALPHA_LIGHT_ADD (3 << 18)
-# define R128_ANTI_ALIAS (1 << 21)
-# define R128_TEX_CACHE_FLUSH (1 << 23)
-# define R128_LOD_BIAS_SHIFT 24
-# define R128_LOD_BIAS_MASK (0xff << 24)
-#define R128_MISC_3D_STATE_CNTL_REG 0x1ca0
-# define R128_REF_ALPHA_MASK 0xff
-# define R128_MISC_SCALE_3D_NOOP (0 << 8)
-# define R128_MISC_SCALE_3D_SCALE (1 << 8)
-# define R128_MISC_SCALE_3D_TEXMAP_SHADE (2 << 8)
-# define R128_MISC_SCALE_PIX_BLEND (0 << 10)
-# define R128_MISC_SCALE_PIX_REPLICATE (1 << 10)
-/* Bits [14:12] are the same as R128_SCALE_3D_CNTL */
-/* Bit [15] is unknown */
-/* Bits [26:16] are the same as R128_SCALE_3D_CNTL */
-/* Bits [31:27] are unknown */
-
-#define R128_TEXTURE_CLR_CMP_CLR_C 0x1ca4
-#define R128_TEXTURE_CLR_CMP_MSK_C 0x1ca8
-#define R128_FOG_COLOR_C 0x1cac
-# define R128_FOG_BLUE_SHIFT 0
-# define R128_FOG_GREEN_SHIFT 8
-# define R128_FOG_RED_SHIFT 16
-#define R128_PRIM_TEX_CNTL_C 0x1cb0
-# define R128_MIN_BLEND_NEAREST (0 << 1)
-# define R128_MIN_BLEND_LINEAR (1 << 1)
-# define R128_MIN_BLEND_MIPNEAREST (2 << 1)
-# define R128_MIN_BLEND_MIPLINEAR (3 << 1)
-# define R128_MIN_BLEND_LINEARMIPNEAREST (4 << 1)
-# define R128_MIN_BLEND_LINEARMIPLINEAR (5 << 1)
-# define R128_MIN_BLEND_MASK (7 << 1)
-# define R128_MAG_BLEND_NEAREST (0 << 4)
-# define R128_MAG_BLEND_LINEAR (1 << 4)
-# define R128_MAG_BLEND_MASK (7 << 4)
-# define R128_MIP_MAP_DISABLE (1 << 7)
-# define R128_TEX_CLAMP_S_WRAP (0 << 8)
-# define R128_TEX_CLAMP_S_MIRROR (1 << 8)
-# define R128_TEX_CLAMP_S_CLAMP (2 << 8)
-# define R128_TEX_CLAMP_S_BORDER_COLOR (3 << 8)
-# define R128_TEX_CLAMP_S_MASK (3 << 8)
-# define R128_TEX_WRAP_S (1 << 10)
-# define R128_TEX_CLAMP_T_WRAP (0 << 11)
-# define R128_TEX_CLAMP_T_MIRROR (1 << 11)
-# define R128_TEX_CLAMP_T_CLAMP (2 << 11)
-# define R128_TEX_CLAMP_T_BORDER_COLOR (3 << 11)
-# define R128_TEX_CLAMP_T_MASK (3 << 11)
-# define R128_TEX_WRAP_T (1 << 13)
-# define R128_TEX_PERSPECTIVE_DISABLE (1 << 14)
-# define R128_DATATYPE_VQ (0 << 16)
-# define R128_DATATYPE_CI4 (1 << 16)
-# define R128_DATATYPE_CI8 (2 << 16)
-# define R128_DATATYPE_ARGB1555 (3 << 16)
-# define R128_DATATYPE_RGB565 (4 << 16)
-# define R128_DATATYPE_RGB888 (5 << 16)
-# define R128_DATATYPE_ARGB8888 (6 << 16)
-# define R128_DATATYPE_RGB332 (7 << 16)
-# define R128_DATATYPE_Y8 (8 << 16)
-# define R128_DATATYPE_RGB8 (9 << 16)
-# define R128_DATATYPE_CI16 (10 << 16)
-# define R128_DATATYPE_YVYU422 (11 << 16)
-# define R128_DATATYPE_VYUY422 (12 << 16)
-# define R128_DATATYPE_AYUV444 (14 << 16)
-# define R128_DATATYPE_ARGB4444 (15 << 16)
-# define R128_PALLETE_EITHER (0 << 20)
-# define R128_PALLETE_1 (1 << 20)
-# define R128_PALLETE_2 (2 << 20)
-# define R128_PSEUDOCOLOR_DT_RGB565 (0 << 24)
-# define R128_PSEUDOCOLOR_DT_ARGB1555 (1 << 24)
-# define R128_PSEUDOCOLOR_DT_ARGB4444 (2 << 24)
-#define R128_PRIM_TEXTURE_COMBINE_CNTL_C 0x1cb4
-# define R128_COMB_DIS (0 << 0)
-# define R128_COMB_COPY (1 << 0)
-# define R128_COMB_COPY_INP (2 << 0)
-# define R128_COMB_MODULATE (3 << 0)
-# define R128_COMB_MODULATE2X (4 << 0)
-# define R128_COMB_MODULATE4X (5 << 0)
-# define R128_COMB_ADD (6 << 0)
-# define R128_COMB_ADD_SIGNED (7 << 0)
-# define R128_COMB_BLEND_VERTEX (8 << 0)
-# define R128_COMB_BLEND_TEXTURE (9 << 0)
-# define R128_COMB_BLEND_CONST (10 << 0)
-# define R128_COMB_BLEND_PREMULT (11 << 0)
-# define R128_COMB_BLEND_PREV (12 << 0)
-# define R128_COMB_BLEND_PREMULT_INV (13 << 0)
-# define R128_COMB_ADD_SIGNED2X (14 << 0)
-# define R128_COMB_BLEND_CONST_COLOR (15 << 0)
-# define R128_COMB_MASK (15 << 0)
-# define R128_COLOR_FACTOR_CONST_COLOR (0 << 4)
-# define R128_COLOR_FACTOR_NCONST_COLOR (1 << 4)
-# define R128_COLOR_FACTOR_TEX (4 << 4)
-# define R128_COLOR_FACTOR_NTEX (5 << 4)
-# define R128_COLOR_FACTOR_ALPHA (6 << 4)
-# define R128_COLOR_FACTOR_NALPHA (7 << 4)
-# define R128_COLOR_FACTOR_PREV_COLOR (8 << 4)
-# define R128_COLOR_FACTOR_MASK (15 << 4)
-# define R128_COMB_FCN_MSB (1 << 8)
-# define R128_INPUT_FACTOR_CONST_COLOR (2 << 10)
-# define R128_INPUT_FACTOR_CONST_ALPHA (3 << 10)
-# define R128_INPUT_FACTOR_INT_COLOR (4 << 10)
-# define R128_INPUT_FACTOR_INT_ALPHA (5 << 10)
-# define R128_INPUT_FACTOR_MASK (15 << 10)
-# define R128_COMB_ALPHA_DIS (0 << 14)
-# define R128_COMB_ALPHA_COPY (1 << 14)
-# define R128_COMB_ALPHA_COPY_INP (2 << 14)
-# define R128_COMB_ALPHA_MODULATE (3 << 14)
-# define R128_COMB_ALPHA_MODULATE2X (4 << 14)
-# define R128_COMB_ALPHA_MODULATE4X (5 << 14)
-# define R128_COMB_ALPHA_ADD (6 << 14)
-# define R128_COMB_ALPHA_ADD_SIGNED (7 << 14)
-# define R128_COMB_ALPHA_ADD_SIGNED2X (14 << 14)
-# define R128_COMB_ALPHA_MASK (15 << 14)
-# define R128_ALPHA_FACTOR_TEX_ALPHA (6 << 18)
-# define R128_ALPHA_FACTOR_NTEX_ALPHA (7 << 18)
-# define R128_ALPHA_FACTOR_MASK (15 << 18)
-# define R128_INP_FACTOR_A_CONST_ALPHA (1 << 25)
-# define R128_INP_FACTOR_A_INT_ALPHA (2 << 25)
-# define R128_INP_FACTOR_A_MASK (7 << 25)
-#define R128_TEX_SIZE_PITCH_C 0x1cb8
-# define R128_TEX_PITCH_SHIFT 0
-# define R128_TEX_SIZE_SHIFT 4
-# define R128_TEX_HEIGHT_SHIFT 8
-# define R128_TEX_MIN_SIZE_SHIFT 12
-# define R128_SEC_TEX_PITCH_SHIFT 16
-# define R128_SEC_TEX_SIZE_SHIFT 20
-# define R128_SEC_TEX_HEIGHT_SHIFT 24
-# define R128_SEC_TEX_MIN_SIZE_SHIFT 28
-# define R128_TEX_PITCH_MASK (0x0f << 0)
-# define R128_TEX_SIZE_MASK (0x0f << 4)
-# define R128_TEX_HEIGHT_MASK (0x0f << 8)
-# define R128_TEX_MIN_SIZE_MASK (0x0f << 12)
-# define R128_SEC_TEX_PITCH_MASK (0x0f << 16)
-# define R128_SEC_TEX_SIZE_MASK (0x0f << 20)
-# define R128_SEC_TEX_HEIGHT_MASK (0x0f << 24)
-# define R128_SEC_TEX_MIN_SIZE_MASK (0x0f << 28)
-# define R128_TEX_SIZE_PITCH_SHIFT 0
-# define R128_SEC_TEX_SIZE_PITCH_SHIFT 16
-# define R128_TEX_SIZE_PITCH_MASK (0xffff << 0)
-# define R128_SEC_TEX_SIZE_PITCH_MASK (0xffff << 16)
-#define R128_PRIM_TEX_0_OFFSET_C 0x1cbc
-#define R128_PRIM_TEX_1_OFFSET_C 0x1cc0
-#define R128_PRIM_TEX_2_OFFSET_C 0x1cc4
-#define R128_PRIM_TEX_3_OFFSET_C 0x1cc8
-#define R128_PRIM_TEX_4_OFFSET_C 0x1ccc
-#define R128_PRIM_TEX_5_OFFSET_C 0x1cd0
-#define R128_PRIM_TEX_6_OFFSET_C 0x1cd4
-#define R128_PRIM_TEX_7_OFFSET_C 0x1cd8
-#define R128_PRIM_TEX_8_OFFSET_C 0x1cdc
-#define R128_PRIM_TEX_9_OFFSET_C 0x1ce0
-#define R128_PRIM_TEX_10_OFFSET_C 0x1ce4
-# define R128_TEX_NO_TILE (0 << 30)
-# define R128_TEX_TILED_BY_HOST (1 << 30)
-# define R128_TEX_TILED_BY_STORAGE (2 << 30)
-# define R128_TEX_TILED_BY_STORAGE2 (3 << 30)
-
-#define R128_SEC_TEX_CNTL_C 0x1d00
-# define R128_SEC_SELECT_PRIM_ST (0 << 0)
-# define R128_SEC_SELECT_SEC_ST (1 << 0)
-#define R128_SEC_TEX_COMBINE_CNTL_C 0x1d04
-# define R128_INPUT_FACTOR_PREV_COLOR (8 << 10)
-# define R128_INPUT_FACTOR_PREV_ALPHA (9 << 10)
-# define R128_INP_FACTOR_A_PREV_ALPHA (4 << 25)
-#define R128_SEC_TEX_0_OFFSET_C 0x1d08
-#define R128_SEC_TEX_1_OFFSET_C 0x1d0c
-#define R128_SEC_TEX_2_OFFSET_C 0x1d10
-#define R128_SEC_TEX_3_OFFSET_C 0x1d14
-#define R128_SEC_TEX_4_OFFSET_C 0x1d18
-#define R128_SEC_TEX_5_OFFSET_C 0x1d1c
-#define R128_SEC_TEX_6_OFFSET_C 0x1d20
-#define R128_SEC_TEX_7_OFFSET_C 0x1d24
-#define R128_SEC_TEX_8_OFFSET_C 0x1d28
-#define R128_SEC_TEX_9_OFFSET_C 0x1d2c
-#define R128_SEC_TEX_10_OFFSET_C 0x1d30
-#define R128_CONSTANT_COLOR_C 0x1d34
-# define R128_CONSTANT_BLUE_SHIFT 0
-# define R128_CONSTANT_GREEN_SHIFT 8
-# define R128_CONSTANT_RED_SHIFT 16
-# define R128_CONSTANT_ALPHA_SHIFT 24
-#define R128_PRIM_TEXTURE_BORDER_COLOR_C 0x1d38
-# define R128_PRIM_TEX_BORDER_BLUE_SHIFT 0
-# define R128_PRIM_TEX_BORDER_GREEN_SHIFT 8
-# define R128_PRIM_TEX_BORDER_RED_SHIFT 16
-# define R128_PRIM_TEX_BORDER_ALPHA_SHIFT 24
-#define R128_SEC_TEXTURE_BORDER_COLOR_C 0x1d3c
-# define R128_SEC_TEX_BORDER_BLUE_SHIFT 0
-# define R128_SEC_TEX_BORDER_GREEN_SHIFT 8
-# define R128_SEC_TEX_BORDER_RED_SHIFT 16
-# define R128_SEC_TEX_BORDER_ALPHA_SHIFT 24
-#define R128_STEN_REF_MASK_C 0x1d40
-# define R128_STEN_REFERENCE_SHIFT 0
-# define R128_STEN_MASK_SHIFT 16
-# define R128_STEN_WRITE_MASK_SHIFT 24
-#define R128_PLANE_3D_MASK_C 0x1d44
-#define R128_TEX_CACHE_STAT_COUNT 0x1974
-
-
- /* Constants */
-#define R128_AGP_TEX_OFFSET 0x02000000
-
-#define R128_LAST_FRAME_REG R128_GUI_SCRATCH_REG0
-
- /* CCE packet types */
-#define R128_CCE_PACKET0 0x00000000
-#define R128_CCE_PACKET0_ONE_REG_WR 0x00008000
-#define R128_CCE_PACKET1 0x40000000
-#define R128_CCE_PACKET2 0x80000000
-#define R128_CCE_PACKET3 0xC0000000
-#define R128_CCE_PACKET3_NOP 0xC0001000
-#define R128_CCE_PACKET3_PAINT 0xC0001100
-#define R128_CCE_PACKET3_BITBLT 0xC0001200
-#define R128_CCE_PACKET3_SMALLTEXT 0xC0001300
-#define R128_CCE_PACKET3_HOSTDATA_BLT 0xC0001400
-#define R128_CCE_PACKET3_POLYLINE 0xC0001500
-#define R128_CCE_PACKET3_SCALING 0xC0001600
-#define R128_CCE_PACKET3_TRANS_SCALING 0xC0001700
-#define R128_CCE_PACKET3_POLYSCANLINES 0xC0001800
-#define R128_CCE_PACKET3_NEXT_CHAR 0xC0001900
-#define R128_CCE_PACKET3_PAINT_MULTI 0xC0001A00
-#define R128_CCE_PACKET3_BITBLT_MULTI 0xC0001B00
-#define R128_CCE_PACKET3_PLY_NEXTSCAN 0xC0001D00
-#define R128_CCE_PACKET3_SET_SCISSORS 0xC0001E00
-#define R128_CCE_PACKET3_SET_MODE24BPP 0xC0001F00
-#define R128_CCE_PACKET3_CNTL_PAINT 0xC0009100
-#define R128_CCE_PACKET3_CNTL_BITBLT 0xC0009200
-#define R128_CCE_PACKET3_CNTL_SMALLTEXT 0xC0009300
-#define R128_CCE_PACKET3_CNTL_HOSTDATA_BLT 0xC0009400
-#define R128_CCE_PACKET3_CNTL_POLYLINE 0xC0009500
-#define R128_CCE_PACKET3_CNTL_SCALING 0xC0009600
-#define R128_CCE_PACKET3_CNTL_TRANS_SCALING 0xC0009700
-#define R128_CCE_PACKET3_CNTL_POLYSCANLINES 0xC0009800
-#define R128_CCE_PACKET3_CNTL_NEXT_CHAR 0xC0009900
-#define R128_CCE_PACKET3_CNTL_PAINT_MULTI 0xC0009A00
-#define R128_CCE_PACKET3_CNTL_BITBLT_MULTI 0xC0009B00
-#define R128_CCE_PACKET3_CNTL_TRANS_BITBLT 0xC0009C00
-#define R128_CCE_PACKET3_3D_SAVE_CONTEXT 0xC0002000
-#define R128_CCE_PACKET3_3D_PLAY_CONTEXT 0xC0002100
-#define R128_CCE_PACKET3_3D_RNDR_GEN_INDX_PRIM 0xC0002300
-#define R128_CCE_PACKET3_3D_RNDR_GEN_PRIM 0xC0002500
-#define R128_CCE_PACKET3_LOAD_PALETTE 0xC0002C00
-#define R128_CCE_PACKET3_PURGE 0xC0002D00
-#define R128_CCE_PACKET3_NEXT_VERTEX_BUNDLE 0xC0002E00
-# define R128_CCE_PACKET_MASK 0xC0000000
-# define R128_CCE_PACKET_COUNT_MASK 0x3fff0000
-# define R128_CCE_PACKET_MAX_DWORDS (1 << 12)
-# define R128_CCE_PACKET0_REG_MASK 0x000007ff
-# define R128_CCE_PACKET1_REG0_MASK 0x000007ff
-# define R128_CCE_PACKET1_REG1_MASK 0x003ff800
-
-#define R128_CCE_VC_FRMT_RHW 0x00000001
-#define R128_CCE_VC_FRMT_DIFFUSE_BGR 0x00000002
-#define R128_CCE_VC_FRMT_DIFFUSE_A 0x00000004
-#define R128_CCE_VC_FRMT_DIFFUSE_ARGB 0x00000008
-#define R128_CCE_VC_FRMT_SPEC_BGR 0x00000010
-#define R128_CCE_VC_FRMT_SPEC_F 0x00000020
-#define R128_CCE_VC_FRMT_SPEC_FRGB 0x00000040
-#define R128_CCE_VC_FRMT_S_T 0x00000080
-#define R128_CCE_VC_FRMT_S2_T2 0x00000100
-#define R128_CCE_VC_FRMT_RHW2 0x00000200
-
-#define R128_CCE_VC_CNTL_PRIM_TYPE_NONE 0x00000000
-#define R128_CCE_VC_CNTL_PRIM_TYPE_POINT 0x00000001
-#define R128_CCE_VC_CNTL_PRIM_TYPE_LINE 0x00000002
-#define R128_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE 0x00000003
-#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST 0x00000004
-#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN 0x00000005
-#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP 0x00000006
-#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 0x00000007
-#define R128_CCE_VC_CNTL_PRIM_WALK_IND 0x00000010
-#define R128_CCE_VC_CNTL_PRIM_WALK_LIST 0x00000020
-#define R128_CCE_VC_CNTL_PRIM_WALK_RING 0x00000030
-#define R128_CCE_VC_CNTL_NUM_SHIFT 16
-
-/* hmm copyed blindly (no specs) from radeon.h ... */
-#define R128_RE_TOP_LEFT 0x26c0
-# define R128_RE_LEFT_SHIFT 0
-# define R128_RE_TOP_SHIFT 16
-#define R128_RE_WIDTH_HEIGHT 0x1c44
-# define R128_RE_WIDTH_SHIFT 0
-# define R128_RE_HEIGHT_SHIFT 16
-
-#endif
diff --git a/src/r128_sarea.h b/src/r128_sarea.h
deleted file mode 100644
index 70f9122e..00000000
--- a/src/r128_sarea.h
+++ /dev/null
@@ -1,194 +0,0 @@
-/*
- * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
- * Precision Insight, Inc., Cedar Park, Texas, and
- * VA Linux Systems Inc., Fremont, California.
- *
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation on the rights to use, copy, modify, merge,
- * publish, distribute, sublicense, and/or sell copies of the Software,
- * and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial
- * portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX
- * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-/*
- * Authors:
- * Kevin E. Martin <martin@valinux.com>
- * Gareth Hughes <gareth@valinux.com>
- *
- */
-
-#ifndef _R128_SAREA_H_
-#define _R128_SAREA_H_
-
-#include <X11/Xmd.h>
-
-/* WARNING: If you change any of these defines, make sure to change the
- * defines in the kernel file (r128_drm.h)
- */
-#ifndef __R128_SAREA_DEFINES__
-#define __R128_SAREA_DEFINES__
-
-/* What needs to be changed for the current vertex buffer?
- */
-#define R128_UPLOAD_CONTEXT 0x001
-#define R128_UPLOAD_SETUP 0x002
-#define R128_UPLOAD_TEX0 0x004
-#define R128_UPLOAD_TEX1 0x008
-#define R128_UPLOAD_TEX0IMAGES 0x010
-#define R128_UPLOAD_TEX1IMAGES 0x020
-#define R128_UPLOAD_CORE 0x040
-#define R128_UPLOAD_MASKS 0x080
-#define R128_UPLOAD_WINDOW 0x100
-#define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */
-#define R128_REQUIRE_QUIESCENCE 0x400
-#define R128_UPLOAD_ALL 0x7ff
-
-#define R128_FRONT 0x1
-#define R128_BACK 0x2
-#define R128_DEPTH 0x4
-
-/* Primitive types
- */
-#define R128_POINTS 0x1
-#define R128_LINES 0x2
-#define R128_LINE_STRIP 0x3
-#define R128_TRIANGLES 0x4
-#define R128_TRIANGLE_FAN 0x5
-#define R128_TRIANGLE_STRIP 0x6
-
-/* Vertex/indirect buffer size
- */
-#define R128_BUFFER_SIZE 16384
-
-/* Byte offsets for indirect buffer data
- */
-#define R128_INDEX_PRIM_OFFSET 20
-#define R128_HOSTDATA_BLIT_OFFSET 32
-
-/* Keep these small for testing
- */
-#define R128_NR_SAREA_CLIPRECTS 12
-
-/* There are 2 heaps (local/AGP). Each region within a heap is a
- * minimum of 64k, and there are at most 64 of them per heap.
- */
-#define R128_CARD_HEAP 0
-#define R128_AGP_HEAP 1
-#define R128_NR_TEX_HEAPS 2
-#define R128_NR_TEX_REGIONS 64
-#define R128_LOG_TEX_GRANULARITY 16
-
-#define R128_NR_CONTEXT_REGS 12
-
-#define R128_MAX_TEXTURE_LEVELS 11
-#define R128_MAX_TEXTURE_UNITS 2
-
-#endif /* __R128_SAREA_DEFINES__ */
-
-typedef struct {
- /* Context state - can be written in one large chunk */
- unsigned int dst_pitch_offset_c;
- unsigned int dp_gui_master_cntl_c;
- unsigned int sc_top_left_c;
- unsigned int sc_bottom_right_c;
- unsigned int z_offset_c;
- unsigned int z_pitch_c;
- unsigned int z_sten_cntl_c;
- unsigned int tex_cntl_c;
- unsigned int misc_3d_state_cntl_reg;
- unsigned int texture_clr_cmp_clr_c;
- unsigned int texture_clr_cmp_msk_c;
- unsigned int fog_color_c;
-
- /* Texture state */
- unsigned int tex_size_pitch_c;
- unsigned int constant_color_c;
-
- /* Setup state */
- unsigned int pm4_vc_fpu_setup;
- unsigned int setup_cntl;
-
- /* Mask state */
- unsigned int dp_write_mask;
- unsigned int sten_ref_mask_c;
- unsigned int plane_3d_mask_c;
-
- /* Window state */
- unsigned int window_xy_offset;
-
- /* Core state */
- unsigned int scale_3d_cntl;
-} r128_context_regs_t;
-
-/* Setup registers for each texture unit
- */
-typedef struct {
- unsigned int tex_cntl;
- unsigned int tex_combine_cntl;
- unsigned int tex_size_pitch;
- unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
- unsigned int tex_border_color;
-} r128_texture_regs_t;
-
-typedef struct {
- /* The channel for communication of state information to the kernel
- * on firing a vertex buffer.
- */
- r128_context_regs_t ContextState;
- r128_texture_regs_t TexState[R128_MAX_TEXTURE_UNITS];
- unsigned int dirty;
- unsigned int vertsize;
- unsigned int vc_format;
-
- /* The current cliprects, or a subset thereof.
- */
- drm_clip_rect_t boxes[R128_NR_SAREA_CLIPRECTS];
- unsigned int nbox;
-
- /* Counters for throttling of rendering clients.
- */
- unsigned int last_frame;
- unsigned int last_dispatch;
-
- /* Maintain an LRU of contiguous regions of texture space. If you
- * think you own a region of texture memory, and it has an age
- * different to the one you set, then you are mistaken and it has
- * been stolen by another client. If global texAge hasn't changed,
- * there is no need to walk the list.
- *
- * These regions can be used as a proxy for the fine-grained texture
- * information of other clients - by maintaining them in the same
- * lru which is used to age their own textures, clients have an
- * approximate lru for the whole of global texture space, and can
- * make informed decisions as to which areas to kick out. There is
- * no need to choose whether to kick out your own texture or someone
- * else's - simply eject them all in LRU order.
- */
- /* Last elt is sentinal */
- drmTextureRegion texList[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1];
- /* last time texture was uploaded */
- unsigned int texAge[R128_NR_TEX_HEAPS];
-
- int ctxOwner; /* last context to upload state */
- int pfAllowPageFlip; /* set by the 2d driver, read by the client */
- int pfCurrentPage; /* set by kernel, read by others */
-} R128SAREAPriv, *R128SAREAPrivPtr;
-
-#endif
diff --git a/src/r128_version.h b/src/r128_version.h
deleted file mode 100644
index 3e02a902..00000000
--- a/src/r128_version.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Copyright 2000 through 2004 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that copyright
- * notice and this permission notice appear in supporting documentation, and
- * that the name of Marc Aurele La France not be used in advertising or
- * publicity pertaining to distribution of the software without specific,
- * written prior permission. Marc Aurele La France makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as-is" without express or implied warranty.
- *
- * MARC AURELE LA FRANCE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO
- * EVENT SHALL MARC AURELE LA FRANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-
-#ifndef _R128_VERSION_H_
-#define _R128_VERSION_H_ 1
-
-#undef R128_NAME
-#undef R128_DRIVER_NAME
-#undef R128_VERSION_MAJOR
-#undef R128_VERSION_MINOR
-#undef R128_VERSION_PATCH
-#undef R128_VERSION_CURRENT
-#undef R128_VERSION_EVALUATE
-#undef R128_VERSION_STRINGIFY
-#undef R128_VERSION_NAME
-
-#define R128_NAME "R128"
-#define R128_DRIVER_NAME "r128"
-
-#define R128_VERSION_MAJOR 4
-#define R128_VERSION_MINOR 1
-#define R128_VERSION_PATCH 0
-
-#ifndef R128_VERSION_EXTRA
-#define R128_VERSION_EXTRA ""
-#endif
-
-#define R128_VERSION_CURRENT \
- ((R128_VERSION_MAJOR << 20) | \
- (R128_VERSION_MINOR << 10) | \
- (R128_VERSION_PATCH))
-
-#define R128_VERSION_EVALUATE(__x) #__x
-#define R128_VERSION_STRINGIFY(_x) R128_VERSION_EVALUATE(_x)
-#define R128_VERSION_NAME \
- R128_VERSION_STRINGIFY(R128_VERSION_MAJOR) "." \
- R128_VERSION_STRINGIFY(R128_VERSION_MINOR) "." \
- R128_VERSION_STRINGIFY(R128_VERSION_MINOR) R128_VERSION_EXTRA
-
-#endif /* _R128_VERSION_H_ */
diff --git a/src/r128_video.c b/src/r128_video.c
deleted file mode 100644
index 8e833235..00000000
--- a/src/r128_video.c
+++ /dev/null
@@ -1,1028 +0,0 @@
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <string.h>
-
-#include "r128.h"
-#include "r128_reg.h"
-
-#ifdef XF86DRI
-#include "r128_common.h"
-#include "r128_sarea.h"
-#endif
-
-#include "xf86.h"
-#include "dixstruct.h"
-
-#include <X11/extensions/Xv.h>
-#include "fourcc.h"
-
-#define OFF_DELAY 250 /* milliseconds */
-#define FREE_DELAY 15000
-
-#define OFF_TIMER 0x01
-#define FREE_TIMER 0x02
-#define CLIENT_VIDEO_ON 0x04
-
-#define TIMER_MASK (OFF_TIMER | FREE_TIMER)
-
-static XF86VideoAdaptorPtr R128SetupImageVideo(ScreenPtr);
-static int R128SetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
-static int R128GetPortAttribute(ScrnInfoPtr, Atom ,INT32 *, pointer);
-static void R128StopVideo(ScrnInfoPtr, pointer, Bool);
-static void R128QueryBestSize(ScrnInfoPtr, Bool, short, short, short, short,
- unsigned int *, unsigned int *, pointer);
-static int R128PutImage(ScrnInfoPtr, short, short, short, short, short,
- short, short, short, int, unsigned char*, short,
- short, Bool, RegionPtr, pointer, DrawablePtr);
-static int R128QueryImageAttributes(ScrnInfoPtr, int, unsigned short *,
- unsigned short *, int *, int *);
-
-
-static void R128ResetVideo(ScrnInfoPtr);
-
-static void R128VideoTimerCallback(ScrnInfoPtr pScrn, Time now);
-
-
-#define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
-
-static Atom xvBrightness, xvColorKey, xvSaturation, xvDoubleBuffer;
-
-
-typedef struct {
- int brightness;
- int saturation;
- Bool doubleBuffer;
- unsigned char currentBuffer;
- FBLinearPtr linear;
- RegionRec clip;
- CARD32 colorKey;
- CARD32 videoStatus;
- Time offTime;
- Time freeTime;
- int ecp_div;
-} R128PortPrivRec, *R128PortPrivPtr;
-
-static void R128ECP(ScrnInfoPtr pScrn, R128PortPrivPtr pPriv)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- int dot_clock = info->ModeReg.dot_clock_freq;
-
- if (dot_clock < 12500) pPriv->ecp_div = 0;
- else if (dot_clock < 25000) pPriv->ecp_div = 1;
- else pPriv->ecp_div = 2;
-
- OUTPLLP(pScrn, R128_VCLK_ECP_CNTL, pPriv->ecp_div<<8, ~R128_ECP_DIV_MASK);
-}
-
-void R128InitVideo(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL;
- XF86VideoAdaptorPtr newAdaptor = NULL;
- int num_adaptors;
-
- newAdaptor = R128SetupImageVideo(pScreen);
-
- num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
-
- if(newAdaptor) {
- if(!num_adaptors) {
- num_adaptors = 1;
- adaptors = &newAdaptor;
- } else {
- newAdaptors = /* need to free this someplace */
- xalloc((num_adaptors + 1) * sizeof(XF86VideoAdaptorPtr*));
- if(newAdaptors) {
- memcpy(newAdaptors, adaptors, num_adaptors *
- sizeof(XF86VideoAdaptorPtr));
- newAdaptors[num_adaptors] = newAdaptor;
- adaptors = newAdaptors;
- num_adaptors++;
- }
- }
- }
-
- if(num_adaptors)
- xf86XVScreenInit(pScreen, adaptors, num_adaptors);
-
- if(newAdaptors)
- xfree(newAdaptors);
-}
-
-#define MAXWIDTH 2048
-#define MAXHEIGHT 2048
-
-/* client libraries expect an encoding */
-static XF86VideoEncodingRec DummyEncoding =
-{
- 0,
- "XV_IMAGE",
- MAXWIDTH, MAXHEIGHT,
- {1, 1}
-};
-
-#define NUM_FORMATS 12
-
-static XF86VideoFormatRec Formats[NUM_FORMATS] =
-{
- {8, TrueColor}, {8, DirectColor}, {8, PseudoColor},
- {8, GrayScale}, {8, StaticGray}, {8, StaticColor},
- {15, TrueColor}, {16, TrueColor}, {24, TrueColor},
- {15, DirectColor}, {16, DirectColor}, {24, DirectColor}
-};
-
-
-#define NUM_ATTRIBUTES 4
-
-static XF86AttributeRec Attributes[NUM_ATTRIBUTES] =
-{
- {XvSettable | XvGettable, 0, (1 << 24) - 1, "XV_COLORKEY"},
- {XvSettable | XvGettable, -64, 63, "XV_BRIGHTNESS"},
- {XvSettable | XvGettable, 0, 31, "XV_SATURATION"},
- {XvSettable | XvGettable, 0, 1, "XV_DOUBLE_BUFFER"}
-};
-
-#define NUM_IMAGES 4
-
-static XF86ImageRec Images[NUM_IMAGES] =
-{
- XVIMAGE_YUY2,
- XVIMAGE_UYVY,
- XVIMAGE_YV12,
- XVIMAGE_I420
-};
-
-static void
-R128ResetVideo(ScrnInfoPtr pScrn)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- R128PortPrivPtr pPriv = info->adaptor->pPortPrivates[0].ptr;
-
-
- OUTREG(R128_OV0_SCALE_CNTL, 0x80000000);
- OUTREG(R128_OV0_EXCLUSIVE_HORZ, 0);
- OUTREG(R128_OV0_AUTO_FLIP_CNTL, 0); /* maybe */
- OUTREG(R128_OV0_FILTER_CNTL, 0x0000000f);
- OUTREG(R128_OV0_COLOUR_CNTL, (pPriv->brightness & 0x7f) |
- (pPriv->saturation << 8) |
- (pPriv->saturation << 16));
- OUTREG(R128_OV0_GRAPHICS_KEY_MSK, (1 << pScrn->depth) - 1);
- OUTREG(R128_OV0_GRAPHICS_KEY_CLR, pPriv->colorKey);
- OUTREG(R128_OV0_KEY_CNTL, R128_GRAPHIC_KEY_FN_NE);
- OUTREG(R128_OV0_TEST, 0);
-}
-
-
-static XF86VideoAdaptorPtr
-R128AllocAdaptor(ScrnInfoPtr pScrn)
-{
- XF86VideoAdaptorPtr adapt;
- R128InfoPtr info = R128PTR(pScrn);
- R128PortPrivPtr pPriv;
-
- if(!(adapt = xf86XVAllocateVideoAdaptorRec(pScrn)))
- return NULL;
-
- if(!(pPriv = xcalloc(1, sizeof(R128PortPrivRec) + sizeof(DevUnion))))
- {
- xfree(adapt);
- return NULL;
- }
-
- adapt->pPortPrivates = (DevUnion*)(&pPriv[1]);
- adapt->pPortPrivates[0].ptr = (pointer)pPriv;
-
- xvBrightness = MAKE_ATOM("XV_BRIGHTNESS");
- xvSaturation = MAKE_ATOM("XV_SATURATION");
- xvColorKey = MAKE_ATOM("XV_COLORKEY");
- xvDoubleBuffer = MAKE_ATOM("XV_DOUBLE_BUFFER");
-
- pPriv->colorKey = info->videoKey;
- pPriv->doubleBuffer = TRUE;
- pPriv->videoStatus = 0;
- pPriv->brightness = 0;
- pPriv->saturation = 16;
- pPriv->currentBuffer = 0;
- R128ECP(pScrn, pPriv);
-
- return adapt;
-}
-
-static XF86VideoAdaptorPtr
-R128SetupImageVideo(ScreenPtr pScreen)
-{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- R128InfoPtr info = R128PTR(pScrn);
- R128PortPrivPtr pPriv;
- XF86VideoAdaptorPtr adapt;
-
- if(!(adapt = R128AllocAdaptor(pScrn)))
- return NULL;
-
- adapt->type = XvWindowMask | XvInputMask | XvImageMask;
- adapt->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT;
- adapt->name = "ATI Rage128 Video Overlay";
- adapt->nEncodings = 1;
- adapt->pEncodings = &DummyEncoding;
- adapt->nFormats = NUM_FORMATS;
- adapt->pFormats = Formats;
- adapt->nPorts = 1;
- adapt->nAttributes = NUM_ATTRIBUTES;
- adapt->pAttributes = Attributes;
- adapt->nImages = NUM_IMAGES;
- adapt->pImages = Images;
- adapt->PutVideo = NULL;
- adapt->PutStill = NULL;
- adapt->GetVideo = NULL;
- adapt->GetStill = NULL;
- adapt->StopVideo = R128StopVideo;
- adapt->SetPortAttribute = R128SetPortAttribute;
- adapt->GetPortAttribute = R128GetPortAttribute;
- adapt->QueryBestSize = R128QueryBestSize;
- adapt->PutImage = R128PutImage;
- adapt->QueryImageAttributes = R128QueryImageAttributes;
-
- info->adaptor = adapt;
-
- pPriv = (R128PortPrivPtr)(adapt->pPortPrivates[0].ptr);
- REGION_NULL(pScreen, &(pPriv->clip));
-
- R128ResetVideo(pScrn);
-
- return adapt;
-}
-
-static void
-R128StopVideo(ScrnInfoPtr pScrn, pointer data, Bool cleanup)
-{
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- R128PortPrivPtr pPriv = (R128PortPrivPtr)data;
-
- REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
-
- if(cleanup) {
- if(pPriv->videoStatus & CLIENT_VIDEO_ON) {
- OUTREG(R128_OV0_SCALE_CNTL, 0);
- }
- if(pPriv->linear) {
- xf86FreeOffscreenLinear(pPriv->linear);
- pPriv->linear = NULL;
- }
- pPriv->videoStatus = 0;
- } else {
- if(pPriv->videoStatus & CLIENT_VIDEO_ON) {
- pPriv->videoStatus |= OFF_TIMER;
- pPriv->offTime = currentTime.milliseconds + OFF_DELAY;
- }
- }
-}
-
-static int
-R128SetPortAttribute(
- ScrnInfoPtr pScrn,
- Atom attribute,
- INT32 value,
- pointer data
-){
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- R128PortPrivPtr pPriv = (R128PortPrivPtr)data;
-
- if(attribute == xvBrightness) {
- if((value < -64) || (value > 63))
- return BadValue;
- pPriv->brightness = value;
-
- OUTREG(R128_OV0_COLOUR_CNTL, (pPriv->brightness & 0x7f) |
- (pPriv->saturation << 8) |
- (pPriv->saturation << 16));
- } else
- if(attribute == xvSaturation) {
- if((value < 0) || (value > 31))
- return BadValue;
- pPriv->saturation = value;
-
- OUTREG(R128_OV0_COLOUR_CNTL, (pPriv->brightness & 0x7f) |
- (pPriv->saturation << 8) |
- (pPriv->saturation << 16));
- } else
- if(attribute == xvDoubleBuffer) {
- if((value < 0) || (value > 1))
- return BadValue;
- pPriv->doubleBuffer = value;
- } else
- if(attribute == xvColorKey) {
- pPriv->colorKey = value;
- OUTREG(R128_OV0_GRAPHICS_KEY_CLR, pPriv->colorKey);
-
- REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
- } else return BadMatch;
-
- return Success;
-}
-
-static int
-R128GetPortAttribute(
- ScrnInfoPtr pScrn,
- Atom attribute,
- INT32 *value,
- pointer data
-){
- R128PortPrivPtr pPriv = (R128PortPrivPtr)data;
-
- if(attribute == xvBrightness) {
- *value = pPriv->brightness;
- } else
- if(attribute == xvSaturation) {
- *value = pPriv->saturation;
- } else
- if(attribute == xvDoubleBuffer) {
- *value = pPriv->doubleBuffer ? 1 : 0;
- } else
- if(attribute == xvColorKey) {
- *value = pPriv->colorKey;
- } else return BadMatch;
-
- return Success;
-}
-
-
-static void
-R128QueryBestSize(
- ScrnInfoPtr pScrn,
- Bool motion,
- short vid_w, short vid_h,
- short drw_w, short drw_h,
- unsigned int *p_w, unsigned int *p_h,
- pointer data
-){
- if(vid_w > (drw_w << 4))
- drw_w = vid_w >> 4;
- if(vid_h > (drw_h << 4))
- drw_h = vid_h >> 4;
-
- *p_w = drw_w;
- *p_h = drw_h;
-}
-
-
-/*
- *
- * R128DMA - abuse the texture blit ioctl to transfer rectangular blocks
- *
- * The block is split into 'passes' pieces of 'hpass' lines which fit entirely
- * into an indirect buffer
- *
- */
-
-static Bool
-R128DMA(
- R128InfoPtr info,
- unsigned char *src,
- unsigned char *dst,
- int srcPitch,
- int dstPitch,
- int h,
- int w
-){
-
-#ifdef XF86DRI
-
-#define BUFSIZE (R128_BUFFER_SIZE - R128_HOSTDATA_BLIT_OFFSET)
-#define MAXPASSES (MAXHEIGHT/(BUFSIZE/(MAXWIDTH*2))+1)
-
- unsigned char *fb = (CARD8*)info->FB;
- unsigned char *buf;
- int err=-1, i, idx, offset, hpass, passes, srcpassbytes, dstpassbytes;
- int sizes[MAXPASSES], list[MAXPASSES];
- drmDMAReq req;
- drmR128Blit blit;
-
- /* Verify conditions and bail out as early as possible */
- if (!info->directRenderingEnabled || !info->DMAForXv)
- return FALSE;
-
- if ((hpass = min(h,(BUFSIZE/w))) == 0)
- return FALSE;
-
- if ((passes = (h+hpass-1)/hpass) > MAXPASSES)
- return FALSE;
-
- /* Request indirect buffers */
- srcpassbytes = w*hpass;
-
- req.context = info->drmCtx;
- req.send_count = 0;
- req.send_list = NULL;
- req.send_sizes = NULL;
- req.flags = DRM_DMA_LARGER_OK;
- req.request_count = passes;
- req.request_size = srcpassbytes + R128_HOSTDATA_BLIT_OFFSET;
- req.request_list = &list[0];
- req.request_sizes = &sizes[0];
- req.granted_count = 0;
-
- if (drmDMA(info->drmFD, &req))
- return FALSE;
-
- if (req.granted_count < passes) {
- drmFreeBufs(info->drmFD, req.granted_count, req.request_list);
- return FALSE;
- }
-
- /* Copy parts of the block into buffers and fire them */
- dstpassbytes = hpass*dstPitch;
- dstPitch /= 8;
-
- for (i=0, offset=dst-fb; i<passes; i++, offset+=dstpassbytes) {
- if (i == (passes-1) && (h % hpass) != 0) {
- hpass = h % hpass;
- srcpassbytes = w*hpass;
- }
-
- idx = req.request_list[i];
- buf = (unsigned char *) info->buffers->list[idx].address + R128_HOSTDATA_BLIT_OFFSET;
-
- if (srcPitch == w) {
- memcpy(buf, src, srcpassbytes);
- src += srcpassbytes;
- } else {
- int count = hpass;
- while(count--) {
- memcpy(buf, src, w);
- src += srcPitch;
- buf += w;
- }
- }
-
- blit.idx = idx;
- blit.offset = offset;
- blit.pitch = dstPitch;
- blit.format = (R128_DATATYPE_CI8 >> 16);
- blit.x = (offset % 32);
- blit.y = 0;
- blit.width = w;
- blit.height = hpass;
-
- if ((err = drmCommandWrite(info->drmFD, DRM_R128_BLIT,
- &blit, sizeof(drmR128Blit))) < 0)
- break;
- }
-
- drmFreeBufs(info->drmFD, req.granted_count, req.request_list);
-
- return (err==0) ? TRUE : FALSE;
-
-#else
-
- /* This is to avoid cluttering the rest of the code with '#ifdef XF86DRI' */
- return FALSE;
-
-#endif /* XF86DRI */
-
-}
-
-
-static void
-R128CopyData422(
- R128InfoPtr info,
- unsigned char *src,
- unsigned char *dst,
- int srcPitch,
- int dstPitch,
- int h,
- int w
-){
- w <<= 1;
-
- /* Attempt data transfer with DMA and fall back to memcpy */
-
- if (!R128DMA(info, src, dst, srcPitch, dstPitch, h, w)) {
- while(h--) {
- memcpy(dst, src, w);
- src += srcPitch;
- dst += dstPitch;
- }
- }
-}
-
-static void
-R128CopyData420(
- R128InfoPtr info,
- unsigned char *src1,
- unsigned char *src2,
- unsigned char *src3,
- unsigned char *dst1,
- unsigned char *dst2,
- unsigned char *dst3,
- int srcPitch,
- int srcPitch2,
- int dstPitch,
- int h,
- int w
-){
- int count;
-
- /* Attempt data transfer with DMA and fall back to memcpy */
-
- if (!R128DMA(info, src1, dst1, srcPitch, dstPitch, h, w)) {
- count = h;
- while(count--) {
- memcpy(dst1, src1, w);
- src1 += srcPitch;
- dst1 += dstPitch;
- }
- }
-
- w >>= 1;
- h >>= 1;
- dstPitch >>= 1;
-
- if (!R128DMA(info, src2, dst2, srcPitch2, dstPitch, h, w)) {
- count = h;
- while(count--) {
- memcpy(dst2, src2, w);
- src2 += srcPitch2;
- dst2 += dstPitch;
- }
- }
-
- if (!R128DMA(info, src3, dst3, srcPitch2, dstPitch, h, w)) {
- count = h;
- while(count--) {
- memcpy(dst3, src3, w);
- src3 += srcPitch2;
- dst3 += dstPitch;
- }
- }
-}
-
-
-static FBLinearPtr
-R128AllocateMemory(
- ScrnInfoPtr pScrn,
- FBLinearPtr linear,
- int size
-){
- ScreenPtr pScreen;
- FBLinearPtr new_linear;
-
- if(linear) {
- if(linear->size >= size)
- return linear;
-
- if(xf86ResizeOffscreenLinear(linear, size))
- return linear;
-
- xf86FreeOffscreenLinear(linear);
- }
-
- pScreen = screenInfo.screens[pScrn->scrnIndex];
-
- new_linear = xf86AllocateOffscreenLinear(pScreen, size, 8,
- NULL, NULL, NULL);
-
- if(!new_linear) {
- int max_size;
-
- xf86QueryLargestOffscreenLinear(pScreen, &max_size, 8,
- PRIORITY_EXTREME);
-
- if(max_size < size)
- return NULL;
-
- xf86PurgeUnlockedOffscreenAreas(pScreen);
- new_linear = xf86AllocateOffscreenLinear(pScreen, size, 8,
- NULL, NULL, NULL);
- }
-
- return new_linear;
-}
-
-static void
-R128DisplayVideo422(
- ScrnInfoPtr pScrn,
- int id,
- int offset,
- short width, short height,
- int pitch,
- int left, int right, int top,
- BoxPtr dstBox,
- short src_w, short src_h,
- short drw_w, short drw_h
-){
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- R128PortPrivPtr pPriv = info->adaptor->pPortPrivates[0].ptr;
- int v_inc, h_inc, step_by, tmp;
- int p1_h_accum_init, p23_h_accum_init;
- int p1_v_accum_init;
-
- R128ECP(pScrn, pPriv);
-
- v_inc = (src_h << 20) / drw_h;
- h_inc = (src_w << (12 + pPriv->ecp_div)) / drw_w;
- step_by = 1;
-
- while(h_inc >= (2 << 12)) {
- step_by++;
- h_inc >>= 1;
- }
-
- /* keep everything in 16.16 */
-
- offset += ((left >> 16) & ~7) << 1;
-
- tmp = (left & 0x0003ffff) + 0x00028000 + (h_inc << 3);
- p1_h_accum_init = ((tmp << 4) & 0x000f8000) |
- ((tmp << 12) & 0xf0000000);
-
- tmp = ((left >> 1) & 0x0001ffff) + 0x00028000 + (h_inc << 2);
- p23_h_accum_init = ((tmp << 4) & 0x000f8000) |
- ((tmp << 12) & 0x70000000);
-
- tmp = (top & 0x0000ffff) + 0x00018000;
- p1_v_accum_init = ((tmp << 4) & 0x03ff8000) | 0x00000001;
-
- left = (left >> 16) & 7;
-
- OUTREG(R128_OV0_REG_LOAD_CNTL, 1);
- while(!(INREG(R128_OV0_REG_LOAD_CNTL) & (1 << 3)));
-
- OUTREG(R128_OV0_H_INC, h_inc | ((h_inc >> 1) << 16));
- OUTREG(R128_OV0_STEP_BY, step_by | (step_by << 8));
- OUTREG(R128_OV0_Y_X_START, dstBox->x1 | (dstBox->y1 << 16));
- OUTREG(R128_OV0_Y_X_END, dstBox->x2 | (dstBox->y2 << 16));
- OUTREG(R128_OV0_V_INC, v_inc);
- OUTREG(R128_OV0_P1_BLANK_LINES_AT_TOP, 0x00000fff | ((src_h - 1) << 16));
- OUTREG(R128_OV0_VID_BUF_PITCH0_VALUE, pitch);
- OUTREG(R128_OV0_P1_X_START_END, (width - 1) | (left << 16));
- left >>= 1; width >>= 1;
- OUTREG(R128_OV0_P2_X_START_END, (width - 1) | (left << 16));
- OUTREG(R128_OV0_P3_X_START_END, (width - 1) | (left << 16));
- OUTREG(R128_OV0_VID_BUF0_BASE_ADRS, offset & 0xfffffff0);
- OUTREG(R128_OV0_P1_V_ACCUM_INIT, p1_v_accum_init);
- OUTREG(R128_OV0_P23_V_ACCUM_INIT, 0);
- OUTREG(R128_OV0_P1_H_ACCUM_INIT, p1_h_accum_init);
- OUTREG(R128_OV0_P23_H_ACCUM_INIT, p23_h_accum_init);
-
- if(id == FOURCC_UYVY)
- OUTREG(R128_OV0_SCALE_CNTL, 0x41FF8C03);
- else
- OUTREG(R128_OV0_SCALE_CNTL, 0x41FF8B03);
-
- OUTREG(R128_OV0_REG_LOAD_CNTL, 0);
-}
-
-static void
-R128DisplayVideo420(
- ScrnInfoPtr pScrn,
- short width, short height,
- int pitch,
- int offset1, int offset2, int offset3,
- int left, int right, int top,
- BoxPtr dstBox,
- short src_w, short src_h,
- short drw_w, short drw_h
-){
- R128InfoPtr info = R128PTR(pScrn);
- unsigned char *R128MMIO = info->MMIO;
- R128PortPrivPtr pPriv = info->adaptor->pPortPrivates[0].ptr;
- int v_inc, h_inc, step_by, tmp, leftUV;
- int p1_h_accum_init, p23_h_accum_init;
- int p1_v_accum_init, p23_v_accum_init;
-
- v_inc = (src_h << 20) / drw_h;
- h_inc = (src_w << (12 + pPriv->ecp_div)) / drw_w;
- step_by = 1;
-
- while(h_inc >= (2 << 12)) {
- step_by++;
- h_inc >>= 1;
- }
-
- /* keep everything in 16.16 */
-
- offset1 += (left >> 16) & ~15;
- offset2 += (left >> 17) & ~15;
- offset3 += (left >> 17) & ~15;
-
- tmp = (left & 0x0003ffff) + 0x00028000 + (h_inc << 3);
- p1_h_accum_init = ((tmp << 4) & 0x000f8000) |
- ((tmp << 12) & 0xf0000000);
-
- tmp = ((left >> 1) & 0x0001ffff) + 0x00028000 + (h_inc << 2);
- p23_h_accum_init = ((tmp << 4) & 0x000f8000) |
- ((tmp << 12) & 0x70000000);
-
- tmp = (top & 0x0000ffff) + 0x00018000;
- p1_v_accum_init = ((tmp << 4) & 0x03ff8000) | 0x00000001;
-
- tmp = ((top >> 1) & 0x0000ffff) + 0x00018000;
- p23_v_accum_init = ((tmp << 4) & 0x01ff8000) | 0x00000001;
-
- leftUV = (left >> 17) & 15;
- left = (left >> 16) & 15;
-
- OUTREG(R128_OV0_REG_LOAD_CNTL, 1);
- while(!(INREG(R128_OV0_REG_LOAD_CNTL) & (1 << 3)));
-
- OUTREG(R128_OV0_H_INC, h_inc | ((h_inc >> 1) << 16));
- OUTREG(R128_OV0_STEP_BY, step_by | (step_by << 8));
- OUTREG(R128_OV0_Y_X_START, dstBox->x1 | (dstBox->y1 << 16));
- OUTREG(R128_OV0_Y_X_END, dstBox->x2 | (dstBox->y2 << 16));
- OUTREG(R128_OV0_V_INC, v_inc);
- OUTREG(R128_OV0_P1_BLANK_LINES_AT_TOP, 0x00000fff | ((src_h - 1) << 16));
- src_h = (src_h + 1) >> 1;
- OUTREG(R128_OV0_P23_BLANK_LINES_AT_TOP, 0x000007ff | ((src_h - 1) << 16));
- OUTREG(R128_OV0_VID_BUF_PITCH0_VALUE, pitch);
- OUTREG(R128_OV0_VID_BUF_PITCH1_VALUE, pitch >> 1);
- OUTREG(R128_OV0_P1_X_START_END, (width - 1) | (left << 16));
- width >>= 1;
- OUTREG(R128_OV0_P2_X_START_END, (width - 1) | (leftUV << 16));
- OUTREG(R128_OV0_P3_X_START_END, (width - 1) | (leftUV << 16));
- OUTREG(R128_OV0_VID_BUF0_BASE_ADRS, offset1 & 0xfffffff0);
- OUTREG(R128_OV0_VID_BUF1_BASE_ADRS, (offset2 & 0xfffffff0) | 0x00000001);
- OUTREG(R128_OV0_VID_BUF2_BASE_ADRS, (offset3 & 0xfffffff0) | 0x00000001);
- OUTREG(R128_OV0_P1_V_ACCUM_INIT, p1_v_accum_init);
- OUTREG(R128_OV0_P23_V_ACCUM_INIT, p23_v_accum_init);
- OUTREG(R128_OV0_P1_H_ACCUM_INIT, p1_h_accum_init);
- OUTREG(R128_OV0_P23_H_ACCUM_INIT, p23_h_accum_init);
- OUTREG(R128_OV0_SCALE_CNTL, 0x41FF8A03);
-
- OUTREG(R128_OV0_REG_LOAD_CNTL, 0);
-}
-
-
-
-static int
-R128PutImage(
- ScrnInfoPtr pScrn,
- short src_x, short src_y,
- short drw_x, short drw_y,
- short src_w, short src_h,
- short drw_w, short drw_h,
- int id, unsigned char* buf,
- short width, short height,
- Bool Sync,
- RegionPtr clipBoxes, pointer data,
- DrawablePtr pDraw
-){
- R128InfoPtr info = R128PTR(pScrn);
- R128PortPrivPtr pPriv = (R128PortPrivPtr)data;
- unsigned char *fb = (CARD8*)info->FB;
- INT32 xa, xb, ya, yb;
- int new_size, offset, s1offset, s2offset, s3offset;
- int srcPitch, srcPitch2, dstPitch;
- int d1line, d2line, d3line, d1offset, d2offset, d3offset;
- int top, left, npixels, nlines, bpp;
- BoxRec dstBox;
- CARD32 tmp;
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- unsigned char *R128MMIO = info->MMIO;
- CARD32 config_cntl = INREG(R128_CONFIG_CNTL);
-
- /* We need to disable byte swapping, or the data gets mangled */
- OUTREG(R128_CONFIG_CNTL, config_cntl &
- ~(APER_0_BIG_ENDIAN_16BPP_SWAP | APER_0_BIG_ENDIAN_32BPP_SWAP));
-#endif
-
- /*
- * s1offset, s2offset, s3offset - byte offsets to the Y, U and V planes
- * of the source.
- *
- * d1offset, d2offset, d3offset - byte offsets to the Y, U and V planes
- * of the destination.
- *
- * offset - byte offset within the framebuffer to where the destination
- * is stored.
- *
- * d1line, d2line, d3line - byte offsets within the destination to the
- * first displayed scanline in each plane.
- *
- */
-
- if(src_w > (drw_w << 4))
- drw_w = src_w >> 4;
- if(src_h > (drw_h << 4))
- drw_h = src_h >> 4;
-
- /* Clip */
- xa = src_x;
- xb = src_x + src_w;
- ya = src_y;
- yb = src_y + src_h;
-
- dstBox.x1 = drw_x;
- dstBox.x2 = drw_x + drw_w;
- dstBox.y1 = drw_y;
- dstBox.y2 = drw_y + drw_h;
-
- if(!xf86XVClipVideoHelper(&dstBox, &xa, &xb, &ya, &yb,
- clipBoxes, width, height))
- return Success;
-
- dstBox.x1 -= pScrn->frameX0;
- dstBox.x2 -= pScrn->frameX0;
- dstBox.y1 -= pScrn->frameY0;
- dstBox.y2 -= pScrn->frameY0;
-
- bpp = pScrn->bitsPerPixel >> 3;
-
- switch(id) {
- case FOURCC_YV12:
- case FOURCC_I420:
- srcPitch = (width + 3) & ~3;
- srcPitch2 = ((width >> 1) + 3) & ~3;
- dstPitch = (width + 31) & ~31; /* of luma */
- new_size = ((dstPitch * (height + (height >> 1))) + bpp - 1) / bpp;
- s1offset = 0;
- s2offset = srcPitch * height;
- s3offset = (srcPitch2 * (height >> 1)) + s2offset;
- break;
- case FOURCC_UYVY:
- case FOURCC_YUY2:
- default:
- srcPitch = width << 1;
- srcPitch2 = 0;
- dstPitch = ((width << 1) + 15) & ~15;
- new_size = ((dstPitch * height) + bpp - 1) / bpp;
- s1offset = 0;
- s2offset = 0;
- s3offset = 0;
- break;
- }
-
- if(!(pPriv->linear = R128AllocateMemory(pScrn, pPriv->linear,
- pPriv->doubleBuffer ? (new_size << 1) : new_size)))
- {
- return BadAlloc;
- }
-
- pPriv->currentBuffer ^= 1;
-
- /* copy data */
- top = ya >> 16;
- left = (xa >> 16) & ~1;
- npixels = ((((xb + 0xffff) >> 16) + 1) & ~1) - left;
-
- offset = pPriv->linear->offset * bpp;
- if(pPriv->doubleBuffer)
- offset += pPriv->currentBuffer * new_size * bpp;
-
- switch(id) {
- case FOURCC_YV12:
- case FOURCC_I420:
- d1line = top * dstPitch;
- d2line = (height * dstPitch) + ((top >> 1) * (dstPitch >> 1));
- d3line = d2line + ((height >> 1) * (dstPitch >> 1));
-
- top &= ~1;
-
- d1offset = (top * dstPitch) + left + offset;
- d2offset = d2line + (left >> 1) + offset;
- d3offset = d3line + (left >> 1) + offset;
-
- s1offset += (top * srcPitch) + left;
- tmp = ((top >> 1) * srcPitch2) + (left >> 1);
- s2offset += tmp;
- s3offset += tmp;
- if(id == FOURCC_YV12) {
- tmp = s2offset;
- s2offset = s3offset;
- s3offset = tmp;
- }
-
- nlines = ((((yb + 0xffff) >> 16) + 1) & ~1) - top;
- R128CopyData420(info, buf + s1offset, buf + s2offset, buf + s3offset,
- fb + d1offset, fb + d2offset, fb + d3offset,
- srcPitch, srcPitch2, dstPitch, nlines, npixels);
- break;
- case FOURCC_UYVY:
- case FOURCC_YUY2:
- default:
- left <<= 1;
- d1line = top * dstPitch;
- d2line = 0;
- d3line = 0;
- d1offset = d1line + left + offset;
- d2offset = 0;
- d3offset = 0;
- s1offset += (top * srcPitch) + left;
- nlines = ((yb + 0xffff) >> 16) - top;
- R128CopyData422(info, buf + s1offset, fb + d1offset,
- srcPitch, dstPitch, nlines, npixels);
- break;
- }
-
-#if X_BYTE_ORDER == X_BIG_ENDIAN
- /* restore byte swapping */
- OUTREG(R128_CONFIG_CNTL, config_cntl);
-#endif
-
- /* update cliplist */
- if(!REGION_EQUAL(pScrn->pScreen, &pPriv->clip, clipBoxes)) {
- REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes);
- /* draw these */
- xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey, clipBoxes);
- }
-
-
- switch(id) {
- case FOURCC_YV12:
- case FOURCC_I420:
- R128DisplayVideo420(pScrn, width, height, dstPitch,
- offset + d1line, offset + d2line, offset + d3line,
- xa, xb, ya, &dstBox, src_w, src_h, drw_w, drw_h);
- break;
- case FOURCC_UYVY:
- case FOURCC_YUY2:
- default:
- R128DisplayVideo422(pScrn, id, offset + d1line, width, height, dstPitch,
- xa, xb, ya, &dstBox, src_w, src_h, drw_w, drw_h);
- break;
- }
-
- pPriv->videoStatus = CLIENT_VIDEO_ON;
-
- info->VideoTimerCallback = R128VideoTimerCallback;
-
- return Success;
-}
-
-
-static int
-R128QueryImageAttributes(
- ScrnInfoPtr pScrn,
- int id,
- unsigned short *w, unsigned short *h,
- int *pitches, int *offsets
-){
- int size, tmp;
-
- if(*w > MAXWIDTH) *w = MAXWIDTH;
- if(*h > MAXHEIGHT) *h = MAXHEIGHT;
-
- *w = (*w + 1) & ~1;
- if(offsets) offsets[0] = 0;
-
- switch(id) {
- case FOURCC_YV12:
- case FOURCC_I420:
- *h = (*h + 1) & ~1;
- size = (*w + 3) & ~3;
- if(pitches) pitches[0] = size;
- size *= *h;
- if(offsets) offsets[1] = size;
- tmp = ((*w >> 1) + 3) & ~3;
- if(pitches) pitches[1] = pitches[2] = tmp;
- tmp *= (*h >> 1);
- size += tmp;
- if(offsets) offsets[2] = size;
- size += tmp;
- break;
- case FOURCC_UYVY:
- case FOURCC_YUY2:
- default:
- size = *w << 1;
- if(pitches) pitches[0] = size;
- size *= *h;
- break;
- }
-
- return size;
-}
-
-static void
-R128VideoTimerCallback(ScrnInfoPtr pScrn, Time now)
-{
- R128InfoPtr info = R128PTR(pScrn);
- R128PortPrivPtr pPriv = info->adaptor->pPortPrivates[0].ptr;
-
- if(pPriv->videoStatus & TIMER_MASK) {
- if(pPriv->videoStatus & OFF_TIMER) {
- if(pPriv->offTime < now) {
- unsigned char *R128MMIO = info->MMIO;
- OUTREG(R128_OV0_SCALE_CNTL, 0);
- pPriv->videoStatus = FREE_TIMER;
- pPriv->freeTime = now + FREE_DELAY;
- }
- } else { /* FREE_TIMER */
- if(pPriv->freeTime < now) {
- if(pPriv->linear) {
- xf86FreeOffscreenLinear(pPriv->linear);
- pPriv->linear = NULL;
- }
- pPriv->videoStatus = 0;
- info->VideoTimerCallback = NULL;
- }
- }
- } else /* shouldn't get here */
- info->VideoTimerCallback = NULL;
-}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 15:37:48 +0000