diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/radeon.h | 3 | ||||
| -rw-r--r-- | src/radeon_accel.c | 12 | ||||
| -rw-r--r-- | src/radeon_dri.c | 2 | ||||
| -rw-r--r-- | src/radeon_dri.h | 6 | ||||
| -rw-r--r-- | src/radeon_driver.c | 7 |
5 files changed, 1 insertions, 29 deletions
diff --git a/src/radeon.h b/src/radeon.h index 4f77c3b9..23bd0a52 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -567,7 +567,6 @@ typedef struct { Bool CPRuns; /* CP is running */ Bool CPInUse; /* CP has been used by X server */ Bool CPStarted; /* CP has started */ - int CPMode; /* CP mode that server/clients use */ int CPFifoSize; /* Size of the CP command FIFO */ int CPusecTimeout; /* CP timeout in usecs */ Bool needCacheFlush; @@ -1046,13 +1045,11 @@ do { \ #define RADEONCP_RESET(pScrn, info) \ do { \ - if (RADEONCP_USE_RING_BUFFER(info->CPMode)) { \ int _ret = drmCommandNone(info->drmFD, DRM_RADEON_CP_RESET); \ if (_ret) { \ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \ "%s: CP reset %d\n", __FUNCTION__, _ret); \ } \ - } \ } while (0) #define RADEONCP_REFRESH(pScrn, info) \ diff --git a/src/radeon_accel.c b/src/radeon_accel.c index 65ad33df..91f463a3 100644 --- a/src/radeon_accel.c +++ b/src/radeon_accel.c @@ -1046,18 +1046,6 @@ RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen) depthSize = ((((pScrn->virtualY + 15) & ~15) * info->depthPitch * depthCpp + RADEON_BUFFER_ALIGN) & ~RADEON_BUFFER_ALIGN); - switch (info->CPMode) { - case RADEON_DEFAULT_CP_PIO_MODE: - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CP in PIO mode\n"); - break; - case RADEON_DEFAULT_CP_BM_MODE: - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CP in BM mode\n"); - break; - default: - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CP in UNKNOWN mode\n"); - break; - } - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using %d MB GART aperture\n", info->gartSize); xf86DrvMsg(pScrn->scrnIndex, X_INFO, diff --git a/src/radeon_dri.c b/src/radeon_dri.c index 63c03605..32181473 100644 --- a/src/radeon_dri.c +++ b/src/radeon_dri.c @@ -1103,7 +1103,7 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen) drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec); drmInfo.is_pci = (info->cardType!=CARD_AGP); - drmInfo.cp_mode = info->CPMode; + drmInfo.cp_mode = RADEON_CSQ_PRIBM_INDBM; drmInfo.gart_size = info->gartSize*1024*1024; drmInfo.ring_size = info->ringSize*1024*1024; drmInfo.usec_timeout = info->CPusecTimeout; diff --git a/src/radeon_dri.h b/src/radeon_dri.h index 67892a6c..b1c5bbfb 100644 --- a/src/radeon_dri.h +++ b/src/radeon_dri.h @@ -39,8 +39,6 @@ #include "xf86drm.h" /* DRI Driver defaults */ -#define RADEON_DEFAULT_CP_PIO_MODE RADEON_CSQ_PRIPIO_INDPIO -#define RADEON_DEFAULT_CP_BM_MODE RADEON_CSQ_PRIBM_INDBM #define RADEON_DEFAULT_GART_SIZE 8 /* MB (must be 2^n and > 4MB) */ #define RADEON_DEFAULT_RING_SIZE 1 /* MB (must be page aligned) */ #define RADEON_DEFAULT_BUFFER_SIZE 2 /* MB (must be page aligned) */ @@ -52,10 +50,6 @@ #define RADEON_CARD_TYPE_RADEON 1 -#define RADEONCP_USE_RING_BUFFER(m) \ - (((m) == RADEON_CSQ_PRIBM_INDDIS) || \ - ((m) == RADEON_CSQ_PRIBM_INDBM)) - typedef struct { /* DRI screen private data */ int deviceID; /* PCI device ID */ diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 3de50c65..a4814913 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -2164,13 +2164,6 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn) "Direct rendering experimental on RS400/Xpress 200 enabled\n"); } - if (xf86ReturnOptValBool(info->Options, OPTION_CP_PIO, FALSE)) { - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Forcing CP into PIO mode\n"); - info->CPMode = RADEON_DEFAULT_CP_PIO_MODE; - } else { - info->CPMode = RADEON_DEFAULT_CP_BM_MODE; - } - info->gartSize = RADEON_DEFAULT_GART_SIZE; info->ringSize = RADEON_DEFAULT_RING_SIZE; info->bufSize = RADEON_DEFAULT_BUFFER_SIZE; |