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The compat header takes care of the old server vs new server.
this commit was autogenerated from util/modular/x-driver-screen-scrn-conv.sh
Signed-off-by: Dave Airlie <airlied@redhat.com>
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RADEONRestore() calls crtc->funcs->dpms() after most of the mode setting
subsystems have been restored. This function enables the CRTCs but does
more: it calls DRM pre- and post-modeset ioctls and sets up the palettes
(LUTs).
None of these two things are needed. Accessing the palette registers after
restoring the PLLs can even lead to lockups.
Thus the CRTC DPMS function is split into two parts: one that just enables
/disables the CRTC and one which wraps this function and does the rest.
Now the inner function can be called directly from RADEONRestore() as
there is no need to go thru the RandR hooks in this function while the
RandR hook uses the wrappering function so the full functionality is
preserved from an RandR point of view.
Signed-off-by: Egbert Eich <eich@freedesktop.org>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
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The reintroduction of palette save/restore in 5efdf514 causes some
pre-AVIVO chips to lock up. An investigation revealed that accessing
palette registers when the associated PLL is not running is causing
this. With UMS the PLL setup that is saved has been done by the BIOS
typically.
A similar issue was observed when VGA palette save/restore had
been reinitroduced with 80eee856:
http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=480312
and has been worked around for Linux without further investigation
by 87e66ce7.
To fix the issue we now
a. introduce 'on-demand' palette saving (ie the palette is
saved before it is first altered). This guarantees that
the palette register are only associated when the associated
CRTC is active and thus the PLLs are powered up and running.
b. move palette restore before PLL restore.
c. eliminate generic VGA palette save/restore which seems to be
unneeded when the palette is restored natively.
It is believed that this caused the behavior described in
https://bugs.freedesktop.org/show_bug.cgi?id=18407#c27
Signed-off-by: Egbert Eich <eich@freedesktop.org>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
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Pointed out by clang:
../../src/radeon_crtc.c:242:18: error: comparison of unsigned expression < 0 is always false [-Werror,-Wtautological-compare]
error = error < 0 ? 0xffffffff : error;
~~~~~ ^ ~
If a UMS regression is bisected to this commit, the assignment should probably
just be removed, as it's a no-op in the current form.
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Accel not enabled yet.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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Fixes deprecation warnings with xserver master and should also work with older
xservers.
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Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=28494
https://bugzilla.redhat.com/show_bug.cgi?id=554967
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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tv-out on atom systems is very particular about it's
dividers. force it to use the old algo.
Should fix fdo bug 27593.
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fixes fdo bug 26897
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Also, define RADEON_BUFFER_ALIGN in terms of it, and replace some
RADEON_ALIGN(x, RADEON_BUFFER_ALIGN) with RADEON_ALIGN(x,
RADEON_GPU_PAGE_SIZE) since this is really what was intended.
CC: Jerome Glisse <jglisse@redhat.com>
CC: Alex Deucher <alexdeucher@gmail.com>
CC: Dave Airlie <airlied@redhat.com>
Signed-off-by: Matt Turner <mattst88@gmail.com>
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matches previous behavior
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- add support for pre-avivo chips
- add support for fixed post/ref dividers
- add support for non-fractional fb dividers
By default avivo chips use the new algo and
pre-avivo chips use the old algo. Use the
"NewPLL" option to toggle between them (set to
TRUE for the new algo, FALSE for the old).
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KMS doesn't have acceleration for upload to vram. memcpy/memmove to VRAM
directly is very slow (40M/s in benchmark) which causes visible problems
to video.
Allocating video buffer in GTT will give good performance (350-450M/s)
for memmove operation. This is nice performance boost for Xv under KMS.
Signed-off-by: Pauli Nieminen <suokkos@gmail.com>
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add new fixed post divider option
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This should hopefully help the problems with flickering
and blinking monitors reported on some systems. If there
are problems, the old PLL algorithm can be selected with:
Option "NewPLL" "FALSE"
in the device section of your X config.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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This appears to be needed when using fractional feedback
dividers. Based on a patch from Tom Hirst. See fdo
bug 22229 for more details.
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- atom dpms was unblanking for standby/suspend
- return if r600+ in radeon_crtc_modeset_ioctl()
- remove seprate standby/suspend handling in legacy
crtc dpms. we turn the outputs off, so turn the
crtcs off too.
- disable the crtcs in legacy crtc dpms
- move radeon_crtc_modeset_ioctl() calls to radeon_crtc_dpms()
so they will get called for both atom and legacy paths
Should fix bug 21321
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Doesn't seem to work well in all cases. Needs more investigation.
fixes bug 21413
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Allows us to hit dot clocks much closer, especially on
chips with non-27 Mhz reference clocks like most IGP chips.
This should fix most flickering and blanking problems with
non-exact dot clocks.
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This reverts commit f8c7d6a6162196a743f6885ecaf63ba50de1722a.
This is apparently still needed for some setups, however, I can't
reproduce this locally anymore.
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All radeons have them. Thanks to Yang Zhao for figuring
this out.
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If set, enables the use of atombios for modesetting
on r4xx cards.
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low 2 bits of X need to be 0.
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git+ssh://agd5f@git.freedesktop.org/git/xorg/driver/xf86-video-ati
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If the crtc timing isn't setup, you might get stuck in a loop
in the BlankCRTC command table
fixes bug 16781
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Fixes bug 18068
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This is a setup patch for the kms/memory management code.
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should fix bug 17317
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modelled after Matthias' similar rhd change
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based on Matthias' similar work in rhd
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Seems higher dotclocks prefer a higher FB div.
Someone with a lot of should try and find out where
the div sweet spots are for various dotclock ranges.
fixes bug 17125
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- support for LB allocation
- MC priority bumps for display1/2 on RV515 variants and RS690
If you are having display underflow problems (flickering on sides of
screen in high res modes, etc.) on RV515 or RS690 boards, try setting:
Option "DisplayPriority" "HIGH" in your config.
- still no support for full display watermark programming yet
Something similar might be useful in rhd as well.
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- makes crtc1 and crtc2 watermark setup independant.
- fixes the case where only crtc2 is active
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Patch from Jiří Paleček (see debian bug 465864) with some tweaks
by me.
- abort rather than programming bad dividers if no pll dividers can be found
- improve the pll selection algorithm
- in general, prefer lower ref dividers
I've tested this patch on a wide variety of chips (r1xx-r6xx) and clocks.
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This fixes some occasional mode change problems with multiple heads active.
It seems radeons generally like to turn on the whole output/crtc setup
in one shot.
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As has been done with xf86-video-intel, replace all CARD* datatypes with
uint*_t datatypes available from stdint.h.
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- free rotate pixmaps on VT switch
- save crtc/output status so we only turn on
crtcs/outputs if they are off
- show/hide cursors when changing modes
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