cirrus initial pci access support

5 files changed, 191 insertions, 25 deletions

diff --git a/src/alp_driver.c b/src/alp_driver.c
index 6d17b37..9f09b36 100644
--- a/src/alp_driver.c
+++ b/src/alp_driver.c
@@ -570,9 +570,9 @@ AlpPreInit(ScrnInfoPtr pScrn, int flags)
 	pCir->Chipset = pCir->pEnt->chipset;
 	/* Find the PCI info for this screen */
 	pCir->PciInfo = xf86GetPciInfoForEntity(pCir->pEnt->index);
-	pCir->PciTag = pciTag(pCir->PciInfo->bus,
-									pCir->PciInfo->device,
-									pCir->PciInfo->func);
+	pCir->PciTag = pciTag(PCI_DEV_BUS(pCir->PciInfo),
+			      PCI_DEV_DEV(pCir->PciInfo),
+			      PCI_DEV_FUNC(pCir->PciInfo));
 
     if (xf86LoadSubModule(pScrn, "int10")) {
 	xf86LoaderReqSymLists(int10Symbols,NULL);
@@ -583,8 +583,9 @@ AlpPreInit(ScrnInfoPtr pScrn, int flags)
 	 * This is a hack: We restore the PCI base regs as some Colorgraphic
 	 * BIOSes tend to mess them up
 	 */
-	pciWriteLong(pCir->PciTag,0x10,pCir->PciInfo->memBase[0]);
-	pciWriteLong(pCir->PciTag,0x14,pCir->PciInfo->memBase[1]);
+
+	PCI_WRITE_LONG(pCir->PciInfo, 0x10, PCI_REGION_BASE(pCir->PciInfo, 0, REGION_MEM));
+	PCI_WRITE_LONG(pCir->PciInfo, 0x14, PCI_REGION_BASE(pCir->PciInfo, 1, REGION_MEM));
 	
     }
 
@@ -684,7 +685,7 @@ AlpPreInit(ScrnInfoPtr pScrn, int flags)
 		xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
 			pCir->ChipRev);
 	} else {
-		pCir->ChipRev = pCir->PciInfo->chipRev;
+ 	        pCir->ChipRev = PCI_DEV_REVISION(pCir->PciInfo);
 	}
 
 	/* Find the frame buffer base address */
@@ -698,10 +699,10 @@ AlpPreInit(ScrnInfoPtr pScrn, int flags)
 		pCir->FbAddress = pCir->pEnt->device->MemBase;
 		from = X_CONFIG;
 	} else {
-		if (pCir->PciInfo->memBase[0] != 0) {
+		if (PCI_REGION_BASE(pCir->PciInfo, 0, REGION_MEM) != 0) {
 			/* 5446B and 5480 use mask of 0xfe000000.
 			   5446A uses 0xff000000. */
-			pCir->FbAddress = pCir->PciInfo->memBase[0] & 0xff000000;
+			pCir->FbAddress = PCI_REGION_BASE(pCir->PciInfo, 0, REGION_MEM) & 0xff000000;
 			from = X_PROBED;
 		} else {
 			xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -724,8 +725,8 @@ AlpPreInit(ScrnInfoPtr pScrn, int flags)
 	    pCir->IOAddress = pCir->pEnt->device->IOBase;
 		from = X_CONFIG;
 	} else {
-		if (pCir->PciInfo->memBase[1] != 0) {
-			pCir->IOAddress = pCir->PciInfo->memBase[1] & 0xfffff000;
+		if (PCI_REGION_BASE(pCir->PciInfo, 1, REGION_MEM) != 0) {
+			pCir->IOAddress = PCI_REGION_BASE(pCir->PciInfo, 1, REGION_MEM) & 0xfffff000;
 			from = X_PROBED;
 		} else {
 			xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
diff --git a/src/cir.h b/src/cir.h
index ccd43da..904d9cc 100644
--- a/src/cir.h
+++ b/src/cir.h
@@ -11,6 +11,8 @@
 #include <string.h>
 #include <stdlib.h>
 
+#include "cir_pcirename.h"
+
 /* Card-specific driver information */
 #define CIRPTR(p) ((CirPtr)((p)->driverPrivate))
 struct lgRec;
@@ -34,8 +36,8 @@ typedef struct {
 	Bool			HasFBitBlt;
 	CARD32			IOAddress;
 	CARD32			FbAddress;
-	unsigned char *		IOBase;
-	unsigned char *		FbBase;
+	void *			IOBase;
+	void *			FbBase;
 	long			FbMapSize;
 	long			IoMapSize;
 	int			MinClock;
diff --git a/src/cir_driver.c b/src/cir_driver.c
index 648b6c3..1942b15 100644
--- a/src/cir_driver.c
+++ b/src/cir_driver.c
@@ -252,7 +252,8 @@ CIRProbe(DriverPtr drv, int flags)
 					  &devSections)) <= 0) {
 	return FALSE;
     }
-    
+
+#ifndef XSERVER_LIBPCIACCESS    
     if (xf86GetPciVideoInfo() == NULL) {
 	/*
 	 * We won't let anything in the config file override finding no
@@ -260,6 +261,7 @@ CIRProbe(DriverPtr drv, int flags)
 	 */
 	return FALSE;
     }
+#endif
   
     numUsed = xf86MatchPciInstances(CIR_NAME, PCI_VENDOR_CIRRUS,
 				    CIRChipsets, CIRPciChipsets, devSections,
@@ -278,10 +280,10 @@ CIRProbe(DriverPtr drv, int flags)
  	   own driver). */
 	pPci = xf86GetPciInfoForEntity(usedChips[i]);
 	pScrn = NULL;
- 	if (pPci && (pPci->chipType == PCI_CHIP_GD5462 ||
- 	    pPci->chipType == PCI_CHIP_GD5464 ||
- 	    pPci->chipType == PCI_CHIP_GD5464BD ||
- 	    pPci->chipType == PCI_CHIP_GD5465)) {
+ 	if (pPci && (PCI_DEV_DEVICE_ID(pPci) == PCI_CHIP_GD5462 ||
+		     PCI_DEV_DEVICE_ID(pPci) == PCI_CHIP_GD5464 ||
+		     PCI_DEV_DEVICE_ID(pPci) == PCI_CHIP_GD5464BD ||
+		     PCI_DEV_DEVICE_ID(pPci) == PCI_CHIP_GD5465)) {
  	    
  	    if (!lg_loaded) {
  		if (!xf86LoadDrvSubModule(drv, "cirrus_laguna")) 
@@ -331,12 +333,27 @@ CirMapMem(CirPtr pCir, int scrnIndex)
 	 * Map the frame buffer.
 	 */
 	if (pCir->FbMapSize) {
+
+#ifndef XSERVER_LIBPCIACCESS
 	    
 	    pCir->FbBase = xf86MapPciMem(scrnIndex, VIDMEM_FRAMEBUFFER,
 					 pCir->PciTag, pCir->FbAddress,
 					 pCir->FbMapSize);
 	    if (pCir->FbBase == NULL)
 		return FALSE;
+
+#else
+	    void** result = (void**)&pCir->FbBase;
+	    int err = pci_device_map_range(pCir->PciInfo,
+					   pCir->FbAddress,
+					   pCir->FbMapSize,
+					   PCI_DEV_MAP_FLAG_WRITABLE |
+					   PCI_DEV_MAP_FLAG_WRITE_COMBINE,
+					   result);
+
+	    if (err) 
+	      return FALSE;
+#endif
 	}
 	
 #ifdef CIR_DEBUG
@@ -349,17 +366,33 @@ CirMapMem(CirPtr pCir, int scrnIndex)
 	if (pCir->IOAddress == 0) {
 		pCir->IOBase = NULL; /* Until we are ready to use MMIO */
 	} else {
+
+#ifndef XSERVER_LIBPCIACCESS
 		mmioFlags = VIDMEM_MMIO;
 		/*
 		 * For Alpha, we need to map SPARSE memory, since we need
 		 * byte/short access.  Common-level will automatically use
 		 * sparse mapping for MMIO.
 		 */
+
 		pCir->IOBase =
 		  xf86MapPciMem(scrnIndex, mmioFlags, pCir->PciTag,
 		       	        pCir->IOAddress, pCir->IoMapSize);
 		if (pCir->IOBase == NULL)
 			return FALSE;
+
+#else
+		void** result = (void**)&pCir->IOBase;
+		int err = pci_device_map_range(pCir->PciInfo,
+					       pCir->IOAddress,
+					       pCir->IoMapSize,
+					       PCI_DEV_MAP_FLAG_WRITABLE,
+					       result);
+		
+		if (err) 
+			return FALSE;
+		
+#endif
 	}
 
 #ifdef CIR_DEBUG
@@ -388,11 +421,19 @@ CirUnmapMem(CirPtr pCir, int scrnIndex)
 		/*
 		 * Unmap IO registers to virtual address space
 		 */
+#ifndef XSERVER_LIBPCIACCESS
 		xf86UnMapVidMem(scrnIndex, (pointer)pCir->IOBase, pCir->IoMapSize);
+#else
+		pci_device_unmap_range(pCir->PciInfo, (pointer)pCir->IOBase, pCir->IoMapSize);
+#endif
 		pCir->IOBase = NULL;
 	}
 
+#ifndef XSERVER_LIBPCIACCESS
 	xf86UnMapVidMem(scrnIndex, (pointer)pCir->FbBase, pCir->FbMapSize);
+#else
+	pci_device_unmap_range(pCir->PciInfo, (pointer)pCir->FbBase, pCir->FbMapSize);
+#endif
 	pCir->FbBase = NULL;
 	return TRUE;
 }
diff --git a/src/cir_pcirename.h b/src/cir_pcirename.h
new file mode 100644
index 0000000..f0f5cf8
--- /dev/null
+++ b/src/cir_pcirename.h
@@ -0,0 +1,122 @@
+/*
+ * Copyright 2007 George Sapountzis
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/**
+ * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess
+ * library. The main purpose being to facilitate source code compatibility.
+ */
+
+#ifndef CIRPCIRENAME_H
+#define CIRPCIRENAME_H
+
+enum region_type {
+    REGION_MEM,
+    REGION_IO 
+};
+
+#ifndef XSERVER_LIBPCIACCESS
+
+/* pciVideoPtr */
+#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor)
+#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType)
+#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->chipRev)
+
+#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor)
+#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard)
+
+#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus,    \
+                                    (_pcidev)->device, \
+                                    (_pcidev)->func)
+#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
+#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->device)
+#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
+
+/* pciConfigPtr */
+#define PCI_CFG_TAG(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->tag)
+#define PCI_CFG_BUS(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->busnum)
+#define PCI_CFG_DEV(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->devnum)
+#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum)
+
+/* region addr: xfree86 uses different fields for memory regions and I/O ports */
+#define PCI_REGION_BASE(_pcidev, _b, _type)             \
+    (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \
+                             : (_pcidev)->ioBase[(_b)])
+
+/* region size: xfree86 uses the log2 of the region size,
+ * but with zero meaning no region, not size of one XXX */
+#define PCI_REGION_SIZE(_pcidev, _b) \
+    (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0)
+
+/* read/write PCI configuration space */
+#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
+    *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset))
+
+#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
+    *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset))
+
+#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
+    pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value))
+
+#else /* XSERVER_LIBPCIACCESS */
+
+typedef struct pci_device *pciVideoPtr;
+
+#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id)
+#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id)
+#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->revision)
+
+#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id)
+#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id)
+
+/* pci-rework functions take a 'pci_device' parameter instead of a tag */
+#define PCI_DEV_TAG(_pcidev)        (_pcidev)
+
+/* PCI_DEV macros, typically used in printf's, add domain ? XXX */
+#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
+#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->dev)
+#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
+
+/* pci-rework functions take a 'pci_device' parameter instead of a tag */
+#define PCI_CFG_TAG(_pcidev)        (_pcidev)
+
+/* PCI_CFG macros, typically used in DRI init, contain the domain */
+#define PCI_CFG_BUS(_pcidev)      (((_pcidev)->domain << 8) | \
+                                    (_pcidev)->bus)
+#define PCI_CFG_DEV(_pcidev)       ((_pcidev)->dev)
+#define PCI_CFG_FUNC(_pcidev)      ((_pcidev)->func)
+
+#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr)
+#define PCI_REGION_SIZE(_pcidev, _b)        ((_pcidev)->regions[(_b)].size)
+
+#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
+    pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset))
+
+#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
+    pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset))
+
+#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
+    pci_device_cfg_write_u32((_pcidev), (_value), (_offset))
+
+#endif /* XSERVER_LIBPCIACCESS */
+
+#endif /* CIRPCIRENAME_H */
diff --git a/src/lg_driver.c b/src/lg_driver.c
index 7dab5e8..c731f61 100644
--- a/src/lg_driver.c
+++ b/src/lg_driver.c
@@ -457,9 +457,9 @@ LgPreInit(ScrnInfoPtr pScrn, int flags)
 
 	/* Find the PCI info for this screen */
 	pCir->PciInfo = xf86GetPciInfoForEntity(pCir->pEnt->index);
-	pCir->PciTag = pciTag(pCir->PciInfo->bus,
-								pCir->PciInfo->device,
-								pCir->PciInfo->func);
+	pCir->PciTag = pciTag(PCI_DEV_BUS(pCir->PciInfo),
+			      PCI_DEV_DEV(pCir->PciInfo),
+			      PCI_DEV_FUNC(pCir->PciInfo));
 
 	if (xf86LoadSubModule(pScrn, "int10")) {
 	    xf86Int10InfoPtr int10InfoPtr;
@@ -560,7 +560,7 @@ LgPreInit(ScrnInfoPtr pScrn, int flags)
 		xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
 			pCir->ChipRev);
 	} else {
-		pCir->ChipRev = pCir->PciInfo->chipRev;
+	        pCir->ChipRev = PCI_DEV_REVISION(pCir->PciInfo);
 	}
 
 	/* Cirrus swapped the FB and IO registers in the 5465 (by design). */
@@ -584,8 +584,8 @@ LgPreInit(ScrnInfoPtr pScrn, int flags)
 		pCir->FbAddress = pCir->pEnt->device->MemBase;
 		from = X_CONFIG;
 	} else {
-		if (pCir->PciInfo->memBase[fbPCIReg] != 0) {
-			pCir->FbAddress = pCir->PciInfo->memBase[fbPCIReg] & 0xff000000;
+		if (PCI_REGION_BASE(pCir->PciInfo, fbPCIReg, REGION_MEM) != 0) {
+			pCir->FbAddress = PCI_REGION_BASE(pCir->PciInfo, fbPCIReg, REGION_MEM) & 0xff000000;
 			from = X_PROBED;
 		} else {
 			xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -609,8 +609,8 @@ LgPreInit(ScrnInfoPtr pScrn, int flags)
 		pCir->IOAddress = pCir->pEnt->device->IOBase;
 		from = X_CONFIG;
 	} else {
-		if (pCir->PciInfo->memBase[ioPCIReg] != 0) {
-			pCir->IOAddress = pCir->PciInfo->memBase[ioPCIReg] & 0xfffff000;
+		if (PCI_REGION_BASE(pCir->PciInfo, ioPCIReg, REGION_MEM) != 0) {
+			pCir->IOAddress = PCI_REGION_BASE(pCir->PciInfo, ioPCIReg, REGION_MEM) & 0xfffff000;
 			from = X_PROBED;
 		} else {
 			xf86DrvMsg(pScrn->scrnIndex, X_ERROR,