diff options
| author | Jordan Crouse <jordan.crouse@amd.com> | 2007-04-11 13:37:02 -0600 |
|---|---|---|
| committer | Jordan Crouse <jordan.crouse@amd.com> | 2007-04-11 13:37:52 -0600 |
| commit | 8bfed84a1f972325cdf61876d7f7dfd0e8f0d4d5 (patch) | |
| tree | f2fc2c5527a285a0cfa4d7a843026c22c6955482 /src/cim/cim_defs.h | |
| parent | 2d7689990c19fd74d5fad11bcf6317a7874a6057 (diff) | |
Add Linux MSR suport for LX
Extend the GX MSR support to LX - this is to support the VSAless
OFW, and share code.
Diffstat (limited to 'src/cim/cim_defs.h')
| -rw-r--r-- | src/cim/cim_defs.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/src/cim/cim_defs.h b/src/cim/cim_defs.h index 176bdb4..eea2f49 100644 --- a/src/cim/cim_defs.h +++ b/src/cim/cim_defs.h @@ -282,6 +282,33 @@ wrmsr(addr, val1, val2); \ } +#elif CIMARRON_MSR_HOOKS + + +#define MSR_READ(msr_reg, device_add, data64_ptr) \ +{ \ + unsigned long addr, val1, val2; \ + \ + addr = device_add | msr_reg; \ + if (cim_rdmsr) { \ + cim_rdmsr (addr, &val1, &val2); \ + \ + ((Q_WORD *)(data64_ptr))->high = val2; \ + ((Q_WORD *)(data64_ptr))->low = val1; \ + } \ +} + +#define MSR_WRITE(msr_reg, device_add, data64_ptr) \ +{ \ + unsigned long addr, val1, val2; \ + \ + val2 = ((Q_WORD *)(data64_ptr))->high; \ + val1 = ((Q_WORD *)(data64_ptr))->low; \ + \ + addr = (device_add & 0xFFFF0000) | (unsigned long)msr_reg; \ + if (cim_wrmsr) \ + cim_wrmsr(addr, val1, val2); \ +} #endif #endif /* #ifdef CIMARRON_INCLUDE_MSR_MACROS */ @@ -728,4 +755,7 @@ cim_outb(unsigned short port, unsigned char data) #endif /* CIMARRON_INCLUDE_IO_MACROS */ +extern void (*cim_rdmsr)(unsigned long, unsigned long *, unsigned long *); +extern void (*cim_wrmsr)(unsigned long, unsigned long, unsigned long); + #endif |