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path: root/src/gfx/vga_gu1.c
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Diffstat (limited to 'src/gfx/vga_gu1.c')
-rw-r--r--src/gfx/vga_gu1.c356
1 files changed, 178 insertions, 178 deletions
diff --git a/src/gfx/vga_gu1.c b/src/gfx/vga_gu1.c
index 20cf232..8cbfe4f 100644
--- a/src/gfx/vga_gu1.c
+++ b/src/gfx/vga_gu1.c
@@ -60,189 +60,189 @@ int gu1_detect_vsa2(void);
gfx_vga_struct gfx_vga_modes[] = {
/*--------------------------------------------------------------------------*/
{
- 640, 480, 60, /* 640x480 */
- 25, /* 25 MHz clock = 60 Hz refresh rate */
- 0xE3, /* miscOutput register */
- {
- 0x5F, 0x4F, 0x50, 0x82, 0x54, 0x80, 0x0B, 0x3E,
- /* standard CRTC */
- 0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0xEA, 0x0C, 0xDF, 0x50, 0x00, 0xE7, 0x04, 0xE3, 0xFF},
- {
- 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
- /* extended CRTC */
- 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00}
- },
+ 640, 480, 60, /* 640x480 */
+ 25, /* 25 MHz clock = 60 Hz refresh rate */
+ 0xE3, /* miscOutput register */
+ {
+ 0x5F, 0x4F, 0x50, 0x82, 0x54, 0x80, 0x0B, 0x3E,
+ /* standard CRTC */
+ 0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0xEA, 0x0C, 0xDF, 0x50, 0x00, 0xE7, 0x04, 0xE3, 0xFF},
+ {
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
+ /* extended CRTC */
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00}
+ },
/*--------------------------------------------------------------------------*/
{
- 640, 480, 72, /* 640x480 */
- 29, /* 29 MHz clock = 72 Hz refresh rate */
- 0xE3, /* miscOutput register */
- {
- 0x63, 0x4f, 0x50, 0x86, 0x55, 0x99, 0x06, 0x3e,
- /* standard CRTC */
- 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0xe9, 0x0c, 0xdf, 0x00, 0x00, 0xe7, 0x00, 0xe3, 0xff},
- {
- 0x6D, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x00,
- /* extended CRTC */
- 0x00, 0x00, 0x01, 0x08, 0x80, 0x1F, 0x00, 0x4B}
- },
+ 640, 480, 72, /* 640x480 */
+ 29, /* 29 MHz clock = 72 Hz refresh rate */
+ 0xE3, /* miscOutput register */
+ {
+ 0x63, 0x4f, 0x50, 0x86, 0x55, 0x99, 0x06, 0x3e,
+ /* standard CRTC */
+ 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0xe9, 0x0c, 0xdf, 0x00, 0x00, 0xe7, 0x00, 0xe3, 0xff},
+ {
+ 0x6D, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x00,
+ /* extended CRTC */
+ 0x00, 0x00, 0x01, 0x08, 0x80, 0x1F, 0x00, 0x4B}
+ },
/*--------------------------------------------------------------------------*/
{
- 640, 480, 75, /* 640x480 */
- 31,
- /* 31.5 MHz clock = 75 Hz refresh rate */
- 0xE3, /* miscOutput register */
- {
- 0x64, 0x4F, 0x4F, 0x88, 0x54, 0x9B, 0xF2, 0x1F,
- /* standard CRTC */
- 0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0xE1, 0x04, 0xDF, 0x50, 0x00, 0xDF, 0xF3, 0xE3, 0xFF},
- {
- 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
- /* extended CRTC */
- 0x00, 0x00, 0x00, 0x03, 0x80, 0x1F, 0x00, 0x00}
- },
+ 640, 480, 75, /* 640x480 */
+ 31,
+ /* 31.5 MHz clock = 75 Hz refresh rate */
+ 0xE3, /* miscOutput register */
+ {
+ 0x64, 0x4F, 0x4F, 0x88, 0x54, 0x9B, 0xF2, 0x1F,
+ /* standard CRTC */
+ 0x80, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0xE1, 0x04, 0xDF, 0x50, 0x00, 0xDF, 0xF3, 0xE3, 0xFF},
+ {
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
+ /* extended CRTC */
+ 0x00, 0x00, 0x00, 0x03, 0x80, 0x1F, 0x00, 0x00}
+ },
/*--------------------------------------------------------------------------*/
{
- 800, 600, 60, /* 800x600 */
- 40, /* 40 MHz clock = 60 Hz refresh rate */
- 0x23, /* miscOutput register */
- {
- 0x7F, 0x63, 0x64, 0x82, 0x6B, 0x1B, 0x72, 0xF0,
- /* standard CRTC */
- 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x59, 0x0D, 0x57, 0x64, 0x00, 0x57, 0x73, 0xE3, 0xFF},
- {
- 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
- /* extended CRTC */
- 0x00, 0x00, 0x00, 0x03, 0x80, 0x28, 0x00, 0x00}
- },
+ 800, 600, 60, /* 800x600 */
+ 40, /* 40 MHz clock = 60 Hz refresh rate */
+ 0x23, /* miscOutput register */
+ {
+ 0x7F, 0x63, 0x64, 0x82, 0x6B, 0x1B, 0x72, 0xF0,
+ /* standard CRTC */
+ 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x59, 0x0D, 0x57, 0x64, 0x00, 0x57, 0x73, 0xE3, 0xFF},
+ {
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
+ /* extended CRTC */
+ 0x00, 0x00, 0x00, 0x03, 0x80, 0x28, 0x00, 0x00}
+ },
/*--------------------------------------------------------------------------*/
{
- 800, 600, 72, /* 800x600 */
- 47, /* 47 MHz clock = 72 Hz refresh rate */
- 0x2B, /* miscOutput register */
- {
- 0x7D, 0x63, 0x63, 0x81, 0x6D, 0x1B, 0x98, 0xF0,
- /* standard CRTC */
- 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x7D, 0x03, 0x57, 0x00, 0x00, 0x57, 0x9A, 0xE3, 0xFF},
- {
- 0x6F, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x00,
- /* extended CRTC */
- 0x00, 0x00, 0x01, 0x08, 0x80, 0x32, 0x00, 0x4B}
- },
+ 800, 600, 72, /* 800x600 */
+ 47, /* 47 MHz clock = 72 Hz refresh rate */
+ 0x2B, /* miscOutput register */
+ {
+ 0x7D, 0x63, 0x63, 0x81, 0x6D, 0x1B, 0x98, 0xF0,
+ /* standard CRTC */
+ 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x7D, 0x03, 0x57, 0x00, 0x00, 0x57, 0x9A, 0xE3, 0xFF},
+ {
+ 0x6F, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x00,
+ /* extended CRTC */
+ 0x00, 0x00, 0x01, 0x08, 0x80, 0x32, 0x00, 0x4B}
+ },
/*--------------------------------------------------------------------------*/
{
- 800, 600, 75, /* 800x600 */
- 49,
- /* 49.5 MHz clock = 75 Hz refresh rate */
- 0x23, /* miscOutput register */
- {
- 0x7F, 0x63, 0x63, 0x83, 0x68, 0x11, 0x6F, 0xF0,
- /* standard CRTC */
- 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x59, 0x1C, 0x57, 0x64, 0x00, 0x57, 0x70, 0xE3, 0xFF},
- {
- 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
- /* extended CRTC */
- 0x00, 0x00, 0x00, 0x03, 0x80, 0x31, 0x00, 0x00}
- },
+ 800, 600, 75, /* 800x600 */
+ 49,
+ /* 49.5 MHz clock = 75 Hz refresh rate */
+ 0x23, /* miscOutput register */
+ {
+ 0x7F, 0x63, 0x63, 0x83, 0x68, 0x11, 0x6F, 0xF0,
+ /* standard CRTC */
+ 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x59, 0x1C, 0x57, 0x64, 0x00, 0x57, 0x70, 0xE3, 0xFF},
+ {
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
+ /* extended CRTC */
+ 0x00, 0x00, 0x00, 0x03, 0x80, 0x31, 0x00, 0x00}
+ },
/*--------------------------------------------------------------------------*/
{
- 1024, 768, 60, /* 1024x768 */
- 65, /* 65 MHz clock = 60 Hz refresh rate */
- 0xE3, /* miscOutput register */
- {
- 0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xF5,
- /* standard CRTC */
- 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x04, 0x0A, 0xFF, 0x80, 0x00, 0xFF, 0x25, 0xE3, 0xFF},
- {
- 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
- /* extended CRTC */
- 0x00, 0x00, 0x00, 0x03, 0x80, 0x41, 0x00, 0x00}
- },
+ 1024, 768, 60, /* 1024x768 */
+ 65, /* 65 MHz clock = 60 Hz refresh rate */
+ 0xE3, /* miscOutput register */
+ {
+ 0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xF5,
+ /* standard CRTC */
+ 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x04, 0x0A, 0xFF, 0x80, 0x00, 0xFF, 0x25, 0xE3, 0xFF},
+ {
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
+ /* extended CRTC */
+ 0x00, 0x00, 0x00, 0x03, 0x80, 0x41, 0x00, 0x00}
+ },
/*--------------------------------------------------------------------------*/
{
- 1024, 768, 70, /* 1024x768 */
- 76, /* 76 MHz clock = 70 Hz refresh rate */
- 0x2B, /* miscOutput register */
- {
- 0xA1, 0x7F, 0x7F, 0x85, 0x85, 0x95, 0x24, 0xF5,
- /* standard CRTC */
- 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x03, 0x09, 0xFF, 0x00, 0x00, 0xFF, 0x26, 0xE3, 0xFF},
- {
- 0x62, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x00,
- /* extended CRTC */
- 0x00, 0x00, 0x01, 0x02, 0x80, 0x4B, 0x00, 0x4B}
- },
+ 1024, 768, 70, /* 1024x768 */
+ 76, /* 76 MHz clock = 70 Hz refresh rate */
+ 0x2B, /* miscOutput register */
+ {
+ 0xA1, 0x7F, 0x7F, 0x85, 0x85, 0x95, 0x24, 0xF5,
+ /* standard CRTC */
+ 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x03, 0x09, 0xFF, 0x00, 0x00, 0xFF, 0x26, 0xE3, 0xFF},
+ {
+ 0x62, 0x00, 0x00, 0x03, 0x00, 0x01, 0x01, 0x00,
+ /* extended CRTC */
+ 0x00, 0x00, 0x01, 0x02, 0x80, 0x4B, 0x00, 0x4B}
+ },
/*--------------------------------------------------------------------------*/
{
- 1024, 768, 75, /* 1024x768 */
- 79, /* 79 MHz clock = 75 Hz refresh rate */
- 0xE3, /* miscOutput register */
- {
- 0x9F, 0x7F, 0x7F, 0x83, 0x84, 0x8F, 0x1E, 0xF5,
- /* standard CRTC */
- 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x01, 0x04, 0xFF, 0x80, 0x00, 0xFF, 0x1F, 0xE3, 0xFF},
- {
- 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
- /* extended CRTC */
- 0x00, 0x00, 0x00, 0x03, 0x80, 0x4F, 0x00, 0x00}
- },
+ 1024, 768, 75, /* 1024x768 */
+ 79, /* 79 MHz clock = 75 Hz refresh rate */
+ 0xE3, /* miscOutput register */
+ {
+ 0x9F, 0x7F, 0x7F, 0x83, 0x84, 0x8F, 0x1E, 0xF5,
+ /* standard CRTC */
+ 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x01, 0x04, 0xFF, 0x80, 0x00, 0xFF, 0x1F, 0xE3, 0xFF},
+ {
+ 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
+ /* extended CRTC */
+ 0x00, 0x00, 0x00, 0x03, 0x80, 0x4F, 0x00, 0x00}
+ },
/*--------------------------------------------------------------------------*/
{
- 1280, 1024, 60, /* 1280x1024 */
- 108,
- /* 108 MHz clock = 60 Hz refresh rate */
- 0x23, /* miscOutput register */
- {
- 0xCF, 0x9F, 0xA0, 0x92, 0xAA, 0x19, 0x28, 0x52,
- /* standard CRTC */
- 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x01, 0x04, 0xFF, 0xA0, 0x00, 0x00, 0x29, 0xE3, 0xFF},
- {
- 0x00, 0x51, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
- /* extended CRTC */
- 0x00, 0x00, 0x00, 0x03, 0x80, 0x6C, 0x00, 0x00}
- },
+ 1280, 1024, 60, /* 1280x1024 */
+ 108,
+ /* 108 MHz clock = 60 Hz refresh rate */
+ 0x23, /* miscOutput register */
+ {
+ 0xCF, 0x9F, 0xA0, 0x92, 0xAA, 0x19, 0x28, 0x52,
+ /* standard CRTC */
+ 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x01, 0x04, 0xFF, 0xA0, 0x00, 0x00, 0x29, 0xE3, 0xFF},
+ {
+ 0x00, 0x51, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
+ /* extended CRTC */
+ 0x00, 0x00, 0x00, 0x03, 0x80, 0x6C, 0x00, 0x00}
+ },
/*--------------------------------------------------------------------------*/
{
- 1280, 1024, 75, /* 1280x1024 */
- 135,
- /* 135 MHz clock = 75 Hz refresh rate */
- 0x23, /* miscOutput register */
- {
- 0xCE, 0x9F, 0x9F, 0x92, 0xA4, 0x15, 0x28, 0x52,
- /* standard CRTC */
- 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x01, 0x04, 0xFF, 0xA0, 0x00, 0x00, 0x29, 0xE3, 0xFF},
- {
- 0x00, 0x51, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
- /* extended CRTC */
- 0x00, 0x00, 0x00, 0x03, 0x80, 0x87, 0x00, 0x00}
- },
+ 1280, 1024, 75, /* 1280x1024 */
+ 135,
+ /* 135 MHz clock = 75 Hz refresh rate */
+ 0x23, /* miscOutput register */
+ {
+ 0xCE, 0x9F, 0x9F, 0x92, 0xA4, 0x15, 0x28, 0x52,
+ /* standard CRTC */
+ 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x01, 0x04, 0xFF, 0xA0, 0x00, 0x00, 0x29, 0xE3, 0xFF},
+ {
+ 0x00, 0x51, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
+ /* extended CRTC */
+ 0x00, 0x00, 0x00, 0x03, 0x80, 0x87, 0x00, 0x00}
+ },
/*--------------------------------------------------------------------------*/
{
- 1280, 1024, 85, /* 1280x1024 */
- 159,
- /* 159 MHz clock = 85 Hz refresh rate */
- 0x2B, /* miscOutput register */
- {
- 0xD3, 0x9F, 0xA0, 0x98, 0xA8, 0x9C, 0x2E, 0x5A,
- /* standard CRTC */
- 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x01, 0x04, 0xFF, 0x00, 0x00, 0xFF, 0x30, 0xE3, 0xFF},
- {
- 0x6B, 0x41, 0x00, 0x03, 0x00, 0x01, 0x00, 0x00,
- /* extended CRTC */
- 0x00, 0x00, 0x01, 0x00, 0x80, 0x9D, 0x00, 0x4B}
- },
+ 1280, 1024, 85, /* 1280x1024 */
+ 159,
+ /* 159 MHz clock = 85 Hz refresh rate */
+ 0x2B, /* miscOutput register */
+ {
+ 0xD3, 0x9F, 0xA0, 0x98, 0xA8, 0x9C, 0x2E, 0x5A,
+ /* standard CRTC */
+ 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x01, 0x04, 0xFF, 0x00, 0x00, 0xFF, 0x30, 0xE3, 0xFF},
+ {
+ 0x6B, 0x41, 0x00, 0x03, 0x00, 0x01, 0x00, 0x00,
+ /* extended CRTC */
+ 0x00, 0x00, 0x01, 0x00, 0x80, 0x9D, 0x00, 0x4B}
+ },
/*--------------------------------------------------------------------------*/
};
@@ -314,7 +314,7 @@ gfx_vga_get_pci_command(void)
unsigned long value;
value = gfx_pci_config_read(0x80009404);
- return ((unsigned char)value);
+ return ((unsigned char) value);
}
/*----------------------------------------------------------------------------
@@ -333,7 +333,7 @@ gfx_vga_set_pci_command(unsigned char command)
unsigned long value;
value = gfx_pci_config_read(0x80009404) & 0xFFFFFF00;
- value |= (unsigned long)command;
+ value |= (unsigned long) command;
gfx_pci_config_write(0x80009404, value);
return (GFX_STATUS_OK);
}
@@ -351,7 +351,7 @@ int
gfx_vga_seq_reset(int reset)
{
OUTB(0x3C4, 0);
- OUTB(0x3C5, (unsigned char)(reset ? 0x00 : 0x03));
+ OUTB(0x3C5, (unsigned char) (reset ? 0x00 : 0x03));
return (GFX_STATUS_OK);
}
@@ -377,7 +377,7 @@ gfx_vga_set_graphics_bits(void)
/* SET GRAPHICS BIT IN ATTRIBUTE CONTROLLER REG 0x10 */
- INB(0x3BA); /* Reset flip-flop */
+ INB(0x3BA); /* Reset flip-flop */
INB(0x3DA);
OUTB(0x3C0, 0x10);
OUTB(0x3C0, 0x01);
@@ -409,15 +409,15 @@ gfx_vga_mode(gfx_vga_struct * vga, int xres, int yres, int bpp, int hz)
/* SET PITCH TO 1K OR 2K */
/* CRTC_EXTENDED_OFFSET index is 0x45, so offset = 0x05 */
- pitch = (unsigned short)xres;
+ pitch = (unsigned short) xres;
if (bpp > 8)
pitch <<= 1;
if (pitch <= 1024)
pitch = 1024 >> 3;
else
pitch = 2048 >> 3;
- vga->stdCRTCregs[0x13] = (unsigned char)pitch;
- vga->extCRTCregs[0x05] = (unsigned char)((pitch >> 8) & 0x03);
+ vga->stdCRTCregs[0x13] = (unsigned char) pitch;
+ vga->extCRTCregs[0x05] = (unsigned char) ((pitch >> 8) & 0x03);
/* SET PROPER COLOR DEPTH VALUE */
/* CRTC_EXTENDED_COLOR_CONTROL index is 0x46, so offset = 0x06 */
@@ -450,8 +450,8 @@ int
gfx_vga_pitch(gfx_vga_struct * vga, unsigned short pitch)
{
pitch >>= 3;
- vga->stdCRTCregs[0x13] = (unsigned char)pitch;
- vga->extCRTCregs[0x05] = (unsigned char)((pitch >> 8) & 0x03);
+ vga->stdCRTCregs[0x13] = (unsigned char) pitch;
+ vga->extCRTCregs[0x05] = (unsigned char) ((pitch >> 8) & 0x03);
return (0);
}
@@ -486,7 +486,7 @@ gfx_vga_save(gfx_vga_struct * vga, int flags)
/* SAVE STANDARD CRTC REGISTERS */
for (i = 0; i < GFX_STD_CRTC_REGS; i++) {
- OUTB(crtcindex, (unsigned char)i);
+ OUTB(crtcindex, (unsigned char) i);
vga->stdCRTCregs[i] = INB(crtcdata);
}
}
@@ -497,7 +497,7 @@ gfx_vga_save(gfx_vga_struct * vga, int flags)
/* SAVE EXTENDED CRTC REGISTERS */
for (i = 0; i < GFX_EXT_CRTC_REGS; i++) {
- OUTB(crtcindex, (unsigned char)(0x40 + i));
+ OUTB(crtcindex, (unsigned char) (0x40 + i));
vga->extCRTCregs[i] = INB(crtcdata);
}
}
@@ -524,7 +524,7 @@ gfx_vga_clear_extended(void)
OUTB(crtcdata, 0x57);
OUTB(crtcdata, 0x4C);
for (i = 0x40; i <= 0x4F; i++) {
- OUTB(crtcindex, (unsigned char)i);
+ OUTB(crtcindex, (unsigned char) i);
OUTB(crtcdata, 0);
}
OUTB(crtcindex, 0x30);
@@ -567,7 +567,7 @@ gfx_vga_restore(gfx_vga_struct * vga, int flags)
/* RESTORE STANDARD CRTC REGISTERS */
for (i = 0; i < GFX_STD_CRTC_REGS; i++) {
- OUTB(crtcindex, (unsigned char)i);
+ OUTB(crtcindex, (unsigned char) i);
OUTB(crtcdata, vga->stdCRTCregs[i]);
}
}
@@ -584,7 +584,7 @@ gfx_vga_restore(gfx_vga_struct * vga, int flags)
/* RESTORE EXTENDED CRTC REGISTERS */
for (i = 0; i < GFX_EXT_CRTC_REGS; i++) {
- OUTB(crtcindex, (unsigned char)(0x40 + i));
+ OUTB(crtcindex, (unsigned char) (0x40 + i));
OUTB(crtcdata, vga->extCRTCregs[i]);
}
@@ -600,7 +600,7 @@ gfx_vga_restore(gfx_vga_struct * vga, int flags)
/* This really should be another thing saved/restored, but */
/* Durango currently doesn't do the attr controller registers. */
- INB(0x3BA); /* Reset flip-flop */
+ INB(0x3BA); /* Reset flip-flop */
INB(0x3DA);
OUTB(0x3C0, 0x11);
OUTB(0x3C0, 0x00);
@@ -636,7 +636,7 @@ gfx_vga_mode_switch(int active)
OUTB(crtcindex, CRTC_MODE_SWITCH_CONTROL);
active = active ? 1 : 0;
- OUTB(crtcdata, (unsigned char)active);
+ OUTB(crtcdata, (unsigned char) active);
/* WAIT UNTIL SOFTVGA HAS VALIDATED MODE IF ENDING MODE SWITCH */
/* This is for VSA1 only, where SoftVGA waits until the next */
@@ -644,7 +644,7 @@ gfx_vga_mode_switch(int active)
if ((!active) && (!(gu1_detect_vsa2()))) {
OUTB(crtcindex, 0x33);
- while (INB(crtcdata) & 0x80) ;
+ while (INB(crtcdata) & 0x80);
}
/* LOCK EXTENDED CRTC REGISTERS */
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 05:54:09 +0000