diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2011-03-09 17:10:50 +0000 |
|---|---|---|
| committer | Owain G. Ainsworth <oga@openbsd.org> | 2011-05-29 23:29:15 +0100 |
| commit | 84efac2196e0481f21bc495a60e0be769e4988ee (patch) | |
| tree | 18b19d49f4034262709d8172707441814e880966 | |
| parent | 90829643d08dd1bef06bb9c27d8a8d8abaf935a1 (diff) | |
dri: Disable page-flip between a tiled buffer and a linear scanout
Keith Packard pointed out a loophole that could cause the DDX to end up
with a tiled scanout even if the user required a linear framebuffer;
that is by using page-flipping we could replace the scanout pixmap with
another of our choosing, and not necessarily tiled.
Close that loophole by only allowing an exchange of buffers between
identical tiling modes. For the common case, this is fine since they
will indeed be allocated with the same tiling. For the linear
framebuffer case with mesa using a tiled pixmap, we force it to blit
onto the scanout instead.
Reported-by: Keith Packard <keith.packard@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
(cherry picked from commit 014fc7abb7b2cc2110e3ab9a0bd6f7cff2c64c05)
Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
| -rw-r--r-- | src/intel_dri.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/intel_dri.c b/src/intel_dri.c index 4b5567e1..32d4f3b1 100644 --- a/src/intel_dri.c +++ b/src/intel_dri.c @@ -656,6 +656,8 @@ can_exchange(DRI2BufferPtr front, DRI2BufferPtr back) I830DRI2BufferPrivatePtr back_priv = back->driverPrivate; PixmapPtr front_pixmap = front_priv->pixmap; PixmapPtr back_pixmap = back_priv->pixmap; + struct intel_pixmap *front_intel = intel_get_pixmap_private(front_pixmap); + struct intel_pixmap *back_intel = intel_get_pixmap_private(back_pixmap); if (front_pixmap->drawable.width != back_pixmap->drawable.width) return FALSE; @@ -672,6 +674,10 @@ can_exchange(DRI2BufferPtr front, DRI2BufferPtr back) return FALSE; #endif + /* prevent an implicit tiling mode change */ + if (front_intel->tiling != back_intel->tiling) + return FALSE; + return TRUE; } |