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AgeCommit message (Expand)Author
2011-09-12Temporarily disable sandybridge pci ids until support is in.bleeding_edge-ogaOwain G. Ainsworth
2011-09-08program intel->front_pitch as the stride for the hardware, not the screen width.Owain G. Ainsworth
2011-09-08backlight control buglet From kettenis@:Owain G. Ainsworth
2011-07-12uxa/glyphs: Fallback instead of crashing on large stringsChris Wilson
2011-06-24Xv: set up pipeline for Xv on IvybridgeXiang, Haihao
2011-06-24Xv: upload new shaders to GEM objects for Xv on IvybridgeXiang, Haihao
2011-06-24Xv: update SURFACE_STATE & SAMPLER_STATE for Xv on IvybridgeXiang, Haihao
2011-06-24Xv: New shaders for Xv on IvybridgeXiang, Haihao
2011-06-24Xv: separate fragments from M4 macrosXiang, Haihao
2011-06-24uxa: Remove the attempt to use the 3D pipeline for core renderingChris Wilson
2011-06-24dri: Do not create DRI2 buffers for unrecognized DRI2 buffer tokensChad Versace
2011-06-24uxa: Simplify uxa_poly_fill_rect by only clipping once.Eric Anholt
2011-06-24uxa: Simplify Composite solid acceleration for spans by only clipping once.Eric Anholt
2011-06-24uxa: Simplify BLT solid acceleration for spans filling by only clipping once.Eric Anholt
2011-05-30Revert "Revert "i965: Invalidate pixmap binding location on reuse.""Owain G. Ainsworth
2011-05-30Remove the memory of Option "AccelMethod"Adam Jackson
2011-05-30dri: Flush the batch after a DRI swap/copy eventChris Wilson
2011-05-30video: Flush the batch on the next blockhandler after queuingChris Wilson
2011-05-30intel: Restore manual flush for old kernelsChris Wilson
2011-05-30Correct chipset detection for Q33, Q35, B43_G1Chris Wilson
2011-05-30module: Adopt IVB's more detailed naming convention for SNBChris Wilson
2011-05-30Whitespacing cleanup for intel_module.cChris Wilson
2011-05-30Add support for Ivybridge chipset.Eric Anholt
2011-05-30Remove the static list of PciChipset and construct it from SymTabRec instead.Eric Anholt
2011-05-30Use the existing deviceID -> name mapping in SymTabRec instead of duping it.Eric Anholt
2011-05-30Store the chipset info struct in the PCI match struct, instead of a switch().Eric Anholt
2011-05-29Ensure that the partial batch is flushed upon the blockhandlerChris Wilson
2011-05-29Add basic 30 bit depth supportJesse Barnes
2011-05-29i965/video: We need 150 dwords of space for video state emissionChris Wilson
2011-05-29intel: Beware the unsigned promotion when checking for batch overflowsChris Wilson
2011-05-29gen6: Invalidate texture cacheChris Wilson
2011-05-29i965: Avoid transform overheads for vertex emit where possibleChris Wilson
2011-05-29i965: Refactor to use constant sampler_state offsetsChris Wilson
2011-05-29i965: Reset vertex_id after every batchChris Wilson
2011-05-29i965: Always update last_floats_per_vertexChris Wilson
2011-05-29Take advantage of the kernel flush for dirty bo in the busy ioctlChris Wilson
2011-05-29Remove unused function 'intel_bo_alloc_for_data'Chris Wilson
2011-05-29Remove the unnecessary MI_FLUSH from the flush handlerChris Wilson
2011-05-29i965: segregate each vertex element into its own bufferChris Wilson
2011-05-29i965: Convert to relative relocations for stateChris Wilson
2011-05-29MI_LOAD_SCAN_LINES_INCL are inclusive and range [0, display height-1]Chris Wilson
2011-05-29946GZ is a 965G!Chris Wilson
2011-05-29Add a DRI2SwapEventPtr typedef for retro xserversChris Wilson
2011-05-29Cleanup gen2 tiling confusionDaniel Vetter
2011-05-29Use the per-generation batch context switch for atomic sequencesChris Wilson
2011-05-29dri: Disable page-flip between a tiled buffer and a linear scanoutChris Wilson
2011-05-29Give each user of tiling separate xorg.conf optionsChris Wilson
2011-05-29Fix relaxed tiling on gen2Daniel Vetter
2011-05-29i965: Fix off-by-one in assertChris Wilson
2011-05-29If the crtc is not enabled, then it can't be onChris Wilson
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