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authorKeith Packard <keithp@keithp.com>2008-10-17 00:07:09 -0700
committerEric Anholt <eric@anholt.net>2008-10-17 00:33:36 -0700
commit7ddea0447c8972104d43cd7966f5ce89b4cca20c (patch)
tree61aba59e0ea0d4e4781aa725ffe28e4ad8ec2918 /src/i830_accel.c
parentc946383afc644ae7740e3c3146424fdd86c05285 (diff)
Handle differently tiled front/back/depth/third in DRI window management
When moving or clearing the extra buffer contents associated with DRI windows, the XAA code needs to see which buffer is being manipulated in the Setup functions to program the tiling values correctly. Calling I830SelectBuffer and not then calling I830Setup... would result in mis-tiled rendering. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'src/i830_accel.c')
-rw-r--r--src/i830_accel.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/i830_accel.c b/src/i830_accel.c
index a9b30059..2743445f 100644
--- a/src/i830_accel.c
+++ b/src/i830_accel.c
@@ -244,7 +244,7 @@ I830EmitFlush(ScrnInfoPtr pScrn)
}
}
-void
+Bool
I830SelectBuffer(ScrnInfoPtr pScrn, int buffer)
{
I830Ptr pI830 = I830PTR(pScrn);
@@ -253,12 +253,18 @@ I830SelectBuffer(ScrnInfoPtr pScrn, int buffer)
#ifdef XF86DRI
case I830_SELECT_BACK:
pI830->bufferOffset = pI830->back_buffer->offset;
+ if (pI830->back_buffer->tiling == TILE_YMAJOR)
+ return FALSE;
break;
case I830_SELECT_THIRD:
pI830->bufferOffset = pI830->third_buffer->offset;
+ if (pI830->third_buffer->tiling == TILE_YMAJOR)
+ return FALSE;
break;
case I830_SELECT_DEPTH:
pI830->bufferOffset = pI830->depth_buffer->offset;
+ if (pI830->depth_buffer->tiling == TILE_YMAJOR)
+ return FALSE;
break;
#endif
default:
@@ -270,6 +276,7 @@ I830SelectBuffer(ScrnInfoPtr pScrn, int buffer)
if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
ErrorF("I830SelectBuffer %d --> offset %x\n",
buffer, pI830->bufferOffset);
+ return TRUE;
}
/* The following function sets up the supported acceleration. Call it