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authorDaniel Vetter <daniel.vetter@ffwll.ch>2011-10-09 18:43:14 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2011-10-11 09:54:17 +0200
commitd0184b59095d5b8fab1a65ceba075d29189130d4 (patch)
treedea200f1ba1ca71d65d7f9bc97eddc8e51c286a1 /src/i965_reg.h
parent4a2e833ab17e4facf0f90166b82a5696a1deef91 (diff)
snb: implement PIPE_CONTROL workaround
Sandybdrige requires an elaborate dance to flush caches without hanging the gpu. See public docs Vol2Part1 1.7.4.1 PIPE_CONTROL or the corrensponding code in mesa/kernel. This (together with the corresponding patch for the kernel) seems to fix the hangs in cairo-perf-traces I'm seeing on my snb machine. v2: Incorporate review from Chris Wilson. For paranoia keep all three PIPE_CONTROL cmds in the same batchbuffer to avoid upsetting the gpu. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'src/i965_reg.h')
-rw-r--r--src/i965_reg.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/i965_reg.h b/src/i965_reg.h
index 904e506f..e7b0d15d 100644
--- a/src/i965_reg.h
+++ b/src/i965_reg.h
@@ -294,6 +294,7 @@
#define BRW_CLIP_ENABLE 1
/* for BRW_PIPE_CONTROL */
+#define BRW_PIPE_CONTROL_CS_STALL (1 << 20)
#define BRW_PIPE_CONTROL_NOWRITE (0 << 14)
#define BRW_PIPE_CONTROL_WRITE_QWORD (1 << 14)
#define BRW_PIPE_CONTROL_WRITE_DEPTH (2 << 14)
@@ -305,6 +306,7 @@
#define BRW_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8)
#define BRW_PIPE_CONTROL_GLOBAL_GTT (1 << 2)
#define BRW_PIPE_CONTROL_LOCAL_PGTT (0 << 2)
+#define BRW_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1)
#define BRW_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0)
/* VERTEX_BUFFER_STATE Structure */