diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2013-07-30 17:38:23 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2013-07-30 23:02:50 +0100 |
| commit | 493763301e995d02cb838d14348da46dd26444af (patch) | |
| tree | 7389f1f2b4db12a19787eac6cf1164fa7786c443 /src/sna/kgem.h | |
| parent | cdbc097796b24ab42b60c49d9885a35573c96a89 (diff) | |
sna: Allow CPU access to scanouts if WT cached
On Iris, we may store the framebuffer in the eLLC/LLC and mark it as
being Write-Through cached. This means that we can treat it as being
cached for read accesses (either by the GPU or CPU), but must be careful
to still not write directly to the scanout with the CPU (only the GPU
writes are cached and coherent with the display).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/sna/kgem.h')
| -rw-r--r-- | src/sna/kgem.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/sna/kgem.h b/src/sna/kgem.h index 6156b4c7..fede4d40 100644 --- a/src/sna/kgem.h +++ b/src/sna/kgem.h @@ -179,6 +179,7 @@ struct kgem { uint32_t has_pinned_batches :1; uint32_t has_cacheing :1; uint32_t has_llc :1; + uint32_t has_wt :1; uint32_t has_no_reloc :1; uint32_t has_handle_lut :1; @@ -577,7 +578,7 @@ static inline bool kgem_bo_can_map__cpu(struct kgem *kgem, struct kgem_bo *bo, bool write) { - if (bo->scanout) + if (bo->scanout && (!kgem->has_wt || write)) return false; if (kgem->has_llc) |