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Diffstat (limited to 'src/i830_driver.c')
-rw-r--r--src/i830_driver.c134
1 files changed, 11 insertions, 123 deletions
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 1a69b535..16444ce1 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -499,10 +499,6 @@ I830MapMem(ScrnInfoPtr scrn)
if (err)
return FALSE;
- if (intel->ring.mem != NULL) {
- intel->ring.virtual_start = intel->FbBase + intel->ring.mem->offset;
- }
-
return TRUE;
}
@@ -1488,8 +1484,6 @@ static Bool I830DrmModeInit(ScrnInfoPtr scrn)
return FALSE;
}
- intel->have_gem = TRUE;
-
i830_init_bufmgr(scrn);
return TRUE;
@@ -1703,81 +1697,6 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
return TRUE;
}
-/*
- * Reset registers that it doesn't make sense to save/restore to a sane state.
- * This is basically the ring buffer and fence registers. Restoring these
- * doesn't make sense without restoring GTT mappings. This is something that
- * whoever gets control next should do.
- */
-static void i830_stop_ring(ScrnInfoPtr scrn, Bool flush)
-{
- intel_screen_private *intel = intel_get_screen_private(scrn);
- unsigned long temp;
-
- DPRINTF(PFX, "ResetState: flush is %s\n", BOOLTOSTRING(flush));
-
- /* Flush the ring buffer, then disable it. */
- temp = INREG(LP_RING + RING_LEN);
- if (temp & RING_VALID) {
- i830_refresh_ring(scrn);
- i830_wait_ring_idle(scrn);
- }
-
- OUTREG(LP_RING + RING_LEN, 0);
- OUTREG(LP_RING + RING_HEAD, 0);
- OUTREG(LP_RING + RING_TAIL, 0);
- OUTREG(LP_RING + RING_START, 0);
-}
-
-static void i830_start_ring(ScrnInfoPtr scrn)
-{
- intel_screen_private *intel = intel_get_screen_private(scrn);
- unsigned int itemp;
-
- DPRINTF(PFX, "SetRingRegs\n");
-
- OUTREG(LP_RING + RING_LEN, 0);
- OUTREG(LP_RING + RING_TAIL, 0);
- OUTREG(LP_RING + RING_HEAD, 0);
-
- assert((intel->ring.mem->offset & I830_RING_START_MASK) ==
- intel->ring.mem->offset);
-
- /* Don't care about the old value. Reserved bits must be zero anyway. */
- itemp = intel->ring.mem->offset;
- OUTREG(LP_RING + RING_START, itemp);
-
- if (((intel->ring.mem->size - 4096) & I830_RING_NR_PAGES) !=
- intel->ring.mem->size - 4096) {
- xf86DrvMsg(scrn->scrnIndex, X_ERROR,
- "I830SetRingRegs: Ring buffer size - 4096 (%lx) violates "
- "its mask (%x)\n", intel->ring.mem->size - 4096,
- I830_RING_NR_PAGES);
- }
- /* Don't care about the old value. Reserved bits must be zero anyway. */
- itemp = (intel->ring.mem->size - 4096) & I830_RING_NR_PAGES;
- itemp |= (RING_NO_REPORT | RING_VALID);
- OUTREG(LP_RING + RING_LEN, itemp);
- i830_refresh_ring(scrn);
-}
-
-void i830_refresh_ring(ScrnInfoPtr scrn)
-{
- intel_screen_private *intel = intel_get_screen_private(scrn);
-
- /* If we're reaching RefreshRing as a result of grabbing the DRI lock
- * before we've set up the ringbuffer, don't bother.
- */
- if (intel->ring.mem == NULL)
- return;
-
- intel->ring.head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK;
- intel->ring.tail = INREG(LP_RING + RING_TAIL);
- intel->ring.space = intel->ring.head - (intel->ring.tail + 8);
- if (intel->ring.space < 0)
- intel->ring.space += intel->ring.mem->size;
-}
-
enum pipe {
PIPE_A = 0,
PIPE_B,
@@ -2379,24 +2298,16 @@ void i830_init_bufmgr(ScrnInfoPtr scrn)
if (intel->bufmgr)
return;
- if (intel->have_gem) {
+ batch_size = 4096 * 4;
- batch_size = 4096 * 4;
+ /* The 865 has issues with larger-than-page-sized batch buffers. */
+ if (IS_I865G(intel))
+ batch_size = 4096;
- /* The 865 has issues with larger-than-page-sized batch buffers. */
- if (IS_I865G(intel))
- batch_size = 4096;
+ intel->bufmgr = intel_bufmgr_gem_init(intel->drmSubFD, batch_size);
+ intel_bufmgr_gem_enable_reuse(intel->bufmgr);
+ drm_intel_bufmgr_gem_enable_fenced_relocs(intel->bufmgr);
- intel->bufmgr = intel_bufmgr_gem_init(intel->drmSubFD, batch_size);
- intel_bufmgr_gem_enable_reuse(intel->bufmgr);
- drm_intel_bufmgr_gem_enable_fenced_relocs(intel->bufmgr);
- } else {
- assert(intel->FbBase != NULL);
- intel->bufmgr = intel_bufmgr_fake_init(intel->drmSubFD,
- intel->fake_bufmgr_mem->offset, intel->FbBase +
- intel->fake_bufmgr_mem->offset,
- intel->fake_bufmgr_mem->size, NULL);
- }
list_init(&intel->batch_pixmaps);
list_init(&intel->flush_pixmaps);
list_init(&intel->in_flight);
@@ -2903,27 +2814,14 @@ static void I830LeaveVT(int scrnIndex, int flags)
intel->leaving = TRUE;
- if (intel->devicesTimer)
- TimerFree(intel->devicesTimer);
- intel->devicesTimer = NULL;
-
i830SetHotkeyControl(scrn, HOTKEY_BIOS_SWITCH);
xf86RotateFreeShadow(scrn);
xf86_hide_cursors(scrn);
- intel_sync(scrn);
-
if (!intel->use_drm_mode) {
RestoreHWState(scrn);
- /* Evict everything from the bufmgr, as we're about to lose
- * ownership of the graphics memory.
- */
- if (!intel->have_gem) {
- intel_bufmgr_fake_evict_all(intel->bufmgr);
- i830_stop_ring(scrn, TRUE);
- }
/* console restore hack */
if (IS_IGDNG(intel) && intel->int10 && intel->int10Mode) {
@@ -2943,7 +2841,7 @@ static void I830LeaveVT(int scrnIndex, int flags)
i830_unbind_all_memory(scrn);
- if (intel->have_gem && !intel->use_drm_mode) {
+ if (!intel->use_drm_mode) {
int ret;
/* Tell the kernel to evict all buffer objects and block GTT
@@ -3021,12 +2919,11 @@ static Bool I830EnterVT(int scrnIndex, int flags)
intel->leaving = FALSE;
- if (!intel->use_drm_mode)
- i830_disable_render_standby(scrn);
-
- if (intel->have_gem && !intel->use_drm_mode) {
+ if (!intel->use_drm_mode) {
int ret;
+ i830_disable_render_standby(scrn);
+
/* Tell the kernel that we're back in control and ready for GTT
* usage.
*/
@@ -3047,11 +2944,6 @@ static Bool I830EnterVT(int scrnIndex, int flags)
gen4_render_state_init(scrn);
if (!intel->use_drm_mode) {
- /* Re-set up the ring. */
- if (!intel->have_gem) {
- i830_stop_ring(scrn, FALSE);
- i830_start_ring(scrn);
- }
I830InitHWCursor(scrn);
/* Tell the BIOS that we're in control of mode setting now. */
@@ -3103,10 +2995,6 @@ static Bool I830CloseScreen(int scrnIndex, ScreenPtr screen)
I830LeaveVT(scrnIndex, 0);
}
- if (intel->devicesTimer)
- TimerFree(intel->devicesTimer);
- intel->devicesTimer = NULL;
-
if (!intel->use_drm_mode) {
DPRINTF(PFX, "\nUnmapping memory\n");
I830UnmapMem(scrn);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-22 13:37:17 +0000