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2011-09-12Temporarily disable sandybridge pci ids until support is in.bleeding_edge-ogaOwain G. Ainsworth
2011-09-08program intel->front_pitch as the stride for the hardware, not the screen width.Owain G. Ainsworth
This prevents us from programming the hardware with the wrong value since the shadow buffer stuff messes with scrn->displayWidth. From kettenis@. (oga; i think i've seen bugs in relation to this with multihead and tiling framebuffers, too)
2011-09-08backlight control buglet From kettenis@:Owain G. Ainsworth
Make sure we read the right register here, otherwise we'll think the backlight level is 0 and set it back to max when turning dpms back on.
2011-07-12uxa/glyphs: Fallback instead of crashing on large stringsChris Wilson
Not ideal, but being slow is a major improvement over losing data. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36860 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 18d08e49d270b7a05f14a309759c9315e5ab9679) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-06-24Xv: set up pipeline for Xv on IvybridgeXiang, Haihao
The configuration is same as that on Sandybridge, but many state commands are changed Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit 312460ea69792594fe9acca8591ead55baea7d99) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-06-24Xv: upload new shaders to GEM objects for Xv on IvybridgeXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit 90a0800588f83d78254136b94bca656c4c24215d) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-06-24Xv: update SURFACE_STATE & SAMPLER_STATE for Xv on IvybridgeXiang, Haihao
SURFACE_STATE & SAMPLER_STATE are changed since Ivybridge Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit 00614f712b243a7724cf919f94d204a123d2789a) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-06-24Xv: New shaders for Xv on IvybridgeXiang, Haihao
Redefine some M4 macros, also update the check for intel-gen4asm to support Ivybridge Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit 70f884772a3adc5dbf56572499c5fb2e080aa84a) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-06-24Xv: separate fragments from M4 macrosXiang, Haihao
It is to prepare for Xv on Ivybridge. The difference from Sandybridge is that all message payload must be in GRF registers instead of MRF registers on Ivybridge. We will only redefine some M4 macros for Ivybridge Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit 3cf423bd3a9483181e59ee87376a9487fa1f923d) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-06-24uxa: Remove the attempt to use the 3D pipeline for core renderingChris Wilson
The attempt was still ridden with bugs, such as http://bugs.freedesktop.org/show_bug.cgi?id=28768 http://bugs.freedesktop.org/show_bug.cgi?id=28798 http://bugs.freedesktop.org/show_bug.cgi?id=28908 http://bugs.freedesktop.org/show_bug.cgi?id=29401 A fresh approach was taken with SNA, but in the mean time before that can be enabled downstream, restore correct behaviour. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 855ced5a4eb67e287001ae22cb6489639c548cfa) Conflicts: uxa/uxa-accel.c
2011-06-24dri: Do not create DRI2 buffers for unrecognized DRI2 buffer tokensChad Versace
Before this commit, if a client were to request an unrecognized DRI2 buffer, such as DRI2BufferStencil, then I830DRI2CreateBuffer() allocated and returned an X-tiled buffer by accident. The problem was that unrecognized tokens were caught by the default case of a switch statement. Now, when given unrecognized DRI2 tokens, I830DRI2CreateBuffers() returns null. This shouldn't break older Mesa versions, because they never query (via DRI2GetBuffersWithFormat) for the drawable's DRI2BufferStencil. CC: Eric Anholt <eric@anholt.net> CC: Ian Romanick <idr@freedesktop.org> CC: Kenneth Graunke <kenneth@whitecape.org> CC: Kristian Høgsberg <krh@bitplanet.net Signed-off-by: Chad Versace <chad@chad-versace.us> (cherry picked from commit 263daba7e6afb37bd471fdc8dd8e4458da0a45ff) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-06-24uxa: Simplify uxa_poly_fill_rect by only clipping once.Eric Anholt
Reviewed-by: Keith Packard <keithp@keithp.com> (cherry picked from commit 91424d49373d8117e71441fa3221bd1801171692) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-06-24uxa: Simplify Composite solid acceleration for spans by only clipping once.Eric Anholt
Unlike the previous commit removing this style of code, the code in this one was originally wrong, and would fail to clip in the second pass of clipping when y was > pbox->y2. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=37233 Reviewed-by: Keith Packard <keithp@keithp.com> (cherry picked from commit e0066e77e026b0dd0daa0c3765473c7d63aa6753) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-06-24uxa: Simplify BLT solid acceleration for spans filling by only clipping once.Eric Anholt
We were clipping each span against the bounds of the clip, throwing out the span early if it was all clipped, and then walked the clip box clipping against each of the cliprects. We would expect spans to typically be clipped against one box, and not thrown out, so we were not saving any work there. For multiple cliprects, we were adding work. Only for many spans clipped entirely out of a complicated clip region would it have saved work, and it clearly didn't save bugs as evidenced by the many fix attempts here. Reviewed-by: Keith Packard <keithp@keithp.com> (cherry picked from commit ace324e4aa27effdd621156eec03f3f87b610732) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-30Revert "Revert "i965: Invalidate pixmap binding location on reuse.""Owain G. Ainsworth
This reverts commit 59449d604066542d5485359050d3083fa7bb40f8.
2011-05-30Remove the memory of Option "AccelMethod"Adam Jackson
Signed-off-by: Adam Jackson <ajax@redhat.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 9d6e02a135efdea1d169d1938359ab2b553e941c) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-30dri: Flush the batch after a DRI swap/copy eventChris Wilson
To minimise lag in those every so critical games, we want to ensure that the copy happens as soon as it is received, so we need to flush the batch after processing a swap event and before we go to sleep. References: https://bugs.freedesktop.org/show_bug.cgi?id=37068 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 895a46e8ff70195c1a4bdccbeb652e330376f64a) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-30video: Flush the batch on the next blockhandler after queuingChris Wilson
In order to avoid video lag and jerky playback we need to ensure that any queued video is flushed before we go to sleep. Fixes regression from 6f104189bb. Reported-and-tested-by: Edward Sheldrake <ejsheldrake@gmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=37068 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 0b4ca9313cc7eb4845cf7f4e87c869c0c6d6ff0d) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-30intel: Restore manual flush for old kernelsChris Wilson
Daniel Vetter pointed out that the automagic flush by the kernel for the busy-ioctl was only introduced upstream in 2.6.37. So we still need to manually emit a flush on old kernels. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 97e9557619e58ef769eb7cbf1a03fbd52be7f2ed) Conflicts: src/intel_driver.c
2011-05-30Correct chipset detection for Q33, Q35, B43_G1Chris Wilson
Everytime we update these tables we trip over this bit of marketing genius. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit bb8bf2a28bcb5e838bf4bb7e80ce220d28540719) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-30module: Adopt IVB's more detailed naming convention for SNBChris Wilson
This should fix the seven-fold repetition of "SandyBridge" in the list of supported chipsets during start-up... And be more useful in bug reports! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit fd1ebd44fb72e7bdf57d00f8941cd6110a529cac) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-30Whitespacing cleanup for intel_module.cChris Wilson
Bring intel_module.c into line with the kernel whitespacing rules abided by everywhere else in the tree. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit e9811bb777dfc51af19836175645400489f7d991) Conflicts: src/intel_module.c
2011-05-30Add support for Ivybridge chipset.Eric Anholt
This gets display and 2D blit acceleration up and running. No Render acceleration is provided yet. (cherry picked from commit 79e59fb2a047b1e733a7b0dee608db3311391725) Conflicts: src/intel_module.c
2011-05-30Remove the static list of PciChipset and construct it from SymTabRec instead.Eric Anholt
This is one less place the new hardware enabler has to spam the chipset in. The PciChipset is just a match structure from PciId to the SymTabRec entry token, and our SymTabRec entry tokens are just the PciId, so it's trivial to construct. Acked-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 792738adfc5164d30358f045875dfc9b199a46da) Conflicts: src/intel_module.c
2011-05-30Use the existing deviceID -> name mapping in SymTabRec instead of duping it.Eric Anholt
We need to have this array anyway for the xf86 interfaces, apparently, so just store the name in one location. This drops the i852/i855 subdevice distinction in the name printed, but I haven't seen us ever care about that. Acked-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit 583e80dfa12d6c73fc677c81cb605a07b2768979) Conflicts: src/intel_module.c
2011-05-30Store the chipset info struct in the PCI match struct, instead of a switch().Eric Anholt
Acked-by: Kenneth Graunke <kenneth@whitecape.org> (cherry picked from commit adf7bbd3a8758de6cdecbace42e399dd27188497) Conflicts: src/intel_module.c (merges in an earlier s/igd/pineview s/igdng/ironlake commit)
2011-05-29Ensure that the partial batch is flushed upon the blockhandlerChris Wilson
Currently, we require that a batch containing a dirty bo be submitted before we mark the device as requiring a flush. So if we never submit a batch between block handlers, we can end up sleeping without ever flushing either the partial batch or the rendering to the scanout. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36776 Tested-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 3145530feed879082bcfab11ffc8e7fd0911c920) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29Add basic 30 bit depth supportJesse Barnes
Still need to handle video and gamma correction, but this gets the display up and running at 30 bit depth if the kernel and display support it. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> (cherry picked from commit 0944e2d5749f5122cd9802c4a2421106fa829ea4) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29i965/video: We need 150 dwords of space for video state emissionChris Wilson
(Actually around 131, with additional 10% just for safety.) Reported-by: Modestas Vainius <geromanas@mailas.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36319 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit c9fb69cb2502917dfb2828c90802de7766072899) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29intel: Beware the unsigned promotion when checking for batch overflowsChris Wilson
Reported-by: Modestas Vainius <geromanas@mailas.com> References: https://bugs.freedesktop.org/show_bug.cgi?id=36319 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit a51cd83d25f2f9f2107219d5671194f931601244) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29gen6: Invalidate texture cacheChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 25521900df11bc71020ee80db2223f979bec5ec6) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29i965: Avoid transform overheads for vertex emit where possibleChris Wilson
Minor improvement as the bottlenecks lie elsewhere. But it was annoying me. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit ad22003033eb502474ae538a97e3b42cf8f83880) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29i965: Refactor to use constant sampler_state offsetsChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 007c2f86cbb386861a1f711786523657f92e12cb) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29i965: Reset vertex_id after every batchChris Wilson
So that we always remember to re-emit the initial vertex elements state. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 8dc99b305a514dcd42c4260698e685a66dc95518) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29i965: Always update last_floats_per_vertexChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 5982ed4da12a964351029c6f786348a11e33dc81) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29Take advantage of the kernel flush for dirty bo in the busy ioctlChris Wilson
Rather than just creating and submitting a batch that simply contains a flush in order to periodically ensure that rendering reaches the scanout, we can simply ask the kernel whether the scanout is busy. The kernel will then submit a flush on our behalf if it is dirty, which takes advantage of the kernel's dirty state tracking. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 6f104189bb9439ab0e05f04d4be020813eb04bf9) Conflicts: src/intel_display.c src/intel_driver.c
2011-05-29Remove unused function 'intel_bo_alloc_for_data'Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 314439860e595c473d168c0cafb2b5b49b7fef30) Conflicts: src/intel.h
2011-05-29Remove the unnecessary MI_FLUSH from the flush handlerChris Wilson
The kernel will emit any required flushes between the dri client and the ddx, and we do not rely on the MI_FLUSH here for scanout. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit ced747cefb5e697e6caa65296dff728904f52b93) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29i965: segregate each vertex element into its own bufferChris Wilson
Reduce the number of relocations emitted by only emitting one relocation per vertex element per vertex buffer. References: https://bugs.freedesktop.org/show_bug.cgi?id=35733 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 79444291a39c42039192a5baa3a71d52300cf4ee) Conflicts: src/i965_render.c
2011-05-29i965: Convert to relative relocations for stateChris Wilson
References: https://bugs.freedesktop.org/show_bug.cgi?id=35733 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit d2106384be6f9df498392127c3ff64d0a2b17457) Conflicts: src/i965_render.c src/intel_video.c
2011-05-29MI_LOAD_SCAN_LINES_INCL are inclusive and range [0, display height-1]Chris Wilson
We have seen GPU hangs with: batchbuffer at 0x0f9b4000: 0x0f9b4000: 0x09000000: MI_LOAD_SCAN_LINES_INCL 0x0f9b4004: 0x00000300: dword 1 0x0f9b4008: 0x09000000: MI_LOAD_SCAN_LINES_INCL 0x0f9b400c: 0x00000300: dword 1 0x0f9b4010: 0x01820000: MI_WAIT_FOR_EVENT 0x0f9b4014: HEAD 0x02000006: MI_FLUSH on a 1366x768 display. That according to the specs an invalid command for the pipe. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35576 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 972569f6fd1e14519f46e9f50d2509faf1d0aa55) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29946GZ is a 965G!Chris Wilson
Sales & Marketing score another victory in confusing me. Bugzila: https://bugs.freedesktop.org/show_bug.cgi?id=35854 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 537a836dd6db384d53b52eb457a7d257c440217f) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29Add a DRI2SwapEventPtr typedef for retro xserversChris Wilson
Because people are still trying to build upon our solid historical foundations. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 630d77bf10ba6234bb9c04538636f7d8aa319aea) Conflicts: src/intel.h
2011-05-29Cleanup gen2 tiling confusionDaniel Vetter
A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (cherry picked from commit f660df2cb44b310740ed850037ff37891b671f28) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29Use the per-generation batch context switch for atomic sequencesChris Wilson
A modest boost to throughput and reduction in CPU overhead from not flushing the batch on every transition from BLT to RENDER. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit ec133abc4bd8caba15ed54e18621b816afb06981) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29dri: Disable page-flip between a tiled buffer and a linear scanoutChris Wilson
Keith Packard pointed out a loophole that could cause the DDX to end up with a tiled scanout even if the user required a linear framebuffer; that is by using page-flipping we could replace the scanout pixmap with another of our choosing, and not necessarily tiled. Close that loophole by only allowing an exchange of buffers between identical tiling modes. For the common case, this is fine since they will indeed be allocated with the same tiling. For the linear framebuffer case with mesa using a tiled pixmap, we force it to blit onto the scanout instead. Reported-by: Keith Packard <keith.packard@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 014fc7abb7b2cc2110e3ab9a0bd6f7cff2c64c05) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29Give each user of tiling separate xorg.conf optionsChris Wilson
So that you can indeed allocate a linear framebuffer if you so desire without breaking mesa. Adds: Section "Driver" Option "LinearFramebuffer" "False|True" # default false EndSection to xorg.conf Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 049ce4397ddf7fd088ce364cbb53cacf5133176f) Conflicts: man/intel.man src/intel_driver.c src/intel_driver.h
2011-05-29Fix relaxed tiling on gen2Daniel Vetter
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> (cherry picked from commit d21d781466785c317131a8a57606925867265dc8) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29i965: Fix off-by-one in assertChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 22d7b61791c382088a6c0df5dce3a15405d6c495) Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
2011-05-29If the crtc is not enabled, then it can't be onChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 6d50f5a140dbefdf86eb25d18d08473aa7e42acc) Conflicts: src/intel_driver.c
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