index
:
driver/xf86-video-intel
2.10
2.4
2.9.1-oga
COMPOSITEWRAP
CYGWIN
DAMAGE-XFIXES
IPv6-REVIEW
STSF-CURRENT
XACE-SELINUX
XEVIE
XINERAMA_2
XORG-6_8-branch
XORG-CURRENT
XORG-RELEASE-1
XORG-RELEASE-1-STSF
XORG-RELEASE-1-TM
XORG-STABLE
XPRINT
accelerated_indirect-0-0-1
bleeding_edge-oga
dri2
exa
exa-i965
fbc
glucose
i810_texman_0_1_branch
i830-pageflip
lg3d
lg3d-dev-0-6-1
lg3d-dev-0-6-1-1
lg3d-dev-0-6-1-current
lg3d-dev-0-6-1-latest
lg3d-dev-0-6-2
lg3d-dev-0-6-latest
lg3d-dev-0-7-0
lg3d-dev-0-7-1
lg3d-event
lg3d-master
lukas-resume
master
mergedfb
modesetting
modesetting-airlied
modesetting-keithp
modesetting-keithp-fu
modesetting-multihead
modesetting-rotation
modesetting-sdvo-stuffing
nonrandr-setup
obsd
obsd-2.7
obsd-2.8
obsd-xf86-video-intel-2.4.3
randr-1.2-rotation
restructure-outputs
sandybridge
sco_port_update
textured-video
xf86-video-i810-1_5-branch
xf86-video-intel-2.1-branch
xf86-video-intel-2.5-branch
xorg-7.0-branch
xprint_packagertest_20041125
xprint_packagertest_20041217
xvmc-i915
Intel video cards driver
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src
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i965_video.c
Age
Commit message (
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Author
2011-12-31
uxa/video: Clear all state structures before uploading
Chris Wilson
2011-12-31
uxa: the video destination should be in the render write domain
Chris Wilson
2011-12-11
uxa/video: Correct the offset of the binding table in the surface buffer
Chris Wilson
2011-12-09
uxa/video: Use the common bo allocations and upload
Chris Wilson
2011-11-14
uxa/gen4+: Re-emit composite invariant after video
Chris Wilson
2011-07-28
render: Refactor to use newly shared pipeline setup code in i965_3d.c.
Kenneth Graunke
2011-07-28
Xv: Refactor out pipeline setup functions for future reuse in render.
Kenneth Graunke
2011-06-24
Xv: set up pipeline for Xv on Ivybridge
Xiang, Haihao
2011-06-24
Xv: upload new shaders to GEM objects for Xv on Ivybridge
Xiang, Haihao
2011-06-24
Xv: update SURFACE_STATE & SAMPLER_STATE for Xv on Ivybridge
Xiang, Haihao
2011-04-17
i965/video: We need 150 dwords of space for video state emission
Chris Wilson
2011-04-04
Take advantage of the kernel flush for dirty bo in the busy ioctl
Chris Wilson
2011-02-17
Fix IGD and IGDNG constants to be comprehensible
Adam Jackson
2011-02-12
i965: Remove broken maximum base addresses from video
Chris Wilson
2011-01-17
Fix textured video when destination is larger than screen
Simon Farnsworth
2010-11-01
Xv: setup pipeline for Xv on Sandybridge
Xiang, Haihao
2010-11-01
Xv: set the surface state base address
Xiang, Haihao
2010-10-07
Include a chipset generation number to clarify device specific paths.
Chris Wilson
2010-06-25
Rename common infrastructure to the intel namespace.
Chris Wilson
2010-06-25
i810: Move into a legacy directory.
Chris Wilson
2010-06-21
Emit the flush after a potential draw from the BlockHandler.
Chris Wilson
2010-06-09
Revert "xp:trapezoids"
Chris Wilson
2010-06-08
xp:trapezoids
Chris Wilson
2010-05-24
Kill paranoid assertions on every write into the batchbuffer.
Chris Wilson
2010-05-17
i830: Remove vestigal debugging ALWAYS_FLUSH and ALWAYS_SYNC
Chris Wilson
2010-04-08
i965 Xv: fix chroma pitch
Daniel Vetter
2010-03-04
Xv: fixup relocation in i965_video.c
Daniel Vetter
2010-01-07
Xv: kill unnecessary parameters for hw PutImage functions
Daniel Vetter
2009-12-07
batch: Ensure we send a MI_FLUSH in the block handler for TFP
Chris Wilson
2009-12-02
Remove flush parameter from intel_batch_flush()
Chris Wilson
2009-12-02
Rename I830Sync() to intel_sync()
Chris Wilson
2009-11-10
Check that batch buffers are atomic.
Chris Wilson
2009-10-14
conf: Add debugging flush options
Chris Wilson
2009-10-08
Rename the xv pPriv to adaptor_priv to reflect whose private it is.
Eric Anholt
2009-10-08
Call pPixmaps plain old pixmaps.
Eric Anholt
2009-10-08
Rename the xf86 screen private from pScrn to scrn.
Eric Anholt
2009-10-08
Rename the screen private from I830Ptr pI830 to intel_screen_private *intel.
Eric Anholt
2009-10-06
Move to kernel coding style.
Eric Anholt
2009-10-05
Remove error state dumping code.
Eric Anholt
2009-10-05
Xv: kill hw double buffering logic
Daniel Vetter
2009-10-05
Xv: use is_planar_fourcc helper some more
Daniel Vetter
2009-08-07
Align tiled pixmap height so we don't address beyond the end of our buffers.
Eric Anholt
2009-06-30
Xv: fix domain usage for binding table on i965+ chips
Zhenyu Wang
2009-06-30
Add XV support on IGDNG
Zhenyu Wang
2009-05-01
Hold reference to video binding table until all rects are painted.
Keith Packard
2009-05-01
3D_STATE_VERTEX_BUFFERS takes four 32-bit values, not three.
Keith Packard
2009-05-01
Don't bother to enable VF statistics during 965 video playback
Keith Packard
2009-04-27
Now that video destination pixmaps are always in BOs, no more MarkSync.
Eric Anholt
2009-03-06
intel: Nuke shared-entity support (zaphod mode).
Eric Anholt
2009-02-25
XvMC: fix broken xvmc on 965
Xiang, Haihao
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