diff options
author | Dave Airlie <airlied@linux.ie> | 2007-12-21 09:36:22 +1000 |
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committer | Dave Airlie <airlied@linux.ie> | 2007-12-21 09:36:22 +1000 |
commit | 3c31b96afa20913ad947e68fe0c3a662e5eafbdd (patch) | |
tree | 1db77a5ca5bc88876b3f21d35d3ddce3cff0f900 /src/radeon_video.c | |
parent | eb99c3c5c9a2249cb84920f0f225e525fc3a4144 (diff) | |
parent | f5e8c185001e62e744310667c2d1bd3fe6542a62 (diff) |
Merge remote branch 'origin/atombios-support'
Conflicts:
src/radeon_display.c
src/radeon_driver.c
Diffstat (limited to 'src/radeon_video.c')
-rw-r--r-- | src/radeon_video.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/radeon_video.c b/src/radeon_video.c index 2b5764f..de70605 100644 --- a/src/radeon_video.c +++ b/src/radeon_video.c @@ -1456,7 +1456,7 @@ RADEONAllocAdaptor(ScrnInfoPtr pScrn) * 0 for PIXCLK < 175Mhz, and 1 (divide by 2) * for higher clocks, sure makes life nicer */ - dot_clock = info->ModeReg.dot_clock_freq; + dot_clock = info->ModeReg->dot_clock_freq; if (dot_clock < 17500) info->ecp_div = 0; @@ -2182,7 +2182,7 @@ RADEONCopyData( { #if X_BYTE_ORDER == X_BIG_ENDIAN unsigned char *RADEONMMIO = info->MMIO; - unsigned int swapper = info->ModeReg.surface_cntl & + unsigned int swapper = info->ModeReg->surface_cntl & ~(RADEON_NONSURF_AP0_SWP_32BPP | RADEON_NONSURF_AP1_SWP_32BPP | RADEON_NONSURF_AP0_SWP_16BPP | RADEON_NONSURF_AP1_SWP_16BPP); @@ -2208,7 +2208,7 @@ RADEONCopyData( #if X_BYTE_ORDER == X_BIG_ENDIAN /* restore byte swapping */ - OUTREG(RADEON_SURFACE_CNTL, info->ModeReg.surface_cntl); + OUTREG(RADEON_SURFACE_CNTL, info->ModeReg->surface_cntl); #endif } } @@ -2264,7 +2264,7 @@ RADEONCopyRGB24Data( { #if X_BYTE_ORDER == X_BIG_ENDIAN unsigned char *RADEONMMIO = info->MMIO; - OUTREG(RADEON_SURFACE_CNTL, (info->ModeReg.surface_cntl + OUTREG(RADEON_SURFACE_CNTL, (info->ModeReg->surface_cntl | RADEON_NONSURF_AP0_SWP_32BPP) & ~RADEON_NONSURF_AP0_SWP_16BPP); #endif @@ -2280,7 +2280,7 @@ RADEONCopyRGB24Data( #if X_BYTE_ORDER == X_BIG_ENDIAN /* restore byte swapping */ - OUTREG(RADEON_SURFACE_CNTL, info->ModeReg.surface_cntl); + OUTREG(RADEON_SURFACE_CNTL, info->ModeReg->surface_cntl); #endif } } @@ -2359,7 +2359,7 @@ RADEONCopyMungedData( #if X_BYTE_ORDER == X_BIG_ENDIAN unsigned char *RADEONMMIO = info->MMIO; - OUTREG(RADEON_SURFACE_CNTL, (info->ModeReg.surface_cntl + OUTREG(RADEON_SURFACE_CNTL, (info->ModeReg->surface_cntl | RADEON_NONSURF_AP0_SWP_32BPP) & ~RADEON_NONSURF_AP0_SWP_16BPP); #endif @@ -2397,7 +2397,7 @@ RADEONCopyMungedData( } #if X_BYTE_ORDER == X_BIG_ENDIAN /* restore byte swapping */ - OUTREG(RADEON_SURFACE_CNTL, info->ModeReg.surface_cntl); + OUTREG(RADEON_SURFACE_CNTL, info->ModeReg->surface_cntl); #endif } } @@ -2578,9 +2578,9 @@ RADEONDisplayVideo( /* Figure out which head we are on for dot clock */ if (radeon_crtc->crtc_id == 1) - dot_clock = info->ModeReg.dot_clock_freq_2; + dot_clock = info->ModeReg->dot_clock_freq_2; else - dot_clock = info->ModeReg.dot_clock_freq; + dot_clock = info->ModeReg->dot_clock_freq; if (dot_clock < 17500) ecp_div = 0; |