diff options
author | Dave Airlie <airlied@redhat.com> | 2008-02-24 01:46:05 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2008-02-24 01:46:05 -0500 |
commit | e614bb6965588bf09dcb87f5e08e67120ec9847f (patch) | |
tree | 0f7ad48ffbd692d0c50be2982719521abec5df65 /src | |
parent | 6ce9ee47c75620b2e5d211c5d59d17271a6a7b19 (diff) |
r500: convert fragprog to use register values
Diffstat (limited to 'src')
-rw-r--r-- | src/radeon_exa_render.c | 47 |
1 files changed, 35 insertions, 12 deletions
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c index d16a269..2213a32 100644 --- a/src/radeon_exa_render.c +++ b/src/radeon_exa_render.c @@ -1044,18 +1044,41 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, OUT_ACCEL_REG(R500_US_CODE_RANGE, 0x10000); OUT_ACCEL_REG(R500_US_CODE_OFFSET, 0x0); OUT_ACCEL_REG(R500_GA_US_VECTOR_INDEX, 0x0); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00007807); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x06400000); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0xe4000400); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00078105); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x10040000); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x10040000); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00db0220); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00c0c000); - OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x20490000); + // 7807 + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, R500_INST_TYPE_TEX | R500_INST_TEX_SEM_WAIT | + R500_INST_RGB_WMASK_R | R500_INST_RGB_WMASK_G | R500_INST_RGB_WMASK_B | R500_INST_ALPHA_WMASK); + + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, R500_TEX_ID(0) | R500_TEX_INST_LD | R500_TEX_SEM_ACQUIRE | + R500_TEX_IGNORE_UNCOVERED); + + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, R500_TEX_SRC_ADDR(0) | R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G | + R500_TEX_DST_ADDR(0) | R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G | R500_TEX_DST_B_SWIZ_B | + R500_TEX_DST_A_SWIZ_A); + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); // TEX_ADDR_DXDY + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); // mbz + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, 0x00000000); // mbz + + // 0x78105 + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, R500_INST_TYPE_OUT | R500_INST_TEX_SEM_WAIT | R500_INST_LAST | + R500_INST_RGB_OMASK_R | R500_INST_RGB_OMASK_G | R500_INST_RGB_OMASK_B | R500_INST_ALPHA_OMASK); + + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, R500_RGB_ADDR0(0) | R500_RGB_ADDR1(0) | R500_RGB_ADDR1_CONST | + R500_RGB_ADDR2(0) | R500_RGB_ADDR2_CONST | R500_RGB_SRCP_OP_1_MINUS_2RGB0); //0x10040000 + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, R500_ALPHA_ADDR0(0) | R500_ALPHA_ADDR1(0) | R500_ALPHA_ADDR1_CONST | + R500_ALPHA_ADDR2(0) | R500_ALPHA_ADDR2_CONST | R500_ALPHA_SRCP_OP_1_MINUS_2A0); //0x10040000 + + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, + R500_ALU_RGB_SEL_A_SRC0 | + R500_ALU_RGB_R_SWIZ_A_R | R500_ALU_RGB_G_SWIZ_A_G | R500_ALU_RGB_B_SWIZ_A_B | + R500_ALU_RGB_SEL_B_SRC0 | + R500_ALU_RGB_R_SWIZ_B_1 | R500_ALU_RGB_B_SWIZ_B_1 | R500_ALU_RGB_G_SWIZ_B_1);//0x00db0220 + + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, R500_ALPHA_OP_MAD | + R500_ALPHA_SWIZ_A_A | R500_ALPHA_SWIZ_B_1);//0x00c0c000) + + OUT_ACCEL_REG(R500_GA_US_VECTOR_DATA, R500_ALU_RGBA_OP_MAD | + R500_ALU_RGBA_R_SWIZ_0 | R500_ALU_RGBA_G_SWIZ_0 | R500_ALU_RGBA_B_SWIZ_0 | + R500_ALU_RGBA_A_SWIZ_0);//0x20490000 FINISH_ACCEL(); } |