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authorAlex Deucher <agd5f@yahoo.com>2004-09-23 23:28:03 +0000
committerAlex Deucher <agd5f@yahoo.com>2004-09-23 23:28:03 +0000
commitfd33023d5ad0b52271bafcdad1c4819c26f3ab91 (patch)
treef3d96e321072699829c4d3e72be834595b4c1f38 /src/savage_accel.c
parentc1c94c202bb2e6a39f32056e7bd3fe7477406d9a (diff)
small cleanups and corrections
Diffstat (limited to 'src/savage_accel.c')
-rw-r--r--src/savage_accel.c16
1 files changed, 4 insertions, 12 deletions
diff --git a/src/savage_accel.c b/src/savage_accel.c
index af86b40..ea79817 100644
--- a/src/savage_accel.c
+++ b/src/savage_accel.c
@@ -478,8 +478,8 @@ void SavageSetGBD_Twister(ScrnInfoPtr pScrn)
if (psav->Chipset == S3_SAVAGE4) {
bci_enable = BCI_ENABLE;
- tile16 = TILE_FORMAT_DESTINATION16;
- tile32 = TILE_FORMAT_DESTINATION32;
+ tile16 = TILE_FORMAT_16BPP;
+ tile32 = TILE_FORMAT_32BPP;
} else {
bci_enable = BCI_ENABLE_TWISTER;
tile16 = TILE_DESTINATION;
@@ -645,8 +645,8 @@ void SavageSetGBD_M7(ScrnInfoPtr pScrn)
int bci_enable, tile16, tile32;
bci_enable = BCI_ENABLE;
- tile16 = TILE_FORMAT_DESTINATION16;
- tile32 = TILE_FORMAT_DESTINATION32;
+ tile16 = TILE_FORMAT_16BPP;
+ tile32 = TILE_FORMAT_32BPP;
/* following is the enable case */
@@ -676,14 +676,6 @@ void SavageSetGBD_M7(ScrnInfoPtr pScrn)
OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA1);
- /*
- * load ps1 active registers as determined by MM81C0/81C4
- * load ps2 active registers as determined by MM81B0/81B4
- */
- OUTREG8(CRT_ADDRESS_REG,0x65);
- byte = INREG8(CRT_DATA_REG) | 0x03;
- OUTREG8(CRT_DATA_REG,byte);
-
#if 0
/* Set primary stream to bank 0 */
OUTREG8(CRT_ADDRESS_REG, MEMORY_CTRL0_REG);/* CRCA */