1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
|
/*
* Acceleration for the Creator and Creator3D framebuffer - DDC support.
*
* Copyright (C) 2000 David S. Miller (davem@redhat.com)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* DAVID MILLER BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "ffb.h"
#include "ffb_dac.h"
#include "xf86.h"
#include "xf86_OSproc.h"
#include "xf86DDC.h"
#if 0
/* XXX This needs a lot more work. Only an attempt at the PAC2 version
* XXX is below, and that is untested. The BT498 manual is unclear about
* XXX several details and I must figure them out by trial and error.
*/
/* Wait for the next VSYNC. */
static void
WaitForVSYNC(ffb_dacPtr dac)
{
unsigned int vsap = DACCFG_READ(dac, FFBDAC_CFG_VSAP);
unsigned int vcnt;
vcnt = DACCFG_READ(dac, FFBDAC_CFG_TGVC);
while (vcnt > vsap)
vcnt = DACCFG_READ(dac, FFBDAC_CFG_TGVC);
while (vcnt <= vsap)
vcnt = DACCFG_READ(dac, FFBDAC_CFG_TGVC);
}
/* The manual seems to imply this is needed, but it's really clumsy
* so we can test if it really is a requirement with this.
*/
#define MDATA_NEEDS_BLANK
/* DDC1/DDC2 support */
static unsigned int
FFBDacDdc1Read(ScrnInfoPtr pScrn)
{
FFBPtr pFfb = GET_FFB_FROM_SCRN(pScrn);
ffb_dacPtr dac = pFfb->dac;
unsigned int val;
#ifdef MDATA_NEEDS_BLANK
unsigned int uctrl;
#endif
#ifdef MDATA_NEEDS_BLANK
/* Force a blank of the screen. */
uctrl = DACCFG_READ(dac, FFBDAC_CFG_UCTRL);
DACCFG_WRITE(dac, FFBDAC_CFG_UCTRL,
(uctrl | FFBDAC_UCTRL_ABLANK));
#endif
/* Tristate SCL pin. */
DACCFG_WRITE(dac, FFBDAC_CFG_MPDATA,
FFBDAC_CFG_MPDATA_SCL);
/* Pause until VSYNC is hit. */
WaitForVSYNC(dac);
/* Read the sense line to see what the monitor is driving
* it at.
*/
val = DACCFG_READ(dac, FFBDAC_CFG_MPSENSE);
val = (val & FFBDAC_CFG_MPSENSE_SCL) ? 1 : 0;
/* Stop tristating the SCL pin. */
DACCFG_WRITE(dac, FFBDAC_CFG_MPDATA, 0);
#ifdef MDATA_NEEDS_BLANK
/* Restore UCTRL to unblank the screen. */
DACCFG_WRITE(dac, FFBDAC_CFG_UCTRL, uctrl);
#endif
/* Return the result and we're done. */
return val;
}
static void
FFBI2CGetBits(I2CBusPtr b, int *clock, int *data)
{
FFBPtr pFfb = GET_FFB_FROM_SCRN(xf86Screens[b->scrnIndex]);
ffb_dacPtr dac = pFfb->dac;
unsigned int val;
#ifdef MDATA_NEEDS_BLANK
unsigned int uctrl;
#endif
#ifdef MDATA_NEEDS_BLANK
/* Force a blank of the screen. */
uctrl = DACCFG_READ(dac, FFBDAC_CFG_UCTRL);
DACCFG_WRITE(dac, FFBDAC_CFG_UCTRL,
(uctrl | FFBDAC_UCTRL_ABLANK));
#endif
/* Tristate SCL+SDA pins. */
DACCFG_WRITE(dac, FFBDAC_CFG_MPDATA,
(FFBDAC_CFG_MPDATA_SCL | FFBDAC_CFG_MPDATA_SDA));
/* Read the sense line to see what the monitor is driving
* them at.
*/
val = DACCFG_READ(dac, FFBDAC_CFG_MPSENSE);
*clock = (val & FFBDAC_CFG_MPSENSE_SCL) ? 1 : 0;
*data = (val & FFBDAC_CFG_MPSENSE_SDA) ? 1 : 0;
/* Stop tristating the SCL pin. */
DACCFG_WRITE(dac, FFBDAC_CFG_MPDATA, 0);
#ifdef MDATA_NEEDS_BLANK
/* Restore UCTRL to unblank the screen. */
DACCFG_WRITE(dac, FFBDAC_CFG_UCTRL, uctrl);
#endif
}
static void
FFBI2CPutBits(I2CBusPtr b, int clock, int data)
{
FFBPtr pFfb = GET_FFB_FROM_SCRN(xf86Screens[b->scrnIndex]);
ffb_dacPtr dac = pFfb->dac;
unsigned int val;
#ifdef MDATA_NEEDS_BLANK
unsigned int uctrl;
#endif
val = 0;
if (clock)
val |= FFBDAC_CFG_MPDATA_SCL;
if (data)
val |= FFBDAC_CFG_MPDATA_SDA;
#ifdef MDATA_NEEDS_BLANK
/* Force a blank of the screen. */
uctrl = DACCFG_READ(dac, FFBDAC_CFG_UCTRL);
DACCFG_WRITE(dac, FFBDAC_CFG_UCTRL,
(uctrl | FFBDAC_UCTRL_ABLANK));
#endif
/* Tristate requested pins. */
DACCFG_WRITE(dac, FFBDAC_CFG_MPDATA, val);
#ifdef MDATA_NEEDS_BLANK
/* Restore UCTRL to unblank the screen. */
DACCFG_WRITE(dac, FFBDAC_CFG_UCTRL, uctrl);
#endif
}
Bool
FFBi2cInit(ScrnInfoPtr pScrn)
{
FFBPtr pFfb = GET_FFB_FROM_SCRN(pScrn);
I2CBusPtr I2CPtr;
I2CPtr = xf86CreateI2CBusRec();
if (!I2CPtr)
return FALSE;
pFfb->I2C = I2CPtr;
I2CPtr->BusName = "DDC";
I2CPtr->scrnIndex = pScrn->scrnIndex;
I2CPtr->I2CPutBits = FFBI2CPutBits;
I2CPtr->I2CGetBits = FFBI2CGetBits;
I2CPtr->AcknTimeout = 5;
if (!xf86I2CBusInit(I2CPtr))
return FALSE;
return TRUE;
}
#endif
|