Rename all PIL_* constants to IPL_* to match other archs and make them

usable in MD code in the future.
deraadt@ ok

10 files changed, 82 insertions, 94 deletions

diff --git a/sys/arch/sparc/dev/amd7930.c b/sys/arch/sparc/dev/amd7930.c
index 549eabb3669..5bc0871aaee 100644
--- a/sys/arch/sparc/dev/amd7930.c
+++ b/sys/arch/sparc/dev/amd7930.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: amd7930.c,v 1.20 2002/03/14 03:15:59 millert Exp $	*/
+/*	$OpenBSD: amd7930.c,v 1.21 2002/04/28 03:51:19 art Exp $	*/
 /*	$NetBSD: amd7930.c,v 1.37 1998/03/30 14:23:40 pk Exp $	*/
 
 /*
@@ -283,7 +283,7 @@ amd7930attach(parent, self, args)
 		return;
 	}
 	pri = ra->ra_intr[0].int_pri;
-	printf(" pri %d, softpri %d\n", pri, PIL_AUSOFT);
+	printf(" pri %d, softpri %d\n", pri, IPL_AUSOFT);
 	amd = (volatile struct amd7930 *)(ra->ra_vaddr ?
 		ra->ra_vaddr : mapiodev(ra->ra_reg, 0, sizeof (*amd)));
 
@@ -308,7 +308,7 @@ amd7930attach(parent, self, args)
 #endif
 	sc->sc_swih.ih_fun = amd7930swintr;
 	sc->sc_swih.ih_arg = sc;
-	intr_establish(PIL_AUSOFT, &sc->sc_swih);
+	intr_establish(IPL_AUSOFT, &sc->sc_swih);
 
 	evcnt_attach(&sc->sc_dev, "intr", &sc->sc_intrcnt);
 
diff --git a/sys/arch/sparc/dev/cs4231.c b/sys/arch/sparc/dev/cs4231.c
index f3f4d924ada..b8199ad859b 100644
--- a/sys/arch/sparc/dev/cs4231.c
+++ b/sys/arch/sparc/dev/cs4231.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cs4231.c,v 1.13 2002/03/14 03:15:59 millert Exp $	*/
+/*	$OpenBSD: cs4231.c,v 1.14 2002/04/28 03:51:19 art Exp $	*/
 
 /*
  * Copyright (c) 1999 Jason L. Wright (jason@thought.net)
@@ -241,7 +241,7 @@ cs4231_attach(parent, self, aux)
 	sc->sc_ih.ih_arg = sc;
 	intr_establish(ca->ca_ra.ra_intr[0].int_pri, &sc->sc_ih);
 
-	printf(" pri %d, softpri %d\n", pri, PIL_AUSOFT);
+	printf(" pri %d, softpri %d\n", pri, IPL_AUSOFT);
 
 	evcnt_attach(&sc->sc_dev, "intr", &sc->sc_intrcnt);
 
diff --git a/sys/arch/sparc/dev/fd.c b/sys/arch/sparc/dev/fd.c
index 29af5b3073b..11ee021ee3c 100644
--- a/sys/arch/sparc/dev/fd.c
+++ b/sys/arch/sparc/dev/fd.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: fd.c,v 1.26 2002/03/14 01:26:42 millert Exp $	*/
+/*	$OpenBSD: fd.c,v 1.27 2002/04/28 03:51:19 art Exp $	*/
 /*	$NetBSD: fd.c,v 1.51 1997/05/24 20:16:19 pk Exp $	*/
 
 /*-
@@ -250,7 +250,7 @@ void	fd_do_eject(struct fd_softc *);
 void	fd_mountroot_hook(struct device *);
 static void fdconf(struct fdc_softc *);
 
-#if PIL_FDSOFT == 4
+#if IPL_FDSOFT == 4
 #define IE_FDSOFT	IE_L4
 #else
 #error 4
@@ -260,7 +260,7 @@ static void fdconf(struct fdc_softc *);
 #if defined(SUN4M)
 #define FD_SET_SWINTR do {		\
 	if (CPU_ISSUN4M)		\
-		raise(0, PIL_FDSOFT);	\
+		raise(0, IPL_FDSOFT);	\
 	else				\
 		ienab_bis(IE_L4);	\
 } while(0)
@@ -395,7 +395,7 @@ fdcattach(parent, self, aux)
 #endif
 	fdc->sc_sih.ih_fun = (void *)fdcswintr;
 	fdc->sc_sih.ih_arg = fdc;
-	intr_establish(PIL_FDSOFT, &fdc->sc_sih);
+	intr_establish(IPL_FDSOFT, &fdc->sc_sih);
 
 	/* Assume a 82077 */
 	fdc->sc_reg_msr = &((struct fdreg_77 *)fdc->sc_reg)->fd_msr;
@@ -446,7 +446,7 @@ fdcattach(parent, self, aux)
 
 	evcnt_attach(&fdc->sc_dev, "intr", &fdc->sc_intrcnt);
 
-	printf(" pri %d, softpri %d: chip 8207%c\n", pri, PIL_FDSOFT, code);
+	printf(" pri %d, softpri %d: chip 8207%c\n", pri, IPL_FDSOFT, code);
 
 	/*
 	 * Controller and drives are represented by one and the same
diff --git a/sys/arch/sparc/dev/magma.c b/sys/arch/sparc/dev/magma.c
index 9a1ffefdb3c..be53eae701f 100644
--- a/sys/arch/sparc/dev/magma.c
+++ b/sys/arch/sparc/dev/magma.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: magma.c,v 1.11 2002/03/14 03:48:56 jason Exp $	*/
+/*	$OpenBSD: magma.c,v 1.12 2002/04/28 03:51:19 art Exp $	*/
 /*
  * magma.c
  *
@@ -71,11 +71,11 @@
 /*
  * Select tty soft interrupt bit based on TTY ipl. (stole from zs.c)
  */
-#if PIL_TTY == 1
+#if IPL_TTY == 1
 # define IE_MSOFT IE_L1
-#elif PIL_TTY == 4
+#elif IPL_TTY == 4
 # define IE_MSOFT IE_L4
-#elif PIL_TTY == 6
+#elif IPL_TTY == 6
 # define IE_MSOFT IE_L6
 #else
 # error "no suitable software interrupt bit"
@@ -396,7 +396,7 @@ void *base;
 	}
 
 	dprintf((" addr 0x%x", sc));
-	printf(" pri %d softpri %d:", ra->ra_intr[0].int_pri, PIL_TTY);
+	printf(" pri %d softpri %d:", ra->ra_intr[0].int_pri, IPL_TTY);
 	printf(" %s\n", card->mb_realname);
 
 	sc->ms_board = card;
@@ -469,7 +469,7 @@ void *base;
 
 	sc->ms_softint.ih_fun = magma_soft;
 	sc->ms_softint.ih_arg = sc;
-	intr_establish(PIL_TTY, &sc->ms_softint);
+	intr_establish(IPL_TTY, &sc->ms_softint);
 }
 
 /*
@@ -686,7 +686,7 @@ int needsoftint = 0;
 	if( needsoftint ) {	/* trigger the soft interrupt */
 #if defined(SUN4M)
 		if( CPU_ISSUN4M )
-			raise(0, PIL_TTY);
+			raise(0, IPL_TTY);
 		else
 #endif
 			ienab_bis(IE_MSOFT);
diff --git a/sys/arch/sparc/dev/spif.c b/sys/arch/sparc/dev/spif.c
index 99e06b56e32..9d5dbc018f7 100644
--- a/sys/arch/sparc/dev/spif.c
+++ b/sys/arch/sparc/dev/spif.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: spif.c,v 1.10 2002/03/14 01:26:43 millert Exp $	*/
+/*	$OpenBSD: spif.c,v 1.11 2002/04/28 03:51:19 art Exp $	*/
 
 /*
  * Copyright (c) 1999 Jason L. Wright (jason@thought.net)
@@ -58,11 +58,11 @@
 #include <sparc/dev/spifreg.h>
 #include <sparc/dev/spifvar.h>
 
-#if PIL_TTY == 1
+#if IPL_TTY == 1
 # define IE_MSOFT IE_L1
-#elif PIL_TTY == 4
+#elif IPL_TTY == 4
 # define IE_MSOFT IE_L4
-#elif PIL_TTY == 6
+#elif IPL_TTY == 6
 # define IE_MSOFT IE_L6
 #else
 # error "no suitable software interrupt bit"
@@ -205,7 +205,7 @@ spifattach(parent, self, aux)
 	sc->sc_regs->stc.gscr3 = 0;
 	printf(": rev %x chiprev %x osc %sMhz stcpri %d ppcpri %d softpri %d\n",
 	    sc->sc_rev, sc->sc_rev2, clockfreq(sc->sc_osc),
-	    stcpri, ppcpri, PIL_TTY);
+	    stcpri, ppcpri, IPL_TTY);
 
 	(void)config_found(self, sttymatch, NULL);
 	(void)config_found(self, sbppmatch, NULL);
@@ -220,7 +220,7 @@ spifattach(parent, self, aux)
 
 	sc->sc_softih.ih_fun = spifsoftintr;
 	sc->sc_softih.ih_arg = sc;
-	intr_establish(PIL_TTY, &sc->sc_softih);
+	intr_establish(IPL_TTY, &sc->sc_softih);
 
 	sbus_establish(&sc->sc_sd, &sc->sc_dev);
 }
@@ -885,7 +885,7 @@ spifstcintr(vsc)
 	if (needsoft) {
 #if defined(SUN4M)
 		if (CPU_ISSUN4M)
-			raise(0, PIL_TTY);
+			raise(0, IPL_TTY);
 		else
 #endif
 			ienab_bis(IE_MSOFT);
diff --git a/sys/arch/sparc/dev/zs.c b/sys/arch/sparc/dev/zs.c
index 5cbda3bb015..d535aa8ae39 100644
--- a/sys/arch/sparc/dev/zs.c
+++ b/sys/arch/sparc/dev/zs.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: zs.c,v 1.33 2002/03/14 01:26:43 millert Exp $	*/
+/*	$OpenBSD: zs.c,v 1.34 2002/04/28 03:51:19 art Exp $	*/
 /*	$NetBSD: zs.c,v 1.49 1997/08/31 21:26:37 pk Exp $ */
 
 /*
@@ -104,11 +104,11 @@
 /*
  * Select software interrupt bit based on TTY ipl.
  */
-#if PIL_TTY == 1
+#if IPL_TTY == 1
 # define IE_ZSSOFT IE_L1
-#elif PIL_TTY == 4
+#elif IPL_TTY == 4
 # define IE_ZSSOFT IE_L4
-#elif PIL_TTY == 6
+#elif IPL_TTY == 6
 # define IE_ZSSOFT IE_L6
 #else
 # error "no suitable software interrupt bit"
@@ -292,12 +292,12 @@ zsattach(parent, dev, aux)
 		return;
 	}
 	pri = ra->ra_intr[0].int_pri;
-	printf(" pri %d, softpri %d\n", pri, PIL_TTY);
+	printf(" pri %d, softpri %d\n", pri, IPL_TTY);
 	if (!didintr) {
 		didintr = 1;
 		prevpri = pri;
 		intr_establish(pri, &levelhard);
-		intr_establish(PIL_TTY, &levelsoft);
+		intr_establish(IPL_TTY, &levelsoft);
 	} else if (pri != prevpri)
 		panic("broken zs interrupt scheme");
 	sc = (struct zs_softc *)dev;
@@ -939,7 +939,7 @@ zshard(intrarg)
 			/* XXX -- but this will go away when zshard moves to locore.s */
 			struct clockframe *p = intrarg;
 
-			if ((p->psr & PSR_PIL) < (PIL_TTY << 8)) {
+			if ((p->psr & PSR_PIL) < (IPL_TTY << 8)) {
 				zsshortcuts++;
 				(void) spltty();
 				if (zshardscope) {
@@ -953,7 +953,7 @@ zshard(intrarg)
 
 #if defined(SUN4M)
 		if (CPU_ISSUN4M)
-			raise(0, PIL_TTY);
+			raise(0, IPL_TTY);
 		else
 #endif
 		ienab_bis(IE_ZSSOFT);
diff --git a/sys/arch/sparc/include/psl.h b/sys/arch/sparc/include/psl.h
index 11ee3b022b2..65df0b5218f 100644
--- a/sys/arch/sparc/include/psl.h
+++ b/sys/arch/sparc/include/psl.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: psl.h,v 1.9 2002/03/14 01:26:43 millert Exp $	*/
+/*	$OpenBSD: psl.h,v 1.10 2002/04/28 03:51:19 art Exp $	*/
 /*	$NetBSD: psl.h,v 1.12 1997/03/10 21:49:11 pk Exp $ */
 
 /*
@@ -76,7 +76,27 @@
 
 #define	PSR_BITS "\20\16EC\15EF\10S\7PS\6ET"
 
-#define	PIL_CLOCK	10
+/*
+ * Various interrupt levels.
+ */
+#define IPL_SOFTINT	1
+#define IPL_SOFTCLOCK	IPL_SOFTINT	/* softclock() interrupts */
+#define IPL_SOFTNET	IPL_SOFTINT	/* soft network interrupts */
+#define IPL_AUSOFT	4		/* audio soft interrupts */
+#define IPL_FDSOFT	4		/* floppy soft interrupts */
+#define IPL_BIO		5		/* block devices are at 5 and below */
+#define IPL_NET		6		/* network hardware at 6 or below */
+#define IPL_TTY		6		/* tty soft interrupts */
+#define IPL_VM		7		/* max(BIO, NET, TTY) */
+#define	IPL_CLOCK	10		/* hardclock() */
+#define IPL_FD		11		/* hard floppy interrupts. */
+#define IPL_ZS		12		/* zs interrupts */
+/*
+ * XXX - this is called AUHARD instead of AUDIO because of some confusion
+ * with how MI audio code handles this. Stay tuned for a change in the future
+ */
+#define IPL_AUHARD	13		/* hard audio interrupts */
+#define IPL_STATCLOCK	14		/* statclock() */
 
 #if defined(_KERNEL) && !defined(_LOCORE)
 
@@ -143,7 +163,7 @@ static __inline int spl0()
  */
 #define	SPL(name, newipl) \
 static __inline int name(void); \
-static __inline int name() \
+ static __inline int name() \
 { \
 	int psr, oldipl; \
 	__asm __volatile("rd %%psr,%0" : "=r" (psr)); \
@@ -171,56 +191,24 @@ static __inline int name() \
 	return (oldipl); \
 }
 
-SPLHOLD(splsoftint, 1)
+SPLHOLD(splsoftint, IPL_SOFTINT)
 #define	splsoftclock		splsoftint
 #define	splsoftnet		splsoftint
-
-SPL(spllowersoftclock, 1)
-
-/* audio software interrupts are at software level 4 */
-#define	PIL_AUSOFT	4
-SPLHOLD(splausoft, PIL_AUSOFT)
-
-/* floppy software interrupts are at software level 4 too */
-#define PIL_FDSOFT	4
-SPLHOLD(splfdsoft, PIL_FDSOFT)
-
-/* Block devices */
-#define PIL_BIO 5
-SPLHOLD(splbio, PIL_BIO)
-
-/* network hardware interrupts are at level 6 */
-#define	PIL_NET	6
-SPLHOLD(splnet, PIL_NET)
-
-/* tty input runs at software level 6 */
-#define	PIL_TTY	6
-SPLHOLD(spltty, PIL_TTY)
-
-/*
- * Memory allocation (must be as high as highest network, tty, or disk device)
- */
-SPLHOLD(splimp, 7)
-SPLHOLD(splvm, 7)
-
-/*
- * remove.
- */
-SPLHOLD(splpmap, 7)
-
-SPLHOLD(splclock, PIL_CLOCK)
-
-/* fd hardware interrupts are at level 11 */
-SPLHOLD(splfd, 11)
-
-/* zs hardware interrupts are at level 12 */
-SPLHOLD(splzs, 12)
-
-/* audio hardware interrupts are at level 13 */
-SPLHOLD(splaudio, 13)
-
-/* second sparc timer interrupts at level 14 */
-SPLHOLD(splstatclock, 14)
+SPL(spllowersoftclock, IPL_SOFTCLOCK)
+SPLHOLD(splausoft, IPL_AUSOFT)
+SPLHOLD(splfdsoft, IPL_FDSOFT)
+SPLHOLD(splbio, IPL_BIO)
+SPLHOLD(splnet, IPL_NET)
+SPLHOLD(spltty, IPL_TTY)
+SPLHOLD(splvm, IPL_VM)
+/* XXX - the following two should die. */
+#define splimp splvm
+#define splpmap splvm
+SPLHOLD(splclock, IPL_CLOCK)
+SPLHOLD(splfd, IPL_FD)
+SPLHOLD(splzs, IPL_ZS)
+SPLHOLD(splaudio, IPL_AUHARD)
+SPLHOLD(splstatclock, IPL_STATCLOCK)
 
 static __inline int splhigh()
 {
diff --git a/sys/arch/sparc/sparc/amd7930intr.s b/sys/arch/sparc/sparc/amd7930intr.s
index 1ed9a15b0f1..eac7316356b 100644
--- a/sys/arch/sparc/sparc/amd7930intr.s
+++ b/sys/arch/sparc/sparc/amd7930intr.s
@@ -1,4 +1,4 @@
-/*	$OpenBSD: amd7930intr.s,v 1.5 2001/05/10 10:34:44 art Exp $	*/
+/*	$OpenBSD: amd7930intr.s,v 1.6 2002/04/28 03:51:19 art Exp $	*/
 /*	$NetBSD: amd7930intr.s,v 1.10 1997/03/11 01:03:07 pk Exp $	*/
 /*
  * Copyright (c) 1995 Rolf Grossmann.
@@ -57,7 +57,7 @@
 	or	%l6, IE_L4, %l6;			\
 	stb	%l6, [%l5 + %lo(INTRREG_VA)]
 
-! raise(0,PIL_AUSOFT)	! NOTE: CPU#0 and PIL_AUSOFT=4
+! raise(0,IPL_AUSOFT)	! NOTE: CPU#0 and IPL_AUSOFT=4
 #define AUDIO_SET_SWINTR_4M				\
 	sethi	%hi(1 << (16 + 4)), %l5;		\
 	set	ICR_PI_SET, %l6;			\
diff --git a/sys/arch/sparc/sparc/bsd_fdintr.s b/sys/arch/sparc/sparc/bsd_fdintr.s
index 9b4c63c728c..76115dd2ee8 100644
--- a/sys/arch/sparc/sparc/bsd_fdintr.s
+++ b/sys/arch/sparc/sparc/bsd_fdintr.s
@@ -1,4 +1,4 @@
-/*	$OpenBSD: bsd_fdintr.s,v 1.6 2001/05/10 10:34:45 art Exp $	*/
+/*	$OpenBSD: bsd_fdintr.s,v 1.7 2002/04/28 03:51:19 art Exp $	*/
 /*	$NetBSD: bsd_fdintr.s,v 1.11 1997/04/07 21:00:36 pk Exp $ */
 
 /*
@@ -48,7 +48,7 @@
 	or	%l6, IE_L4, %l6;			\
 	stb	%l6, [%l5 + %lo(INTRREG_VA)]
 
-! raise(0,PIL_AUSOFT)	! NOTE: CPU#0 and PIL_AUSOFT=4
+! raise(0,IPL_AUSOFT)	! NOTE: CPU#0 and IPL_AUSOFT=4
 #define FD_SET_SWINTR_4M				\
 	sethi	%hi(1 << (16 + 4)), %l5;		\
 	set	ICR_PI_SET, %l6;			\
diff --git a/sys/arch/sparc/sparc/locore.s b/sys/arch/sparc/sparc/locore.s
index 8f72d13392d..b5709500930 100644
--- a/sys/arch/sparc/sparc/locore.s
+++ b/sys/arch/sparc/sparc/locore.s
@@ -1,4 +1,4 @@
-/*	$OpenBSD: locore.s,v 1.47 2002/04/27 15:00:16 art Exp $	*/
+/*	$OpenBSD: locore.s,v 1.48 2002/04/28 03:51:19 art Exp $	*/
 /*	$NetBSD: locore.s,v 1.73 1997/09/13 20:36:48 pk Exp $	*/
 
 /*
@@ -4467,7 +4467,7 @@ idle:
 	ld	[%g2 + %lo(_whichqs)], %o3
 	tst	%o3
 	bnz,a	Lsw_scan
-	 wr	%g1, PIL_CLOCK << 8, %psr	! (void) splclock();
+	 wr	%g1, IPL_CLOCK << 8, %psr	! (void) splclock();
 	b,a	1b
 
 Lsw_panic_rq:
@@ -4539,7 +4539,7 @@ ENTRY(cpu_switch)
 	st	%g0, [%g7 + %lo(_curproc)]	! curproc = NULL;
 	wr	%g1, 0, %psr			! (void) spl0();
 	nop; nop; nop				! paranoia
-	wr	%g1, PIL_CLOCK << 8 , %psr	! (void) splclock();
+	wr	%g1, IPL_CLOCK << 8 , %psr	! (void) splclock();
 
 Lsw_scan:
 	nop; nop; nop				! paranoia
@@ -4652,7 +4652,7 @@ Lsw_scan:
 	 */
 	tst	%g4
 	be,a	Lsw_load		! if no old process, go load
-	 wr	%g1, (PIL_CLOCK << 8) | PSR_ET, %psr
+	 wr	%g1, (IPL_CLOCK << 8) | PSR_ET, %psr
 
 	INCR(_nswitchdiff)		! clobbers %o0,%o1
 	/*
@@ -4666,15 +4666,15 @@ wb1:	SAVE; SAVE; SAVE; SAVE; SAVE; SAVE; SAVE	/* 7 of each: */
 	/*
 	 * Load the new process.  To load, we must change stacks and
 	 * alter cpcb and %wim, hence we must disable traps.  %psr is
-	 * currently equal to oldpsr (%g1) ^ (PIL_CLOCK << 8);
+	 * currently equal to oldpsr (%g1) ^ (IPL_CLOCK << 8);
 	 * this means that PSR_ET is on.  Likewise, PSR_ET is on
 	 * in newpsr (%g2), although we do not know newpsr's ipl.
 	 *
 	 * We also must load up the `in' and `local' registers.
 	 */
-	wr	%g1, (PIL_CLOCK << 8) | PSR_ET, %psr
+	wr	%g1, (IPL_CLOCK << 8) | PSR_ET, %psr
 Lsw_load:
-!	wr	%g1, (PIL_CLOCK << 8) | PSR_ET, %psr	! done above
+!	wr	%g1, (IPL_CLOCK << 8) | PSR_ET, %psr	! done above
 	/* compute new wim */
 	ld	[%g5 + PCB_WIM], %o0
 	mov	1, %o1