Import LLVM 10.0.0 release including clang, lld and lldb.

ok hackroom
tested by plenty

1 files changed, 147 insertions, 261 deletions

diff --git a/gnu/llvm/llvm/include/llvm/BinaryFormat/ELF.h b/gnu/llvm/llvm/include/llvm/BinaryFormat/ELF.h
index 6148f968cdb..caab91da9c8 100644
--- a/gnu/llvm/llvm/include/llvm/BinaryFormat/ELF.h
+++ b/gnu/llvm/llvm/include/llvm/BinaryFormat/ELF.h
@@ -19,10 +19,8 @@
 #ifndef LLVM_BINARYFORMAT_ELF_H
 #define LLVM_BINARYFORMAT_ELF_H
 
-#include "llvm/ADT/StringRef.h"
 #include <cstdint>
 #include <cstring>
-#include <string>
 
 namespace llvm {
 namespace ELF {
@@ -109,17 +107,13 @@ struct Elf64_Ehdr {
   unsigned char getDataEncoding() const { return e_ident[EI_DATA]; }
 };
 
-// File types.
-// See current registered ELF types at:
-//    http://www.sco.com/developers/gabi/latest/ch4.eheader.html
+// File types
 enum {
   ET_NONE = 0,        // No file type
   ET_REL = 1,         // Relocatable file
   ET_EXEC = 2,        // Executable file
   ET_DYN = 3,         // Shared object file
   ET_CORE = 4,        // Core file
-  ET_LOOS = 0xfe00,   // Beginning of operating system-specific codes
-  ET_HIOS = 0xfeff,   // Operating system-specific
   ET_LOPROC = 0xff00, // Beginning of processor-specific codes
   ET_HIPROC = 0xffff  // Processor-specific
 };
@@ -283,7 +277,6 @@ enum {
   EM_STM8 = 186,          // STMicroeletronics STM8 8-bit microcontroller
   EM_TILE64 = 187,        // Tilera TILE64 multicore architecture family
   EM_TILEPRO = 188,       // Tilera TILEPro multicore architecture family
-  EM_MICROBLAZE = 189,    // Xilinx MicroBlaze 32-bit RISC soft processor core
   EM_CUDA = 190,          // NVIDIA CUDA architecture
   EM_TILEGX = 191,        // Tilera TILE-Gx multicore architecture family
   EM_CLOUDSHIELD = 192,   // CloudShield architecture family
@@ -318,8 +311,6 @@ enum {
   EM_RISCV = 243,         // RISC-V
   EM_LANAI = 244,         // Lanai 32-bit processor
   EM_BPF = 247,           // Linux kernel bpf virtual machine
-  EM_VE = 251,            // NEC SX-Aurora VE
-  EM_CSKY = 252,          // C-SKY 32-bit processor
 };
 
 // Object file classes.
@@ -367,15 +358,6 @@ enum {
   ELFOSABI_LAST_ARCH = 255     // Last Architecture-specific OS ABI
 };
 
-// AMDGPU OS ABI Version identification.
-enum {
-  // ELFABIVERSION_AMDGPU_HSA_V1 does not exist because OS ABI identification
-  // was never defined for V1.
-  ELFABIVERSION_AMDGPU_HSA_V2 = 0,
-  ELFABIVERSION_AMDGPU_HSA_V3 = 1,
-  ELFABIVERSION_AMDGPU_HSA_V4 = 2
-};
-
 #define ELF_RELOC(name, value) name = value,
 
 // X86_64 relocations.
@@ -411,6 +393,12 @@ static inline int64_t decodePPC64LocalEntryOffset(unsigned Other) {
   unsigned Val = (Other & STO_PPC64_LOCAL_MASK) >> STO_PPC64_LOCAL_BIT;
   return ((1 << Val) >> 2) << 2;
 }
+static inline unsigned encodePPC64LocalEntryOffset(int64_t Offset) {
+  unsigned Val =
+      (Offset >= 4 * 4 ? (Offset >= 8 * 4 ? (Offset >= 16 * 4 ? 6 : 5) : 4)
+                       : (Offset >= 2 * 4 ? 3 : (Offset >= 1 * 4 ? 2 : 0)));
+  return Val << STO_PPC64_LOCAL_BIT;
+}
 
 // ELF Relocation types for PPC64
 enum {
@@ -422,12 +410,6 @@ enum {
 #include "ELFRelocs/AArch64.def"
 };
 
-// Special values for the st_other field in the symbol table entry for AArch64.
-enum {
-  // Symbol may follow different calling convention than base PCS.
-  STO_AARCH64_VARIANT_PCS = 0x80
-};
-
 // ARM Specific e_flags
 enum : unsigned {
   EF_ARM_SOFT_FLOAT = 0x00000200U,     // Legacy pre EABI_VER5
@@ -488,12 +470,7 @@ enum : unsigned {
   EF_AVR_ARCH_XMEGA4 = 104,
   EF_AVR_ARCH_XMEGA5 = 105,
   EF_AVR_ARCH_XMEGA6 = 106,
-  EF_AVR_ARCH_XMEGA7 = 107,
-
-  EF_AVR_ARCH_MASK = 0x7f, // EF_AVR_ARCH_xxx selection mask
-
-  EF_AVR_LINKRELAX_PREPARED = 0x80, // The file is prepared for linker
-                                    // relaxation to be applied
+  EF_AVR_ARCH_XMEGA7 = 107
 };
 
 // ELF Relocation types for AVR
@@ -596,18 +573,15 @@ enum {
 // Hexagon-specific e_flags
 enum {
   // Object processor version flags, bits[11:0]
-  EF_HEXAGON_MACH_V2 = 0x00000001,   // Hexagon V2
-  EF_HEXAGON_MACH_V3 = 0x00000002,   // Hexagon V3
-  EF_HEXAGON_MACH_V4 = 0x00000003,   // Hexagon V4
-  EF_HEXAGON_MACH_V5 = 0x00000004,   // Hexagon V5
-  EF_HEXAGON_MACH_V55 = 0x00000005,  // Hexagon V55
-  EF_HEXAGON_MACH_V60 = 0x00000060,  // Hexagon V60
-  EF_HEXAGON_MACH_V62 = 0x00000062,  // Hexagon V62
-  EF_HEXAGON_MACH_V65 = 0x00000065,  // Hexagon V65
-  EF_HEXAGON_MACH_V66 = 0x00000066,  // Hexagon V66
-  EF_HEXAGON_MACH_V67 = 0x00000067,  // Hexagon V67
-  EF_HEXAGON_MACH_V67T = 0x00008067, // Hexagon V67T
-  EF_HEXAGON_MACH_V68 = 0x00000068,  // Hexagon V68
+  EF_HEXAGON_MACH_V2 = 0x00000001,  // Hexagon V2
+  EF_HEXAGON_MACH_V3 = 0x00000002,  // Hexagon V3
+  EF_HEXAGON_MACH_V4 = 0x00000003,  // Hexagon V4
+  EF_HEXAGON_MACH_V5 = 0x00000004,  // Hexagon V5
+  EF_HEXAGON_MACH_V55 = 0x00000005, // Hexagon V55
+  EF_HEXAGON_MACH_V60 = 0x00000060, // Hexagon V60
+  EF_HEXAGON_MACH_V62 = 0x00000062, // Hexagon V62
+  EF_HEXAGON_MACH_V65 = 0x00000065, // Hexagon V65
+  EF_HEXAGON_MACH_V66 = 0x00000066, // Hexagon V66
 
   // Highest ISA version flags
   EF_HEXAGON_ISA_MACH = 0x00000000, // Same as specified in bits[11:0]
@@ -621,8 +595,6 @@ enum {
   EF_HEXAGON_ISA_V62 = 0x00000062,  // Hexagon V62 ISA
   EF_HEXAGON_ISA_V65 = 0x00000065,  // Hexagon V65 ISA
   EF_HEXAGON_ISA_V66 = 0x00000066,  // Hexagon V66 ISA
-  EF_HEXAGON_ISA_V67 = 0x00000067,  // Hexagon V67 ISA
-  EF_HEXAGON_ISA_V68 = 0x00000068,  // Hexagon V68 ISA
 };
 
 // Hexagon-specific section indexes for common small data
@@ -710,96 +682,47 @@ enum : unsigned {
   EF_AMDGPU_MACH_R600_LAST = EF_AMDGPU_MACH_R600_TURKS,
 
   // AMDGCN-based processors.
-  EF_AMDGPU_MACH_AMDGCN_GFX600        = 0x020,
-  EF_AMDGPU_MACH_AMDGCN_GFX601        = 0x021,
-  EF_AMDGPU_MACH_AMDGCN_GFX700        = 0x022,
-  EF_AMDGPU_MACH_AMDGCN_GFX701        = 0x023,
-  EF_AMDGPU_MACH_AMDGCN_GFX702        = 0x024,
-  EF_AMDGPU_MACH_AMDGCN_GFX703        = 0x025,
-  EF_AMDGPU_MACH_AMDGCN_GFX704        = 0x026,
-  EF_AMDGPU_MACH_AMDGCN_RESERVED_0X27 = 0x027,
-  EF_AMDGPU_MACH_AMDGCN_GFX801        = 0x028,
-  EF_AMDGPU_MACH_AMDGCN_GFX802        = 0x029,
-  EF_AMDGPU_MACH_AMDGCN_GFX803        = 0x02a,
-  EF_AMDGPU_MACH_AMDGCN_GFX810        = 0x02b,
-  EF_AMDGPU_MACH_AMDGCN_GFX900        = 0x02c,
-  EF_AMDGPU_MACH_AMDGCN_GFX902        = 0x02d,
-  EF_AMDGPU_MACH_AMDGCN_GFX904        = 0x02e,
-  EF_AMDGPU_MACH_AMDGCN_GFX906        = 0x02f,
-  EF_AMDGPU_MACH_AMDGCN_GFX908        = 0x030,
-  EF_AMDGPU_MACH_AMDGCN_GFX909        = 0x031,
-  EF_AMDGPU_MACH_AMDGCN_GFX90C        = 0x032,
-  EF_AMDGPU_MACH_AMDGCN_GFX1010       = 0x033,
-  EF_AMDGPU_MACH_AMDGCN_GFX1011       = 0x034,
-  EF_AMDGPU_MACH_AMDGCN_GFX1012       = 0x035,
-  EF_AMDGPU_MACH_AMDGCN_GFX1030       = 0x036,
-  EF_AMDGPU_MACH_AMDGCN_GFX1031       = 0x037,
-  EF_AMDGPU_MACH_AMDGCN_GFX1032       = 0x038,
-  EF_AMDGPU_MACH_AMDGCN_GFX1033       = 0x039,
-  EF_AMDGPU_MACH_AMDGCN_GFX602        = 0x03a,
-  EF_AMDGPU_MACH_AMDGCN_GFX705        = 0x03b,
-  EF_AMDGPU_MACH_AMDGCN_GFX805        = 0x03c,
-  EF_AMDGPU_MACH_AMDGCN_GFX1035       = 0x03d,
-  EF_AMDGPU_MACH_AMDGCN_GFX1034       = 0x03e,
-  EF_AMDGPU_MACH_AMDGCN_GFX90A        = 0x03f,
-  EF_AMDGPU_MACH_AMDGCN_RESERVED_0X40 = 0x040,
-  EF_AMDGPU_MACH_AMDGCN_RESERVED_0X41 = 0x041,
-  EF_AMDGPU_MACH_AMDGCN_GFX1013       = 0x042,
-  EF_AMDGPU_MACH_AMDGCN_RESERVED_0X43 = 0x043,
-  EF_AMDGPU_MACH_AMDGCN_RESERVED_0X44 = 0x044,
-  EF_AMDGPU_MACH_AMDGCN_RESERVED_0X45 = 0x045,
+
+  // AMDGCN GFX6.
+  EF_AMDGPU_MACH_AMDGCN_GFX600 = 0x020,
+  EF_AMDGPU_MACH_AMDGCN_GFX601 = 0x021,
+  // AMDGCN GFX7.
+  EF_AMDGPU_MACH_AMDGCN_GFX700 = 0x022,
+  EF_AMDGPU_MACH_AMDGCN_GFX701 = 0x023,
+  EF_AMDGPU_MACH_AMDGCN_GFX702 = 0x024,
+  EF_AMDGPU_MACH_AMDGCN_GFX703 = 0x025,
+  EF_AMDGPU_MACH_AMDGCN_GFX704 = 0x026,
+  // AMDGCN GFX8.
+  EF_AMDGPU_MACH_AMDGCN_GFX801 = 0x028,
+  EF_AMDGPU_MACH_AMDGCN_GFX802 = 0x029,
+  EF_AMDGPU_MACH_AMDGCN_GFX803 = 0x02a,
+  EF_AMDGPU_MACH_AMDGCN_GFX810 = 0x02b,
+  // AMDGCN GFX9.
+  EF_AMDGPU_MACH_AMDGCN_GFX900 = 0x02c,
+  EF_AMDGPU_MACH_AMDGCN_GFX902 = 0x02d,
+  EF_AMDGPU_MACH_AMDGCN_GFX904 = 0x02e,
+  EF_AMDGPU_MACH_AMDGCN_GFX906 = 0x02f,
+  EF_AMDGPU_MACH_AMDGCN_GFX908 = 0x030,
+  EF_AMDGPU_MACH_AMDGCN_GFX909 = 0x031,
+  // AMDGCN GFX10.
+  EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033,
+  EF_AMDGPU_MACH_AMDGCN_GFX1011 = 0x034,
+  EF_AMDGPU_MACH_AMDGCN_GFX1012 = 0x035,
+
+  // Reserved for AMDGCN-based processors.
+  EF_AMDGPU_MACH_AMDGCN_RESERVED0 = 0x027,
+  EF_AMDGPU_MACH_AMDGCN_RESERVED1 = 0x032,
 
   // First/last AMDGCN-based processors.
   EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
-  EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_RESERVED_0X45,
-
-  // Indicates if the "xnack" target feature is enabled for all code contained
-  // in the object.
-  //
-  // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V2.
-  EF_AMDGPU_FEATURE_XNACK_V2 = 0x01,
-  // Indicates if the trap handler is enabled for all code contained
-  // in the object.
-  //
-  // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V2.
-  EF_AMDGPU_FEATURE_TRAP_HANDLER_V2 = 0x02,
+  EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX1012,
 
   // Indicates if the "xnack" target feature is enabled for all code contained
   // in the object.
-  //
-  // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V3.
-  EF_AMDGPU_FEATURE_XNACK_V3 = 0x100,
-  // Indicates if the "sramecc" target feature is enabled for all code
+  EF_AMDGPU_XNACK = 0x100,
+  // Indicates if the "sram-ecc" target feature is enabled for all code
   // contained in the object.
-  //
-  // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V3.
-  EF_AMDGPU_FEATURE_SRAMECC_V3 = 0x200,
-
-  // XNACK selection mask for EF_AMDGPU_FEATURE_XNACK_* values.
-  //
-  // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V4.
-  EF_AMDGPU_FEATURE_XNACK_V4 = 0x300,
-  // XNACK is not supported.
-  EF_AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4 = 0x000,
-  // XNACK is any/default/unspecified.
-  EF_AMDGPU_FEATURE_XNACK_ANY_V4 = 0x100,
-  // XNACK is off.
-  EF_AMDGPU_FEATURE_XNACK_OFF_V4 = 0x200,
-  // XNACK is on.
-  EF_AMDGPU_FEATURE_XNACK_ON_V4 = 0x300,
-
-  // SRAMECC selection mask for EF_AMDGPU_FEATURE_SRAMECC_* values.
-  //
-  // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V4.
-  EF_AMDGPU_FEATURE_SRAMECC_V4 = 0xc00,
-  // SRAMECC is not supported.
-  EF_AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4 = 0x000,
-  // SRAMECC is any/default/unspecified.
-  EF_AMDGPU_FEATURE_SRAMECC_ANY_V4 = 0x400,
-  // SRAMECC is off.
-  EF_AMDGPU_FEATURE_SRAMECC_OFF_V4 = 0x800,
-  // SRAMECC is on.
-  EF_AMDGPU_FEATURE_SRAMECC_ON_V4 = 0xc00,
+  EF_AMDGPU_SRAM_ECC = 0x200,
 };
 
 // ELF Relocation types for AMDGPU
@@ -812,11 +735,6 @@ enum {
 #include "ELFRelocs/BPF.def"
 };
 
-// ELF Relocation types for M68k
-enum {
-#include "ELFRelocs/M68k.def"
-};
-
 // MSP430 specific e_flags
 enum : unsigned {
   EF_MSP430_MACH_MSP430x11 = 11,
@@ -849,17 +767,6 @@ enum {
 #include "ELFRelocs/MSP430.def"
 };
 
-// ELF Relocation type for VE.
-enum {
-#include "ELFRelocs/VE.def"
-};
-
-
-// ELF Relocation types for CSKY
-enum {
-#include "ELFRelocs/CSKY.def"
-};
-
 #undef ELF_RELOC
 
 // Section header.
@@ -906,52 +813,50 @@ enum {
 
 // Section types.
 enum : unsigned {
-  SHT_NULL = 0,           // No associated section (inactive entry).
-  SHT_PROGBITS = 1,       // Program-defined contents.
-  SHT_SYMTAB = 2,         // Symbol table.
-  SHT_STRTAB = 3,         // String table.
-  SHT_RELA = 4,           // Relocation entries; explicit addends.
-  SHT_HASH = 5,           // Symbol hash table.
-  SHT_DYNAMIC = 6,        // Information for dynamic linking.
-  SHT_NOTE = 7,           // Information about the file.
-  SHT_NOBITS = 8,         // Data occupies no space in the file.
-  SHT_REL = 9,            // Relocation entries; no explicit addends.
-  SHT_SHLIB = 10,         // Reserved.
-  SHT_DYNSYM = 11,        // Symbol table.
-  SHT_INIT_ARRAY = 14,    // Pointers to initialization functions.
-  SHT_FINI_ARRAY = 15,    // Pointers to termination functions.
-  SHT_PREINIT_ARRAY = 16, // Pointers to pre-init functions.
-  SHT_GROUP = 17,         // Section group.
-  SHT_SYMTAB_SHNDX = 18,  // Indices for SHN_XINDEX entries.
+  SHT_NULL = 0,                         // No associated section (inactive entry).
+  SHT_PROGBITS = 1,                     // Program-defined contents.
+  SHT_SYMTAB = 2,                       // Symbol table.
+  SHT_STRTAB = 3,                       // String table.
+  SHT_RELA = 4,                         // Relocation entries; explicit addends.
+  SHT_HASH = 5,                         // Symbol hash table.
+  SHT_DYNAMIC = 6,                      // Information for dynamic linking.
+  SHT_NOTE = 7,                         // Information about the file.
+  SHT_NOBITS = 8,                       // Data occupies no space in the file.
+  SHT_REL = 9,                          // Relocation entries; no explicit addends.
+  SHT_SHLIB = 10,                       // Reserved.
+  SHT_DYNSYM = 11,                      // Symbol table.
+  SHT_INIT_ARRAY = 14,                  // Pointers to initialization functions.
+  SHT_FINI_ARRAY = 15,                  // Pointers to termination functions.
+  SHT_PREINIT_ARRAY = 16,               // Pointers to pre-init functions.
+  SHT_GROUP = 17,                       // Section group.
+  SHT_SYMTAB_SHNDX = 18,                // Indices for SHN_XINDEX entries.
   // Experimental support for SHT_RELR sections. For details, see proposal
   // at https://groups.google.com/forum/#!topic/generic-abi/bX460iggiKg
-  SHT_RELR = 19,         // Relocation entries; only offsets.
-  SHT_LOOS = 0x60000000, // Lowest operating system-specific type.
+  SHT_RELR = 19,                        // Relocation entries; only offsets.
+  SHT_LOOS = 0x60000000,                // Lowest operating system-specific type.
   // Android packed relocation section types.
   // https://android.googlesource.com/platform/bionic/+/6f12bfece5dcc01325e0abba56a46b1bcf991c69/tools/relocation_packer/src/elf_file.cc#37
   SHT_ANDROID_REL = 0x60000001,
   SHT_ANDROID_RELA = 0x60000002,
   SHT_LLVM_ODRTAB = 0x6fff4c00,         // LLVM ODR table.
   SHT_LLVM_LINKER_OPTIONS = 0x6fff4c01, // LLVM Linker Options.
+  SHT_LLVM_CALL_GRAPH_PROFILE = 0x6fff4c02, // LLVM Call Graph Profile.
   SHT_LLVM_ADDRSIG = 0x6fff4c03,        // List of address-significant symbols
                                         // for safe ICF.
-  SHT_LLVM_DEPENDENT_LIBRARIES =
-      0x6fff4c04,                    // LLVM Dependent Library Specifiers.
-  SHT_LLVM_SYMPART = 0x6fff4c05,     // Symbol partition specification.
-  SHT_LLVM_PART_EHDR = 0x6fff4c06,   // ELF header for loadable partition.
-  SHT_LLVM_PART_PHDR = 0x6fff4c07,   // Phdrs for loadable partition.
-  SHT_LLVM_BB_ADDR_MAP = 0x6fff4c08, // LLVM Basic Block Address Map.
-  SHT_LLVM_CALL_GRAPH_PROFILE = 0x6fff4c09, // LLVM Call Graph Profile.
+  SHT_LLVM_DEPENDENT_LIBRARIES = 0x6fff4c04, // LLVM Dependent Library Specifiers.
+  SHT_LLVM_SYMPART = 0x6fff4c05,        // Symbol partition specification.
+  SHT_LLVM_PART_EHDR = 0x6fff4c06,      // ELF header for loadable partition.
+  SHT_LLVM_PART_PHDR = 0x6fff4c07,      // Phdrs for loadable partition.
   // Android's experimental support for SHT_RELR sections.
   // https://android.googlesource.com/platform/bionic/+/b7feec74547f84559a1467aca02708ff61346d2a/libc/include/elf.h#512
-  SHT_ANDROID_RELR = 0x6fffff00,   // Relocation entries; only offsets.
-  SHT_GNU_ATTRIBUTES = 0x6ffffff5, // Object attributes.
-  SHT_GNU_HASH = 0x6ffffff6,       // GNU-style hash table.
-  SHT_GNU_verdef = 0x6ffffffd,     // GNU version definitions.
-  SHT_GNU_verneed = 0x6ffffffe,    // GNU version references.
-  SHT_GNU_versym = 0x6fffffff,     // GNU symbol versions table.
-  SHT_HIOS = 0x6fffffff,           // Highest operating system-specific type.
-  SHT_LOPROC = 0x70000000,         // Lowest processor arch-specific type.
+  SHT_ANDROID_RELR = 0x6fffff00,        // Relocation entries; only offsets.
+  SHT_GNU_ATTRIBUTES = 0x6ffffff5,      // Object attributes.
+  SHT_GNU_HASH = 0x6ffffff6,            // GNU-style hash table.
+  SHT_GNU_verdef = 0x6ffffffd,          // GNU version definitions.
+  SHT_GNU_verneed = 0x6ffffffe,         // GNU version references.
+  SHT_GNU_versym = 0x6fffffff,          // GNU symbol versions table.
+  SHT_HIOS = 0x6fffffff,                // Highest operating system-specific type.
+  SHT_LOPROC = 0x70000000,              // Lowest processor arch-specific type.
   // Fixme: All this is duplicated in MCSectionELF. Why??
   // Exception Index table
   SHT_ARM_EXIDX = 0x70000001U,
@@ -961,22 +866,20 @@ enum : unsigned {
   SHT_ARM_ATTRIBUTES = 0x70000003U,
   SHT_ARM_DEBUGOVERLAY = 0x70000004U,
   SHT_ARM_OVERLAYSECTION = 0x70000005U,
-  SHT_HEX_ORDERED = 0x70000000,   // Link editor is to sort the entries in
-                                  // this section based on their sizes
-  SHT_X86_64_UNWIND = 0x70000001, // Unwind information
+  SHT_HEX_ORDERED = 0x70000000,         // Link editor is to sort the entries in
+                                        // this section based on their sizes
+  SHT_X86_64_UNWIND = 0x70000001,       // Unwind information
 
-  SHT_MIPS_REGINFO = 0x70000006,  // Register usage information
-  SHT_MIPS_OPTIONS = 0x7000000d,  // General options
-  SHT_MIPS_DWARF = 0x7000001e,    // DWARF debugging section.
-  SHT_MIPS_ABIFLAGS = 0x7000002a, // ABI information.
+  SHT_MIPS_REGINFO = 0x70000006,        // Register usage information
+  SHT_MIPS_OPTIONS = 0x7000000d,        // General options
+  SHT_MIPS_DWARF = 0x7000001e,          // DWARF debugging section.
+  SHT_MIPS_ABIFLAGS = 0x7000002a,       // ABI information.
 
   SHT_MSP430_ATTRIBUTES = 0x70000003U,
 
-  SHT_RISCV_ATTRIBUTES = 0x70000003U,
-
-  SHT_HIPROC = 0x7fffffff, // Highest processor arch-specific type.
-  SHT_LOUSER = 0x80000000, // Lowest type reserved for applications.
-  SHT_HIUSER = 0xffffffff  // Highest type reserved for applications.
+  SHT_HIPROC = 0x7fffffff,              // Highest processor arch-specific type.
+  SHT_LOUSER = 0x80000000,              // Lowest type reserved for applications.
+  SHT_HIUSER = 0xffffffff               // Highest type reserved for applications.
 };
 
 // Section flags.
@@ -1015,9 +918,6 @@ enum : unsigned {
   // Identifies a section containing compressed data.
   SHF_COMPRESSED = 0x800U,
 
-  // This section should not be garbage collected by the linker.
-  SHF_GNU_RETAIN = 0x200000,
-
   // This section is excluded from the final executable or shared library.
   SHF_EXCLUDE = 0x80000000U,
 
@@ -1390,8 +1290,7 @@ enum {
   DF_1_NORELOC = 0x00400000,
   DF_1_SYMINTPOSE = 0x00800000, // Object has individual interposers.
   DF_1_GLOBAUDIT = 0x01000000,  // Global auditing required.
-  DF_1_SINGLETON = 0x02000000,  // Singleton symbols are used.
-  DF_1_PIE = 0x08000000,        // Object is a position-independent executable.
+  DF_1_SINGLETON = 0x02000000   // Singleton symbols are used.
 };
 
 // DT_MIPS_FLAGS values.
@@ -1436,9 +1335,21 @@ enum {
 // ElfXX_VerNeed structure version (GNU versioning)
 enum { VER_NEED_NONE = 0, VER_NEED_CURRENT = 1 };
 
-// SHT_NOTE section types.
+// SHT_NOTE section types
+enum {
+  NT_FREEBSD_THRMISC = 7,
+  NT_FREEBSD_PROCSTAT_PROC = 8,
+  NT_FREEBSD_PROCSTAT_FILES = 9,
+  NT_FREEBSD_PROCSTAT_VMMAP = 10,
+  NT_FREEBSD_PROCSTAT_GROUPS = 11,
+  NT_FREEBSD_PROCSTAT_UMASK = 12,
+  NT_FREEBSD_PROCSTAT_RLIMIT = 13,
+  NT_FREEBSD_PROCSTAT_OSREL = 14,
+  NT_FREEBSD_PROCSTAT_PSSTRINGS = 15,
+  NT_FREEBSD_PROCSTAT_AUXV = 16,
+};
 
-// Generic note types.
+// Generic note types
 enum : unsigned {
   NT_VERSION = 1,
   NT_ARCH = 2,
@@ -1446,7 +1357,7 @@ enum : unsigned {
   NT_GNU_BUILD_ATTRIBUTE_FUNC = 0x101,
 };
 
-// Core note types.
+// Core note types
 enum : unsigned {
   NT_PRSTATUS = 1,
   NT_FPREGSET = 2,
@@ -1511,7 +1422,7 @@ enum {
   NT_LLVM_HWASAN_GLOBALS = 3,
 };
 
-// GNU note types.
+// GNU note types
 enum {
   NT_GNU_ABI_TAG = 1,
   NT_GNU_HWCAP = 2,
@@ -1526,14 +1437,10 @@ enum : unsigned {
   GNU_PROPERTY_NO_COPY_ON_PROTECTED = 2,
   GNU_PROPERTY_AARCH64_FEATURE_1_AND = 0xc0000000,
   GNU_PROPERTY_X86_FEATURE_1_AND = 0xc0000002,
-
-  GNU_PROPERTY_X86_UINT32_OR_LO = 0xc0008000,
-  GNU_PROPERTY_X86_FEATURE_2_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 1,
-  GNU_PROPERTY_X86_ISA_1_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 2,
-
-  GNU_PROPERTY_X86_UINT32_OR_AND_LO = 0xc0010000,
-  GNU_PROPERTY_X86_FEATURE_2_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1,
-  GNU_PROPERTY_X86_ISA_1_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 2,
+  GNU_PROPERTY_X86_ISA_1_NEEDED = 0xc0008000,
+  GNU_PROPERTY_X86_FEATURE_2_NEEDED = 0xc0008001,
+  GNU_PROPERTY_X86_ISA_1_USED = 0xc0010000,
+  GNU_PROPERTY_X86_FEATURE_2_USED = 0xc0010001,
 };
 
 // aarch64 processor feature bits.
@@ -1547,6 +1454,31 @@ enum : unsigned {
   GNU_PROPERTY_X86_FEATURE_1_IBT = 1 << 0,
   GNU_PROPERTY_X86_FEATURE_1_SHSTK = 1 << 1,
 
+  GNU_PROPERTY_X86_ISA_1_CMOV = 1 << 0,
+  GNU_PROPERTY_X86_ISA_1_SSE = 1 << 1,
+  GNU_PROPERTY_X86_ISA_1_SSE2 = 1 << 2,
+  GNU_PROPERTY_X86_ISA_1_SSE3 = 1 << 3,
+  GNU_PROPERTY_X86_ISA_1_SSSE3 = 1 << 4,
+  GNU_PROPERTY_X86_ISA_1_SSE4_1 = 1 << 5,
+  GNU_PROPERTY_X86_ISA_1_SSE4_2 = 1 << 6,
+  GNU_PROPERTY_X86_ISA_1_AVX = 1 << 7,
+  GNU_PROPERTY_X86_ISA_1_AVX2 = 1 << 8,
+  GNU_PROPERTY_X86_ISA_1_FMA = 1 << 9,
+  GNU_PROPERTY_X86_ISA_1_AVX512F = 1 << 10,
+  GNU_PROPERTY_X86_ISA_1_AVX512CD = 1 << 11,
+  GNU_PROPERTY_X86_ISA_1_AVX512ER = 1 << 12,
+  GNU_PROPERTY_X86_ISA_1_AVX512PF = 1 << 13,
+  GNU_PROPERTY_X86_ISA_1_AVX512VL = 1 << 14,
+  GNU_PROPERTY_X86_ISA_1_AVX512DQ = 1 << 15,
+  GNU_PROPERTY_X86_ISA_1_AVX512BW = 1 << 16,
+  GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS = 1 << 17,
+  GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW = 1 << 18,
+  GNU_PROPERTY_X86_ISA_1_AVX512_BITALG = 1 << 19,
+  GNU_PROPERTY_X86_ISA_1_AVX512_IFMA = 1 << 20,
+  GNU_PROPERTY_X86_ISA_1_AVX512_VBMI = 1 << 21,
+  GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2 = 1 << 22,
+  GNU_PROPERTY_X86_ISA_1_AVX512_VNNI = 1 << 23,
+
   GNU_PROPERTY_X86_FEATURE_2_X86 = 1 << 0,
   GNU_PROPERTY_X86_FEATURE_2_X87 = 1 << 1,
   GNU_PROPERTY_X86_FEATURE_2_MMX = 1 << 2,
@@ -1557,43 +1489,6 @@ enum : unsigned {
   GNU_PROPERTY_X86_FEATURE_2_XSAVE = 1 << 7,
   GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT = 1 << 8,
   GNU_PROPERTY_X86_FEATURE_2_XSAVEC = 1 << 9,
-
-  GNU_PROPERTY_X86_ISA_1_BASELINE = 1 << 0,
-  GNU_PROPERTY_X86_ISA_1_V2 = 1 << 1,
-  GNU_PROPERTY_X86_ISA_1_V3 = 1 << 2,
-  GNU_PROPERTY_X86_ISA_1_V4 = 1 << 3,
-};
-
-// FreeBSD note types.
-enum {
-  NT_FREEBSD_ABI_TAG = 1,
-  NT_FREEBSD_NOINIT_TAG = 2,
-  NT_FREEBSD_ARCH_TAG = 3,
-  NT_FREEBSD_FEATURE_CTL = 4,
-};
-
-// NT_FREEBSD_FEATURE_CTL values (see FreeBSD's sys/sys/elf_common.h).
-enum {
-  NT_FREEBSD_FCTL_ASLR_DISABLE = 0x00000001,
-  NT_FREEBSD_FCTL_PROTMAX_DISABLE = 0x00000002,
-  NT_FREEBSD_FCTL_STKGAP_DISABLE = 0x00000004,
-  NT_FREEBSD_FCTL_WXNEEDED = 0x00000008,
-  NT_FREEBSD_FCTL_LA48 = 0x00000010,
-  NT_FREEBSD_FCTL_ASG_DISABLE = 0x00000020,
-};
-
-// FreeBSD core note types.
-enum {
-  NT_FREEBSD_THRMISC = 7,
-  NT_FREEBSD_PROCSTAT_PROC = 8,
-  NT_FREEBSD_PROCSTAT_FILES = 9,
-  NT_FREEBSD_PROCSTAT_VMMAP = 10,
-  NT_FREEBSD_PROCSTAT_GROUPS = 11,
-  NT_FREEBSD_PROCSTAT_UMASK = 12,
-  NT_FREEBSD_PROCSTAT_RLIMIT = 13,
-  NT_FREEBSD_PROCSTAT_OSREL = 14,
-  NT_FREEBSD_PROCSTAT_PSSTRINGS = 15,
-  NT_FREEBSD_PROCSTAT_AUXV = 16,
 };
 
 // AMDGPU-specific section indices.
@@ -1601,18 +1496,15 @@ enum {
   SHN_AMDGPU_LDS = 0xff00, // Variable in LDS; symbol encoded like SHN_COMMON
 };
 
-// AMD vendor specific notes. (Code Object V2)
+// AMD specific notes. (Code Object V2)
 enum {
-  NT_AMD_HSA_CODE_OBJECT_VERSION = 1,
-  NT_AMD_HSA_HSAIL = 2,
-  NT_AMD_HSA_ISA_VERSION = 3,
-  // Note types with values between 4 and 9 (inclusive) are reserved.
-  NT_AMD_HSA_METADATA = 10,
-  NT_AMD_HSA_ISA_NAME = 11,
-  NT_AMD_PAL_METADATA = 12
+  // Note types with values between 0 and 9 (inclusive) are reserved.
+  NT_AMD_AMDGPU_HSA_METADATA = 10,
+  NT_AMD_AMDGPU_ISA = 11,
+  NT_AMD_AMDGPU_PAL_METADATA = 12
 };
 
-// AMDGPU vendor specific notes. (Code Object V3)
+// AMDGPU specific notes. (Code Object V3)
 enum {
   // Note types with values between 0 and 31 (inclusive) are reserved.
   NT_AMDGPU_METADATA = 32
@@ -1653,14 +1545,14 @@ struct Elf64_Chdr {
   Elf64_Xword ch_addralign;
 };
 
-// Note header for ELF32.
+// Node header for ELF32.
 struct Elf32_Nhdr {
   Elf32_Word n_namesz;
   Elf32_Word n_descsz;
   Elf32_Word n_type;
 };
 
-// Note header for ELF64.
+// Node header for ELF64.
 struct Elf64_Nhdr {
   Elf64_Word n_namesz;
   Elf64_Word n_descsz;
@@ -1676,12 +1568,6 @@ enum {
   ELFCOMPRESS_HIPROC = 0x7fffffff  // End of processor-specific.
 };
 
-/// Convert an architecture name into ELF's e_machine value.
-uint16_t convertArchNameToEMachine(StringRef Arch);
-
-/// Convert an ELF's e_machine value into an architecture name.
-StringRef convertEMachineToArchName(uint16_t EMachine);
-
 } // end namespace ELF
 } // end namespace llvm