diff options
| author | Jonathan Gray <jsg@cvs.openbsd.org> | 2020-01-15 01:43:07 +0000 |
|---|---|---|
| committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2020-01-15 01:43:07 +0000 |
| commit | 2772d44d76249856b0bfb7b605cde57b28c6a7fb (patch) | |
| tree | e1d3685ab75ae7ec2c6000970ae0fc95e02f8251 | |
| parent | 452352325c230da5f0b94c2e3cd98fbf049ce392 (diff) | |
drm/i915/gen9: Clear residual context state on context switch
From Akeem G Abodunrin
dd4f3b3508f65fe37975db223365216316da3998 in linux 4.19.y/4.19.96
bc8a76a152c5f9ef3b48104154a65a68a8b76946 in mainline linux
| -rw-r--r-- | sys/dev/pci/drm/i915/intel_lrc.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/sys/dev/pci/drm/i915/intel_lrc.c b/sys/dev/pci/drm/i915/intel_lrc.c index e2dfb7ccf8f..34d71be142b 100644 --- a/sys/dev/pci/drm/i915/intel_lrc.c +++ b/sys/dev/pci/drm/i915/intel_lrc.c @@ -1582,6 +1582,15 @@ static u32 *gen9_init_indirectctx_bb(struct intel_engine_cs *engine, u32 *batch) /* WaFlushCoherentL3CacheLinesAtContextSwitch:skl,bxt,glk */ batch = gen8_emit_flush_coherentl3_wa(engine, batch); + /* WaClearSlmSpaceAtContextSwitch:skl,bxt,kbl,glk,cfl */ + batch = gen8_emit_pipe_control(batch, + PIPE_CONTROL_FLUSH_L3 | + PIPE_CONTROL_GLOBAL_GTT_IVB | + PIPE_CONTROL_CS_STALL | + PIPE_CONTROL_QW_WRITE, + i915_ggtt_offset(engine->scratch) + + 2 * CACHELINE_BYTES); + batch = emit_lri(batch, lri, ARRAY_SIZE(lri)); /* WaClearSlmSpaceAtContextSwitch:kbl */ |