rename rt2860 pci ids to match with reality.

import some fixes for 1T2R adapters from the linux vendor driver.

6 files changed, 115 insertions, 91 deletions

diff --git a/sys/dev/cardbus/if_ral_cardbus.c b/sys/dev/cardbus/if_ral_cardbus.c
index 712102fea70..8c5577a49dd 100644
--- a/sys/dev/cardbus/if_ral_cardbus.c
+++ b/sys/dev/cardbus/if_ral_cardbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_ral_cardbus.c,v 1.10 2007/11/15 21:15:34 damien Exp $  */
+/*	$OpenBSD: if_ral_cardbus.c,v 1.11 2008/07/21 19:41:44 damien Exp $  */
 
 /*-
  * Copyright (c) 2005-2007
@@ -106,13 +106,15 @@ struct cfattach ral_cardbus_ca = {
 };
 
 static const struct cardbus_matchid ral_cardbus_devices[] = {
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2560   },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561   },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561S  },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2661   },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860_1 },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860_2 },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860_3 }
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2560  },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561  },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561S },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2661  },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860  },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2890  },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2760  },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2790  },
+	{ PCI_VENDOR_AWT,    PCI_PRODUCT_AWT_RT2890     }
 };
 
 int	ral_cardbus_enable(struct rt2560_softc *);
@@ -147,9 +149,11 @@ ral_cardbus_attach(struct device *parent, struct device *self, void *aux)
 	case PCI_PRODUCT_RALINK_RT2661:
 		csc->sc_opns = &ral_rt2661_opns;
 		break;
-	case PCI_PRODUCT_RALINK_RT2860_1:
-	case PCI_PRODUCT_RALINK_RT2860_2:
-	case PCI_PRODUCT_RALINK_RT2860_3:
+	case PCI_PRODUCT_RALINK_RT2860:
+	case PCI_PRODUCT_RALINK_RT2890:
+	case PCI_PRODUCT_RALINK_RT2760:
+	case PCI_PRODUCT_RALINK_RT2790:
+	case PCI_PRODUCT_AWT_RT2890:
 		csc->sc_opns = &ral_rt2860_opns;
 		break;
 	}
diff --git a/sys/dev/ic/rt2860.c b/sys/dev/ic/rt2860.c
index 71be64a3891..7943b077155 100644
--- a/sys/dev/ic/rt2860.c
+++ b/sys/dev/ic/rt2860.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rt2860.c,v 1.16 2008/07/21 18:43:19 damien Exp $	*/
+/*	$OpenBSD: rt2860.c,v 1.17 2008/07/21 19:41:44 damien Exp $	*/
 
 /*-
  * Copyright (c) 2007,2008
@@ -60,8 +60,8 @@
 #include <net80211/ieee80211_amrr.h>
 #include <net80211/ieee80211_radiotap.h>
 
-#include <dev/ic/rt2860reg.h>
 #include <dev/ic/rt2860var.h>
+#include <dev/ic/rt2860reg.h>
 
 #include <dev/pci/pcireg.h>
 #include <dev/pci/pcivar.h>
@@ -191,6 +191,11 @@ rt2860_attach(void *xsc, int id)
 		    sc->sc_dev.dv_xname);
 		return ETIMEDOUT;
 	}
+	if ((sc->mac_rev >> 16) != 0x2860 &&
+	    (id == PCI_PRODUCT_RALINK_RT2890 ||
+	     id == PCI_PRODUCT_RALINK_RT2790 ||
+	     id == PCI_PRODUCT_AWT_RT2890))
+		sc->sc_flags |= RT2860_ADVANCED_PS;
 
 	/* retrieve RF rev. no and various other things from EEPROM */
 	rt2860_read_eeprom(sc);
@@ -1358,9 +1363,6 @@ rt2860_tx_data(struct rt2860_softc *sc, struct mbuf *m0,
 	struct rt2860_txd *txd;
 	struct rt2860_txwi *txwi;
 	struct ieee80211_frame *wh;
-#if 0
-	struct ieee80211_key *k;
-#endif
 	bus_dma_segment_t *seg;
 	u_int hdrlen;
 	uint16_t dur;
@@ -1388,18 +1390,6 @@ rt2860_tx_data(struct rt2860_softc *sc, struct mbuf *m0,
 	/* get MCS code from rate */
 	mcs = rt2860_rate2mcs(rate);
 
-#if 0
-	if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
-		k = ieee80211_get_txkey(ic, wh, ni);
-
-		if ((m0 = ieee80211_encrypt(ic, m0, k)) == NULL)
-			return ENOBUFS;
-
-		/* packet header may have moved, reset our local pointer */
-		wh = mtod(m0, struct ieee80211_frame *);
-	}
-#endif
-
 	/* setup TX Wireless Information */
 	txwi = data->txwi;
 	memset(txwi, 0, sizeof (struct rt2860_txwi));
@@ -1912,7 +1902,7 @@ rt2860_set_basicrates(struct rt2860_softc *sc)
 		RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, 0x003);
 	else if (ic->ic_curmode == IEEE80211_MODE_11A)
 		RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, 0x150);
-	else	/* 11a */
+	else	/* 11g */
 		RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, 0x15f);
 }
 
@@ -1920,12 +1910,10 @@ void
 rt2860_select_chan_group(struct rt2860_softc *sc, int group)
 {
 	uint32_t tmp;
-	uint8_t bbp66;
 
 	rt2860_mcu_bbp_write(sc, 62, 0x37 - sc->lna[group]);
 	rt2860_mcu_bbp_write(sc, 63, 0x37 - sc->lna[group]);
 	rt2860_mcu_bbp_write(sc, 64, 0x37 - sc->lna[group]);
-	rt2860_mcu_bbp_write(sc, 86, 0x37 - sc->lna[group]);
 	rt2860_mcu_bbp_write(sc, 82, (group == 0) ? 0x62 : 0xf2);
 
 	tmp = RAL_READ(sc, RT2860_TX_BAND_CFG);
@@ -1950,8 +1938,7 @@ rt2860_select_chan_group(struct rt2860_softc *sc, int group)
 	}
 	RAL_WRITE(sc, RT2860_TX_PIN_CFG, tmp);
 
-	bbp66 = (group == 0) ? 0x2e + sc->lna[0] : 0x4c;
-	rt2860_mcu_bbp_write(sc, 66, bbp66);
+	rt2860_mcu_bbp_write(sc, 66, 0x2e + sc->lna[group]);
 }
 
 void
@@ -1978,14 +1965,9 @@ rt2860_set_chan(struct rt2860_softc *sc, struct ieee80211_channel *c)
 	else if (sc->nrxchains == 2)
 		r2 |= 1 << 4;		/* 2R: disable Rx chain 3 */
 
-#ifdef notyet
 	/* use Tx power values from EEPROM */
 	txpow1 = sc->txpow1[i];
 	txpow2 = sc->txpow2[i];
-#else
-	/* use default Tx power values */
-	txpow1 = 0; txpow2 = 5;
-#endif
 	if (IEEE80211_IS_CHAN_5GHZ(c)) {
 		txpow1 = txpow1 << 1 | 1;
 		txpow2 = txpow2 << 1 | 1;
@@ -2401,6 +2383,17 @@ rt2860_read_eeprom(struct rt2860_softc *sc)
 	if ((val & 0xff) != 0xff)
 		sc->calib_2ghz = sc->calib_5ghz = 0; /* XXX (val >> 1) & 1 */;
 
+	if (sc->sc_flags & RT2860_ADVANCED_PS) {
+		/* read PCIe power save level */
+		val = rt2860_eeprom_read(sc, RT2860_EEPROM_PCIE_PSLEVEL);
+		if ((val & 0xff) != 0xff) {
+			sc->pslevel = val & 0x3;
+			val = rt2860_eeprom_read(sc, RT2860_EEPROM_REV);
+			if (val >> 8 != 0x92 || !(val & 0x80))
+				sc->pslevel = MIN(sc->pslevel, 1);
+			DPRINTF(("EEPROM PCIe PS Level=%d\n", sc->pslevel));
+		}
+	}
 	/* read power settings for 2GHz channels */
 	for (i = 0; i < 14; i += 2) {
 		val = rt2860_eeprom_read(sc,
@@ -2413,33 +2406,36 @@ rt2860_read_eeprom(struct rt2860_softc *sc)
 		sc->txpow2[i + 0] = (int8_t)(val & 0xff);
 		sc->txpow2[i + 1] = (int8_t)(val >> 8);
 	}
+	/* fix broken Tx power entries */
+	for (i = 0; i < 14; i++) {
+		if (sc->txpow1[i] < 0 || sc->txpow1[i] > 31)
+			sc->txpow1[i] = 5;
+		if (sc->txpow2[i] < 0 || sc->txpow2[i] > 31)
+			sc->txpow2[i] = 5;
+		DPRINTF(("chan %d: power1=%d, power2=%d\n",
+		    rt2860_rf2850[i].chan, sc->txpow1[i], sc->txpow2[i]));
+	}
 	/* read power settings for 5GHz channels */
-	for (; i < 50; i += 2) {
+	for (i = 0; i < 36; i += 2) {
 		val = rt2860_eeprom_read(sc,
 		    RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2);
-		sc->txpow1[i + 0] = (int8_t)(val & 0xff);
-		sc->txpow1[i + 1] = (int8_t)(val >> 8);
+		sc->txpow1[i + 14] = (int8_t)(val & 0xff);
+		sc->txpow1[i + 15] = (int8_t)(val >> 8);
 
 		val = rt2860_eeprom_read(sc,
 		    RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2);
-		sc->txpow2[i + 0] = (int8_t)(val & 0xff);
-		sc->txpow2[i + 1] = (int8_t)(val >> 8);
+		sc->txpow2[i + 14] = (int8_t)(val & 0xff);
+		sc->txpow2[i + 15] = (int8_t)(val >> 8);
 	}
-
 	/* fix broken Tx power entries */
-	for (i = 0; i < N(rt2860_rf2850); i++) {
+	for (i = 0; i < 36; i++) {
+		if (sc->txpow1[14 + i] < -7 || sc->txpow1[14 + i] > 15)
+			sc->txpow1[14 + i] = 5;
+		if (sc->txpow2[14 + i] < -7 || sc->txpow2[14 + i] > 15)
+			sc->txpow2[14 + i] = 5;
 		DPRINTF(("chan %d: power1=%d, power2=%d\n",
-		    rt2860_rf2850[i].chan, sc->txpow1[i], sc->txpow2[i]));
-		if (sc->txpow1[i] < -6 || sc->txpow1[i] > 36) {
-			DPRINTF(("out-of-range Tx power1 for chan %d: %d\n",
-			    rt2860_rf2850[i].chan, sc->txpow1[i]));
-			sc->txpow1[i] = 5;
-		}
-		if (sc->txpow2[i] < -6 || sc->txpow2[i] > 36) {
-			DPRINTF(("out-of-range Tx power2 for chan %d: %d\n",
-			    rt2860_rf2850[i].chan, sc->txpow2[i]));
-			sc->txpow2[i] = 5;
-		}
+		    rt2860_rf2850[14 + i].chan, sc->txpow1[14 + i],
+		    sc->txpow2[14 + i]));
 	}
 
 	/* read Tx power compensation for each Tx rate */
@@ -2613,7 +2609,7 @@ rt2860_init(struct ifnet *ifp)
 	struct rt2860_softc *sc = ifp->if_softc;
 	struct ieee80211com *ic = &sc->sc_ic;
 	uint32_t tmp;
-	uint8_t bbp3;
+	uint8_t bbp1, bbp3;
 	int i, qid, ridx, ntries, error;
 
 	/* for CardBus, power on the socket */
@@ -2763,6 +2759,12 @@ rt2860_init(struct ifnet *ifp)
 		bbp3 |= 1 << 4;
 	rt2860_mcu_bbp_write(sc, 3, bbp3);
 
+	/* disable non-existing Tx chains */
+	bbp1 = rt2860_mcu_bbp_read(sc, 1);
+	if (sc->ntxchains == 1)
+		bbp1 &= ~(1 << 3 | 1 << 4);
+	rt2860_mcu_bbp_write(sc, 1, bbp1);
+
 	/* select default channel */
 	ic->ic_bss->ni_chan = ic->ic_ibss_chan;
 	rt2860_set_chan(sc, ic->ic_ibss_chan);
@@ -2829,6 +2831,9 @@ rt2860_init(struct ifnet *ifp)
 	/* enable interrupts */
 	RAL_WRITE(sc, RT2860_INT_MASK, 0x3fffc);
 
+	if (sc->sc_flags & RT2860_ADVANCED_PS)
+		(void)rt2860_mcu_cmd(sc, RT2860_MCU_CMD_PSLEVEL, sc->pslevel);
+
 	ifp->if_flags &= ~IFF_OACTIVE;
 	ifp->if_flags |= IFF_RUNNING;
 
diff --git a/sys/dev/ic/rt2860reg.h b/sys/dev/ic/rt2860reg.h
index b82baccef67..b2a26a043fa 100644
--- a/sys/dev/ic/rt2860reg.h
+++ b/sys/dev/ic/rt2860reg.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rt2860reg.h,v 1.8 2008/04/16 18:32:15 damien Exp $	*/
+/*	$OpenBSD: rt2860reg.h,v 1.9 2008/07/21 19:41:44 damien Exp $	*/
 
 /*-
  * Copyright (c) 2007
@@ -274,6 +274,7 @@
 #define RT2860_MCU_CMD_LED3	0x54
 #define RT2860_MCU_CMD_BOOT	0x72
 #define RT2860_MCU_CMD_BBP	0x80
+#define RT2860_MCU_CMD_PSLEVEL	0x83
 
 /* possible flags for register PBF_CFG */
 #define RT2860_TX1Q_NUM_SHIFT	21
@@ -753,6 +754,8 @@ struct rt2860_rxwi {
 #define RT2860_EEPROM_MAC01		0x02
 #define RT2860_EEPROM_MAC23		0x03
 #define RT2860_EEPROM_MAC45		0x04
+#define RT2860_EEPROM_PCIE_PSLEVEL	0x11
+#define RT2860_EEPROM_REV		0x12
 #define RT2860_EEPROM_ANTENNA		0x1a
 #define RT2860_EEPROM_CONFIG		0x1b
 #define RT2860_EEPROM_COUNTRY		0x1c
@@ -787,18 +790,17 @@ struct rt2860_rxwi {
 /*
  * Control and status registers access macros.
  */
-#define RAL_READ(sc, reg)						\
-	bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
-
-#define RAL_WRITE(sc, reg, val)						\
-	bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
-
-#define RAL_WRITE_1(sc, reg, val)					\
-	bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
-
-#define RAL_RW_BARRIER_1(sc, reg)					\
-	bus_space_barrier((sc)->sc_st, (sc)->sc_sh, (reg), 1,		\
-	    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
+static inline u_int32_t
+RAL_READ(struct rt2860_softc *sc, bus_size_t reg)
+{
+	(void)bus_space_read_4(sc->sc_st, sc->sc_sh, RT2860_ASIC_VER_ID);
+	return bus_space_read_4(sc->sc_st, sc->sc_sh, reg);
+}
+
+#define RAL_WRITE(sc, reg, val)	do {					\
+	bus_space_read_4((sc)->sc_st, (sc)->sc_sh, RT2860_ASIC_VER_ID);	\
+	bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val));	\
+} while (/* CONSTCOND */0)
 
 #define RAL_WRITE_REGION_1(sc, offset, datap, count)			\
 	bus_space_write_region_1((sc)->sc_st, (sc)->sc_sh, (offset),	\
@@ -845,7 +847,9 @@ struct rt2860_rxwi {
 	{ RT2860_TXOP_CTRL_CFG,		0x0000583f },	\
 	{ RT2860_TXOP_HLDR_ET,		0x00000002 },	\
 	{ RT2860_TX_RTS_CFG,		0x00092b20 },	\
-	{ RT2860_EXP_ACK_TIME,		0x002400ca }
+	{ RT2860_EXP_ACK_TIME,		0x002400ca },	\
+	{ RT2860_XIFS_TIME_CFG,		0x33a41010 },	\
+	{ RT2860_PWR_PIN_CFG,		0x00000003 }
 
 /*
  * Default values for BBP registers; values taken from the reference driver.
@@ -858,7 +862,10 @@ struct rt2860_rxwi {
 	{  81, 0x37 },	\
 	{  82, 0x62 },	\
 	{  83, 0x6a },	\
-	{  84, 0x99 },	\
+	{  84, 0x19 },	\
+	{  86, 0x00 },	\
+	{  91, 0x04 },	\
+	{  92, 0x00 },	\
 	{ 105, 0x01 }
 
 /*
diff --git a/sys/dev/ic/rt2860var.h b/sys/dev/ic/rt2860var.h
index df1c9281188..b0b8bb4372a 100644
--- a/sys/dev/ic/rt2860var.h
+++ b/sys/dev/ic/rt2860var.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: rt2860var.h,v 1.7 2008/06/08 19:34:14 jsg Exp $	*/
+/*	$OpenBSD: rt2860var.h,v 1.8 2008/07/21 19:41:44 damien Exp $	*/
 
 /*-
  * Copyright (c) 2007
@@ -118,6 +118,7 @@ struct rt2860_softc {
 #define RT2860_ENABLED		(1 << 0)
 #define RT2860_FWLOADED		(1 << 1)
 #define RT2860_UPD_BEACON	(1 << 2)
+#define RT2860_ADVANCED_PS	(1 << 3)
 
 	uint32_t			sc_ic_flags;
 
@@ -139,6 +140,7 @@ struct rt2860_softc {
 	uint8_t				freq;
 	uint8_t				ntxchains;
 	uint8_t				nrxchains;
+	uint8_t				pslevel;
 	int8_t				txpow1[50];
 	int8_t				txpow2[50];
 	int8_t				rssi_2ghz[3];
diff --git a/sys/dev/pci/if_ral_pci.c b/sys/dev/pci/if_ral_pci.c
index c428f52c29d..e52e1a782f3 100644
--- a/sys/dev/pci/if_ral_pci.c
+++ b/sys/dev/pci/if_ral_pci.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: if_ral_pci.c,v 1.12 2007/12/09 00:08:35 deraadt Exp $  */
+/*	$OpenBSD: if_ral_pci.c,v 1.13 2008/07/21 19:41:44 damien Exp $  */
 
 /*-
  * Copyright (c) 2005-2007
@@ -104,14 +104,15 @@ struct cfattach ral_pci_ca = {
 };
 
 const struct pci_matchid ral_pci_devices[] = {
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2560    },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561    },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561S   },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2661    },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860_1  },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860_1E },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860_2  },
-	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860_3  }
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2560  },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561  },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561S },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2661  },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860  },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2890  },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2760  },
+	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2790  },
+	{ PCI_VENDOR_AWT,    PCI_PRODUCT_AWT_RT2890     }
 };
 
 int
@@ -141,10 +142,11 @@ ral_pci_attach(struct device *parent, struct device *self, void *aux)
 	case PCI_PRODUCT_RALINK_RT2661:
 		psc->sc_opns = &ral_rt2661_opns;
 		break;
-	case PCI_PRODUCT_RALINK_RT2860_1:
-	case PCI_PRODUCT_RALINK_RT2860_1E:
-	case PCI_PRODUCT_RALINK_RT2860_2:
-	case PCI_PRODUCT_RALINK_RT2860_3:
+	case PCI_PRODUCT_RALINK_RT2860:
+	case PCI_PRODUCT_RALINK_RT2890:
+	case PCI_PRODUCT_RALINK_RT2760:
+	case PCI_PRODUCT_RALINK_RT2790:
+	case PCI_PRODUCT_AWT_RT2890:
 		psc->sc_opns = &ral_rt2860_opns;
 		break;
 	}
diff --git a/sys/dev/pci/pcidevs b/sys/dev/pci/pcidevs
index 5677cf0939b..8d1592f3e5f 100644
--- a/sys/dev/pci/pcidevs
+++ b/sys/dev/pci/pcidevs
@@ -1,4 +1,4 @@
-$OpenBSD: pcidevs,v 1.1387 2008/07/18 11:44:22 reyk Exp $
+$OpenBSD: pcidevs,v 1.1388 2008/07/21 19:41:44 damien Exp $
 /*	$NetBSD: pcidevs,v 1.30 1997/06/24 06:20:24 thorpej Exp $	*/
 
 /*
@@ -300,6 +300,7 @@ vendor	ATTANSIC	0x1969	Attansic Technology
 vendor	AGEIA		0x1971	Ageia
 vendor	JMICRON		0x197b	JMicron
 vendor	ASPEED		0x1a03	ASPEED Technology
+vendor	AWT		0x1a3b	AWT
 vendor	SYMPHONY2	0x1c1c	Symphony Labs
 vendor	TEKRAM2		0x1de1	Tekram
 vendor	TEHUTI		0x1fc9	Tehuti Networks
@@ -1147,6 +1148,9 @@ product AVM FRITZ_CARD		0x0a00	Fritz ISDN
 product AVM FRITZ_PCI_V2_ISDN	0x0e00	Fritz v2.0 ISDN
 product AVM T1			0x1200	PRI T1 ISDN
 
+/* AWT products */
+product AWT RT2890		0x1059	RT2890
+
 /* Belkin Components products */
 product BELKIN2 F5D6001		0x6001	F5D6001
 product BELKIN2 F5D6020V3	0x6020	F5D6020V3
@@ -3828,10 +3832,10 @@ product RALINK RT2560		0x0201	RT2560
 product RALINK RT2561S		0x0301	RT2561S
 product RALINK RT2561		0x0302	RT2561
 product RALINK RT2661		0x0401	RT2661
-product RALINK RT2860_1		0x0601	RT2860
-product RALINK RT2860_1E	0x0681	RT2860E
-product RALINK RT2860_2		0x0701	RT2860
-product RALINK RT2860_3		0x0801	RT2860
+product RALINK RT2860		0x0601	RT2860
+product RALINK RT2890		0x0681	RT2890
+product RALINK RT2760		0x0701	RT2760
+product RALINK RT2790		0x0781	RT2790
 
 /* Realtek products */
 product REALTEK RT8029		0x8029	8029