support puc devices with higher speeds (not tested yet)

8 files changed, 165 insertions, 113 deletions

diff --git a/sys/arch/i386/isa/pccom.c b/sys/arch/i386/isa/pccom.c
index 8472de06ab0..f7e45527924 100644
--- a/sys/arch/i386/isa/pccom.c
+++ b/sys/arch/i386/isa/pccom.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pccom.c,v 1.36 2001/01/24 09:38:01 hugh Exp $	*/
+/*	$OpenBSD: pccom.c,v 1.37 2001/03/15 17:52:20 deraadt Exp $	*/
 /*	$NetBSD: com.c,v 1.82.4.1 1996/06/02 09:08:00 mrg Exp $	*/
 
 /*
@@ -204,7 +204,8 @@ void	com_kgdb_putc __P((void *, int));
 #endif
 
 int
-comspeed(speed)
+comspeed(freq, speed)
+	long freq;
 	long speed;
 {
 #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
@@ -215,10 +216,10 @@ comspeed(speed)
 		return 0;
 	if (speed < 0)
 		return -1;
-	x = divrnd((COM_FREQ / 16), speed);
+	x = divrnd((freq / 16), speed);
 	if (x <= 0)
 		return -1;
-	err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000;
+	err = divrnd((freq / 16) * 1000, speed * x) - 1000;
 	if (err < 0)
 		err = -err;
 	if (err > COM_TOLERANCE)
@@ -239,11 +240,11 @@ comprobe1(iot, ioh)
 	bus_space_write_1(iot, ioh, com_lcr, 0);
 	bus_space_write_1(iot, ioh, com_iir, 0);
 	for (i = 0; i < 32; i++) {
-	    k = bus_space_read_1(iot, ioh, com_iir);
-	    if (k & 0x38) {
-		bus_space_read_1(iot, ioh, com_data); /* cleanup */
-	    } else
-		break;
+		k = bus_space_read_1(iot, ioh, com_iir);
+		if (k & 0x38) {
+			bus_space_read_1(iot, ioh, com_data); /* cleanup */
+		} else
+			break;
 	}
 	if (i >= 32) 
 	    return 0;
@@ -470,6 +471,7 @@ comattach(parent, self, aux)
 	sc->sc_iot = iot;
 	sc->sc_ioh = ioh;
 	sc->sc_iobase = iobase;
+	sc->sc_frequency = COM_FREQ;
 
 	timeout_set(&sc->sc_dtr_tmo, com_raisedtr, sc);
 	timeout_set(&sc->sc_diag_tmo, comdiag, sc);
@@ -1297,7 +1299,7 @@ comparam(tp, t)
 	struct com_softc *sc = pccom_cd.cd_devs[DEVUNIT(tp->t_dev)];
 	bus_space_tag_t iot = sc->sc_iot;
 	bus_space_handle_t ioh = sc->sc_ioh;
-	int ospeed = comspeed(t->c_ospeed);
+	int ospeed = comspeed(sc->sc_frequency, t->c_ospeed);
 	u_int8_t lcr;
 	tcflag_t oldcflag;
 	int s;
@@ -1976,7 +1978,7 @@ cominit(iot, ioh, rate)
 	u_int8_t stat;
 
 	bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB);
-	rate = comspeed(rate); /* XXX not comdefaultrate? */
+	rate = comspeed(COM_FREQ, rate); /* XXX not comdefaultrate? */
 	bus_space_write_1(iot, ioh, com_dlbl, rate);
 	bus_space_write_1(iot, ioh, com_dlbh, rate >> 8);
 	bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS);
diff --git a/sys/arch/i386/isa/pccomvar.h b/sys/arch/i386/isa/pccomvar.h
index 7f040715b04..58c8a226fb4 100644
--- a/sys/arch/i386/isa/pccomvar.h
+++ b/sys/arch/i386/isa/pccomvar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pccomvar.h,v 1.11 2001/01/24 09:38:02 hugh Exp $	*/
+/*	$OpenBSD: pccomvar.h,v 1.12 2001/03/15 17:52:20 deraadt Exp $	*/
 /*	$NetBSD: comvar.h,v 1.5 1996/05/05 19:50:47 christos Exp $	*/
 
 /*
@@ -121,7 +121,7 @@ int	com_activate __P((struct device *, enum devact));
 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc));
 #endif
 void	comdiag		__P((void *));
-int	comspeed	__P((long));
+int	comspeed	__P((long, long));
 int	comparam	__P((struct tty *, struct termios *));
 void	comstart	__P((struct tty *));
 void	comsoft		__P((void));
diff --git a/sys/dev/ic/com.c b/sys/dev/ic/com.c
index 007568dd1e5..7ea9661638d 100644
--- a/sys/dev/ic/com.c
+++ b/sys/dev/ic/com.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: com.c,v 1.58 2001/03/13 02:53:51 mickey Exp $	*/
+/*	$OpenBSD: com.c,v 1.59 2001/03/15 17:52:20 deraadt Exp $	*/
 /*	$NetBSD: com.c,v 1.82.4.1 1996/06/02 09:08:00 mrg Exp $	*/
 
 /*
@@ -201,7 +201,8 @@ void   com_kgdb_putc __P((void *, int));
 #endif
 
 int
-comspeed(speed)
+comspeedcomspeed(freq, speed)
+	long freq;
 	long speed;
 {
 #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
@@ -212,10 +213,10 @@ comspeed(speed)
 		return 0;
 	if (speed < 0)
 		return -1;
-	x = divrnd((COM_FREQ / 16), speed);
+	x = divrnd((freq / 16), speed);
 	if (x <= 0)
 		return -1;
-	err = divrnd((COM_FREQ / 16) * 1000, speed * x) - 1000;
+	err = divrnd((freq / 16) * 1000, speed * x) - 1000;
 	if (err < 0)
 		err = -err;
 	if (err > COM_TOLERANCE)
@@ -467,6 +468,7 @@ comattach(parent, self, aux)
 	sc->sc_iot = iot;
 	sc->sc_ioh = ioh;
 	sc->sc_iobase = iobase;
+	sc->sc_frequency = COM_FREQ;
 
 	if (iobase == comconsaddr) {
 		comconsattached = 1;
@@ -1270,7 +1272,7 @@ comparam(tp, t)
 	struct com_softc *sc = com_cd.cd_devs[DEVUNIT(tp->t_dev)];
 	bus_space_tag_t iot = sc->sc_iot;
 	bus_space_handle_t ioh = sc->sc_ioh;
-	int ospeed = comspeed(t->c_ospeed);
+	int ospeed = comspeed(sc->sc_frequency, t->c_ospeed);
 	u_char lcr;
 	tcflag_t oldcflag;
 	int s;
@@ -1935,7 +1937,7 @@ cominit(iot, ioh, rate)
 	u_char stat;
 
 	bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB);
-	rate = comspeed(rate); /* XXX not comdefaultrate? */
+	rate = comspeed(COM_FREQ, rate); /* XXX not comdefaultrate? */
 	bus_space_write_1(iot, ioh, com_dlbl, rate);
 	bus_space_write_1(iot, ioh, com_dlbh, rate >> 8);
 	bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS);
diff --git a/sys/dev/ic/comvar.h b/sys/dev/ic/comvar.h
index 693b4e6f277..d750efa76bf 100644
--- a/sys/dev/ic/comvar.h
+++ b/sys/dev/ic/comvar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: comvar.h,v 1.19 2001/03/13 02:53:52 mickey Exp $	*/
+/*	$OpenBSD: comvar.h,v 1.20 2001/03/15 17:52:20 deraadt Exp $	*/
 /*	$NetBSD: comvar.h,v 1.5 1996/05/05 19:50:47 christos Exp $	*/
 
 /*
@@ -151,7 +151,7 @@ int	com_activate __P((struct device *, enum devact));
 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc));
 #endif
 void	comdiag		__P((void *));
-int	comspeed	__P((long));
+int	comspeed	__P((long, long));
 u_char	com_cflag2lcr	__P((tcflag_t));
 int	comparam	__P((struct tty *, struct termios *));
 void	comstart	__P((struct tty *));
diff --git a/sys/dev/pci/puc.c b/sys/dev/pci/puc.c
index bf8ef8a1604..5db8e0450c9 100644
--- a/sys/dev/pci/puc.c
+++ b/sys/dev/pci/puc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: puc.c,v 1.2 1999/11/14 01:27:57 downsj Exp $	*/
+/*	$OpenBSD: puc.c,v 1.3 2001/03/15 17:52:19 deraadt Exp $	*/
 /*	$NetBSD: puc.c,v 1.3 1999/02/06 06:29:54 cgd Exp $	*/
 
 /*
@@ -254,6 +254,7 @@ puc_attach(parent, self, aux)
 		/* set up to configure the child device */
 		paa.port = i;
 		paa.type = sc->sc_desc->ports[i].type;
+		paa.flags = sc->sc_desc->ports[i].flags;
 		paa.pc = pa->pa_pc;
 		paa.intrhandle = intrhandle;
 		paa.a = sc->sc_bar_mappings[barindex].a;
diff --git a/sys/dev/pci/pucdata.c b/sys/dev/pci/pucdata.c
index d8254db61de..124f22ec3d3 100644
--- a/sys/dev/pci/pucdata.c
+++ b/sys/dev/pci/pucdata.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pucdata.c,v 1.8 2001/03/05 15:02:20 deraadt Exp $	*/
+/*	$OpenBSD: pucdata.c,v 1.9 2001/03/15 17:52:20 deraadt Exp $	*/
 /*	$NetBSD: pucdata.c,v 1.6 1999/07/03 05:55:23 cgd Exp $	*/
 
 /*
@@ -44,6 +44,7 @@
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pucvar.h>
 #include <dev/pci/pcidevs.h>
+#include <dev/ic/comreg.h>
 
 const struct puc_device_description puc_devices[] = {
 	/*
@@ -81,8 +82,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_PLX, PCI_PRODUCT_PLX_9050,	0xd84d,	0x6808	},
 	    {	0xffff,	0xffff,				0xffff,	0xffff	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -111,7 +112,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1000,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -120,7 +121,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1001,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -129,7 +130,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1002,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -138,7 +139,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1010,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x1c, 0x00 },
 	    },
 	},
@@ -148,7 +149,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1011,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x1c, 0x00 },
 	    },
 	},
@@ -158,7 +159,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1012,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x1c, 0x00 },
 	    },
 	},
@@ -187,8 +188,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1030,	0,	0	},
 	    {	0xffff,	0xffff,	0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -197,8 +198,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1031,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -207,8 +208,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1032,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -217,8 +218,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1034,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x20, 0x00 },
 	    },
 	},
@@ -228,8 +229,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1035,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x20, 0x00 },
 	    },
 	},
@@ -239,8 +240,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1036,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x20, 0x00 },
 	    },
 	},
@@ -250,10 +251,10 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1050,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x20, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x24, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x24, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -262,10 +263,10 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1051,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x20, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x24, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x24, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -274,10 +275,10 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_1052,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x20, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x24, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x20, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x24, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -309,7 +310,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2040,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x14, 0x00 },
 		{ PUC_PORT_TYPE_LPT, 0x1c, 0x00 },
 	    },
@@ -320,7 +321,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2041,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x14, 0x00 },
 		{ PUC_PORT_TYPE_LPT, 0x1c, 0x00 },
 	    },
@@ -331,7 +332,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2042,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x14, 0x00 },
 		{ PUC_PORT_TYPE_LPT, 0x1c, 0x00 },
 	    },
@@ -342,7 +343,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2000,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -351,7 +352,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2001,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -360,7 +361,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2002,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -369,7 +370,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2010,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x14, 0x00 },
 	    },
 	},
@@ -379,7 +380,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2011,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x14, 0x00 },
 	    },
 	},
@@ -389,7 +390,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2012,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x14, 0x00 },
 	    },
 	},
@@ -399,8 +400,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2030,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -409,8 +410,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2031,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -419,8 +420,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2032,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -429,8 +430,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2060,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x18, 0x00 },
 	    },
 	},
@@ -440,8 +441,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2061,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x18, 0x00 },
 	    },
 	},
@@ -451,8 +452,8 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2062,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
 		{ PUC_PORT_TYPE_LPT, 0x18, 0x00 },
 	    },
 	},
@@ -462,10 +463,10 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2050,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -474,10 +475,10 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2051,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -486,10 +487,10 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_2052,	0,	0	},
 	    {	0xffff,	0xffff,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -505,14 +506,41 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_PLX,	PCI_PRODUCT_PLX_1076,	0x10b5,	0x1076	},
 	    {	0xffff,	0xffff,				0xffff,	0xffff	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x18, 0x08 },
-		{ PUC_PORT_TYPE_COM, 0x18, 0x10 },
-		{ PUC_PORT_TYPE_COM, 0x18, 0x18 },
-		{ PUC_PORT_TYPE_COM, 0x18, 0x20 },
-		{ PUC_PORT_TYPE_COM, 0x18, 0x28 },
-		{ PUC_PORT_TYPE_COM, 0x18, 0x30 },
-		{ PUC_PORT_TYPE_COM, 0x18, 0x38 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x08, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x10, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x18, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x20, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x28, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x30, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x38, COM_FREQ },
+	    },
+	},
+
+	/*
+	 * Titan PCI-800H. Uses 8 16950 UART, behind a PCI chips that offers
+	 * 4 com port on PCI device 0 and 4 on PCI device 1. PCI device 0 has
+	 * device ID 3 and PCI device 1 device ID 4. Uses a 14.7456 Mhz crystal
+	 * instead of the standart 1.8432Mhz.
+	 */
+	{   /* "VScom PCI-800H", */
+	    {	PCI_VENDOR_OXFORD, PCI_PRODUCT_OXFORD_VSCOM_PCI800H_0,	0, 0	},
+	    {	0xffff, 0xffff,						0, 0	},
+	    {
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 8 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x08, COM_FREQ * 8 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x10, COM_FREQ * 8 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x18, COM_FREQ * 8 },
+	    },
+	},
+	{   /* "VScom PCI-800H", */
+	    {	PCI_VENDOR_OXFORD, PCI_PRODUCT_OXFORD_VSCOM_PCI800H_1,	0, 0	},
+	    {	0xffff, 0xffff,						0, 0	},
+	    {
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 8 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x08, COM_FREQ * 8 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x10, COM_FREQ * 8 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x18, COM_FREQ * 8 },
 	    },
 	},
 
@@ -522,7 +550,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_NEC,	PCI_PRODUCT_NEC_MARTH,	0x1033,	0x8014	},
 	    {	0xffff,	0xffff,				0xffff,	0xffff	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -531,7 +559,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_NEC,	PCI_PRODUCT_NEC_PKUG,	0x1033,	0x8012	},
 	    {	0xffff,	0xffff,				0xffff,	0xffff	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -549,8 +577,18 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_TWOSP_2S,	0,	0	},
 	    {	0xffff,	0xfffc,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
+	    },
+	},
+
+	/* Lava Computers LavaPort-Dual and LavaPort-Quad 4*clock PCI serial ports */
+	{   /* "Lava Computers high-speed port", */
+	    {	PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_LAVAPORT_0,	0,	0	},
+	    {	0xffff,	0xfffc,				0,	0	},
+	    {
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ*4 },
+		{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ*4 },
 	    },
 	},
 
@@ -559,7 +597,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_IOFLEX_2S_0,	0,	0	},
 	    {	0xffff,	0xfffc,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -568,7 +606,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_IOFLEX_2S_1,	0,	0	},
 	    {	0xffff,	0xfffc,				0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -577,10 +615,10 @@ const struct puc_device_description puc_devices[] = {
 	    {   PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_OCTOPUS950_0, 0,      0       },
 	    {   0xffff, 0xfffc,				 0,      0       },
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x14, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x18, 0x00 },
-		{ PUC_PORT_TYPE_COM, 0x1c, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ },
+		{ PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -589,7 +627,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_USR, PCI_PRODUCT_USR_3CP5610,	0,	0	},
 	    {	0xffff,	0xffff,					0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x10, 0x00 },
+		{ PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
 	    },
 	},
 
@@ -599,7 +637,7 @@ const struct puc_device_description puc_devices[] = {
 	    {	PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_VENUSMODEM, 0,	0	},
 	    {	0xffff,	0xffff,					0,	0	},
 	    {
-		{ PUC_PORT_TYPE_COM, 0x18, 0x08 },
+		{ PUC_PORT_TYPE_COM, 0x18, 0x08, COM_FREQ },
 	    },
 	},
 
diff --git a/sys/dev/pci/pucvar.h b/sys/dev/pci/pucvar.h
index c3dccf3b135..39b7c8d94fb 100644
--- a/sys/dev/pci/pucvar.h
+++ b/sys/dev/pci/pucvar.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pucvar.h,v 1.2 1999/11/14 01:27:57 downsj Exp $	*/
+/*	$OpenBSD: pucvar.h,v 1.3 2001/03/15 17:52:20 deraadt Exp $	*/
 /*	$NetBSD: pucvar.h,v 1.2 1999/02/06 06:29:54 cgd Exp $	*/
 
 /*
@@ -44,9 +44,10 @@ struct puc_device_description {
 	pcireg_t		rval[4];
 	pcireg_t		rmask[4];
 	struct {
-		int	type;
-		int	bar;
-		int	offset;
+		u_short	type;
+		u_char	bar;
+		u_char	offset;
+		int	flags;
 	}			ports[PUC_MAX_PORTS];
 };
 
@@ -63,6 +64,10 @@ struct puc_device_description {
   ((port) < PUC_MAX_PORTS && (desc)->ports[(port)].type != PUC_PORT_TYPE_NONE)
 #define PUC_PORT_BAR_INDEX(bar)	(((bar) - PCI_MAPREG_START) / 4)
 
+/* Flags for PUC_PORT_TYPE_COM */
+/* * assume all clock rates have 8 lower bits to 0 - this leaves us 8 flags */
+#define PUC_COM_CLOCKMASK 0xffffff00
+
 struct puc_attach_args {
 	int			port;
 	int			type;
@@ -73,6 +78,7 @@ struct puc_attach_args {
 	bus_addr_t		a;
 	bus_space_tag_t		t;
 	bus_space_handle_t	h;
+	int			flags;
 };
 
 extern const struct puc_device_description puc_devices[];
diff --git a/sys/dev/puc/com_puc.c b/sys/dev/puc/com_puc.c
index 8e935c81c3d..f6b157d1063 100644
--- a/sys/dev/puc/com_puc.c
+++ b/sys/dev/puc/com_puc.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: com_puc.c,v 1.1 1999/10/26 13:08:44 downsj Exp $	*/
+/*	$OpenBSD: com_puc.c,v 1.2 2001/03/15 17:52:20 deraadt Exp $	*/
 
 /*
  * Copyright (c) 1997 - 1999, Jason Downs.  All rights reserved.
@@ -124,6 +124,9 @@ com_puc_attach(parent, self, aux)
 	sc->sc_iot = pa->t;
 	sc->sc_ioh = pa->h;
 	sc->sc_iobase = pa->a;
+	sc->sc_frequency = COM_FREQ;
+	if (pa->flags)
+		sc->sc_frequency = pa->flags & PUC_COM_CLOCKMASK;
 
 	com_puc_attach2(sc);
 }