Add "length" attribute to "weird" class instructions of small length: user

inline assembly, tb/tbnd instructions.

Don't use `r' qualifier for "register_operand", it's redundant.

2 files changed, 32 insertions, 22 deletions

diff --git a/gnu/gcc/gcc/config/m88k/m88k.md b/gnu/gcc/gcc/config/m88k/m88k.md
index 9424679b39e..a59e9a62a9c 100644
--- a/gnu/gcc/gcc/config/m88k/m88k.md
+++ b/gnu/gcc/gcc/config/m88k/m88k.md
@@ -68,7 +68,8 @@
 
 ; Describe a user's asm statement.
 (define_asm_attributes
-  [(set_attr "type" "weird")])
+  [(set_attr "type" "weird")
+   (set_attr "length" "1")])
 
 ; Define the delay slot requirements for branches and calls.
 ; The m88100 annuls instructions if a conditional branch is taken.
@@ -1761,7 +1762,7 @@
    or %0,%#r0,%q1
    %V1ld.bu\\t %0,%1
    %v0st.b\\t %r1,%0
-   subu %r0,%#r0,%Q1"
+   subu %0,%#r0,%Q1"
   [(set_attr "type" "arith,load,store,arith")])
 
 (define_insn ""
@@ -2395,7 +2396,7 @@
 	      (set (reg:CC 0)
 		   (unspec:CC [(match_dup 1) (match_dup 2)] 0))])]
   ""
-  "addu.co %r0,%r1,%r2")
+  "addu.co %0,%r1,%r2")
 
 (define_insn ""
   [(set (reg:CC 0) (unspec:CC [(match_operand:SI 0 "reg_or_0_operand" "rO")
@@ -2410,7 +2411,7 @@
 		 (unspec:SI [(match_operand:SI 2 "reg_or_0_operand" "rO")
 			     (reg:CC 0)] 0)))]
   ""
-  "addu.ci %r0,%r1,%r2")
+  "addu.ci %0,%r1,%r2")
 
 ;;- subtract instructions
 
@@ -2515,7 +2516,7 @@
 	      (set (reg:CC 0)
 		   (unspec:CC [(match_dup 1) (match_dup 2)] 1))])]
   ""
-  "subu.co %r0,%r1,%r2")
+  "subu.co %0,%r1,%r2")
 
 (define_insn ""
   [(set (reg:CC 0) (unspec:CC [(match_operand:SI 0 "reg_or_0_operand" "rO")
@@ -2530,7 +2531,7 @@
 		  (unspec:SI [(match_operand:SI 2 "reg_or_0_operand" "rO")
 			      (reg:CC 0)] 1)))]
   ""
-  "subu.ci %r0,%r1,%r2")
+  "subu.ci %0,%r1,%r2")
 
 ;;- multiply instructions
 ;;
@@ -2639,7 +2640,8 @@
   [(trap_if (const_int 1) (const_int 503))]
   ""
   "tb0 0,%#r0,503"
-  [(set_attr "type" "weird")])
+  [(set_attr "type" "weird")
+   (set_attr "length" "1")])
 
 ;; Conditional division by 0 trap.
 (define_expand "tcnd_divide_by_zero"
@@ -2876,7 +2878,8 @@
 		(const_int 0)))]
   ""
   "tb0 0,%#r0,503"
-  [(set_attr "type" "weird")])
+  [(set_attr "type" "weird")
+   (set_attr "length" "1")])
 
 ;; patterns for mixed mode floating point.
 ;; Do not define patterns that utilize mixed mode arithmetic that result
@@ -3274,15 +3277,17 @@
 		 (match_operand:SI 1 "arith_operand" "rI"))
 	    (const_int 7))]
   ""
-  "tbnd %r0,%1"
-  [(set_attr "type" "weird")])
+  "tbnd %0,%1"
+  [(set_attr "type" "weird")
+   (set_attr "length" "1")])
 
 ;; Just in case the optimizer decides to fold away the test.
 (define_insn ""
   [(trap_if (const_int 1) (const_int 7))]
   ""
   "tbnd %#r31,0"
-  [(set_attr "type" "weird")])
+  [(set_attr "type" "weird")
+   (set_attr "length" "1")])
 
 (define_expand "ashlsi3"
   [(set (match_operand:SI 0 "register_operand" "")
diff --git a/gnu/usr.bin/gcc/gcc/config/m88k/m88k.md b/gnu/usr.bin/gcc/gcc/config/m88k/m88k.md
index f0dd70b9b4b..f7c2e87b737 100644
--- a/gnu/usr.bin/gcc/gcc/config/m88k/m88k.md
+++ b/gnu/usr.bin/gcc/gcc/config/m88k/m88k.md
@@ -65,7 +65,8 @@
 
 ; Describe a user's asm statement.
 (define_asm_attributes
-  [(set_attr "type" "weird")])
+  [(set_attr "type" "weird")
+   (set_attr "length" "1")])
 
 ; Define the delay slot requirements for branches and calls.
 ; The m88100 annuls instructions if a conditional branch is taken.
@@ -1963,7 +1964,7 @@
    or %0,%#r0,%q1
    %V1ld.bu\\t %0,%1
    %v0st.b\\t %r1,%0
-   subu %r0,%#r0,%Q1"
+   subu %0,%#r0,%Q1"
   [(set_attr "type" "arith,load,store,arith")])
 
 (define_insn ""
@@ -2591,7 +2592,7 @@
 	      (set (reg:CC 0)
 		   (unspec:CC [(match_dup 1) (match_dup 2)] 0))])]
   ""
-  "addu.co %r0,%r1,%r2")
+  "addu.co %0,%r1,%r2")
 
 (define_insn ""
   [(set (reg:CC 0) (unspec:CC [(match_operand:SI 0 "reg_or_0_operand" "rO")
@@ -2606,7 +2607,7 @@
 		 (unspec:SI [(match_operand:SI 2 "reg_or_0_operand" "rO")
 			     (reg:CC 0)] 0)))]
   ""
-  "addu.ci %r0,%r1,%r2")
+  "addu.ci %0,%r1,%r2")
 
 ;;- subtract instructions
 
@@ -2711,7 +2712,7 @@
 	      (set (reg:CC 0)
 		   (unspec:CC [(match_dup 1) (match_dup 2)] 1))])]
   ""
-  "subu.co %r0,%r1,%r2")
+  "subu.co %0,%r1,%r2")
 
 (define_insn ""
   [(set (reg:CC 0) (unspec:CC [(match_operand:SI 0 "reg_or_0_operand" "rO")
@@ -2726,7 +2727,7 @@
 		  (unspec:SI [(match_operand:SI 2 "reg_or_0_operand" "rO")
 			      (reg:CC 0)] 1)))]
   ""
-  "subu.ci %r0,%r1,%r2")
+  "subu.ci %0,%r1,%r2")
 
 ;;- multiply instructions
 ;;
@@ -2835,7 +2836,8 @@
   [(trap_if (const_int 1) (const_int 503))]
   ""
   "tb0 0,%#r0,503"
-  [(set_attr "type" "weird")])
+  [(set_attr "type" "weird")
+   (set_attr "length" "1")])
 
 ;; Conditional division by 0 trap.
 (define_expand "tcnd_divide_by_zero"
@@ -3072,7 +3074,8 @@
 		(const_int 0)))]
   ""
   "tb0 0,%#r0,503"
-  [(set_attr "type" "weird")])
+  [(set_attr "type" "weird")
+   (set_attr "length" "1")])
 
 ;; patterns for mixed mode floating point.
 ;; Do not define patterns that utilize mixed mode arithmetic that result
@@ -3471,15 +3474,17 @@
 		 (match_operand:SI 1 "arith_operand" "rI"))
 	    (const_int 7))]
   ""
-  "tbnd %r0,%1"
-  [(set_attr "type" "weird")])
+  "tbnd %0,%1"
+  [(set_attr "type" "weird")
+   (set_attr "length" "1")])
 
 ;; Just in case the optimizer decides to fold away the test.
 (define_insn ""
   [(trap_if (const_int 1) (const_int 7))]
   ""
   "tbnd %#r31,0"
-  [(set_attr "type" "weird")])
+  [(set_attr "type" "weird")
+   (set_attr "length" "1")])
 
 (define_expand "ashlsi3"
   [(set (match_operand:SI 0 "register_operand" "")