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authorJonathan Gray <jsg@cvs.openbsd.org>2019-07-31 10:37:43 +0000
committerJonathan Gray <jsg@cvs.openbsd.org>2019-07-31 10:37:43 +0000
commit4b4c0d034e042306605213fca69fd7de4819201f (patch)
tree06bd43377c78d9863a164135db57a2faf8470fbf
parent8ab2045b3c649fedfd64b031fb6f18b06227f5e7 (diff)
drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE
From Tiecheng Zhou c242a531bb068c91bea7454353206330423ec1a6 in linux 4.19.y/4.19.63 fe2b5323d2c3cedaa3bf943dc7a0d233c853c914 in mainline linux
-rw-r--r--sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c b/sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c
index 836227031b8..c58bfffb74d 100644
--- a/sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c
+++ b/sys/dev/pci/drm/amd/amdgpu/gmc_v9_0.c
@@ -1041,6 +1041,9 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
+ WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
+ WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
+
/* After HDP is initialized, flush HDP.*/
adev->nbio_funcs->hdp_flush(adev, NULL);