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authorPer Fogelstrom <pefo@cvs.openbsd.org>1998-09-15 10:58:55 +0000
committerPer Fogelstrom <pefo@cvs.openbsd.org>1998-09-15 10:58:55 +0000
commit501ab940284a1d26dbc73f2cb404c266f2483052 (patch)
treed1818743b6b07b40b0aac165a39285145df45192
parent84e4f39da42d6960834a60df1a8b384d35b0f388 (diff)
Real trapframe and no more __FORK_BRAINDAMAGE
-rw-r--r--sys/arch/arc/arc/genassym.cf9
-rw-r--r--sys/arch/arc/arc/locore.S53
-rw-r--r--sys/arch/arc/arc/machdep.c216
-rw-r--r--sys/arch/arc/arc/trap.c353
4 files changed, 310 insertions, 321 deletions
diff --git a/sys/arch/arc/arc/genassym.cf b/sys/arch/arc/arc/genassym.cf
index 09c1dc46315..e74edea0316 100644
--- a/sys/arch/arc/arc/genassym.cf
+++ b/sys/arch/arc/arc/genassym.cf
@@ -1,4 +1,4 @@
-# $OpenBSD: genassym.cf,v 1.1 1997/04/19 17:19:42 pefo Exp $ */
+# $OpenBSD: genassym.cf,v 1.2 1998/09/15 10:58:53 pefo Exp $ */
#
# Copyright (c) 1997 Per Fogelstrom / Opsycon AB
#
@@ -38,16 +38,13 @@ include <sys/proc.h>
include <sys/mbuf.h>
include <sys/user.h>
-include <machine/reg.h>
-
-
define P_FORW offsetof(struct proc, p_forw)
define P_BACK offsetof(struct proc, p_back)
define P_PRIORITY offsetof(struct proc, p_priority)
define P_ADDR offsetof(struct proc, p_addr)
define P_UPTE offsetof(struct proc, p_md.md_upte)
-define U_PCB_REGS offsetof(struct user, u_pcb.pcb_regs[ZERO])
-define U_PCB_FPREGS offsetof(struct user, u_pcb.pcb_regs[F0])
+define U_PCB_REGS offsetof(struct user, u_pcb.pcb_regs.zero)
+define U_PCB_FPREGS offsetof(struct user, u_pcb.pcb_regs.f0)
define U_PCB_CONTEXT offsetof(struct user, u_pcb.pcb_context)
define U_PCB_ONFAULT offsetof(struct user, u_pcb.pcb_onfault)
define U_PCB_SEGTAB offsetof(struct user, u_pcb.pcb_segtab)
diff --git a/sys/arch/arc/arc/locore.S b/sys/arch/arc/arc/locore.S
index 0a442f43646..7d51c229c00 100644
--- a/sys/arch/arc/arc/locore.S
+++ b/sys/arch/arc/arc/locore.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: locore.S,v 1.17 1998/03/25 11:42:08 pefo Exp $ */
+/* $OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $ */
/*
* Copyright (c) 1992, 1993
* The Regents of the University of California. All rights reserved.
@@ -50,7 +50,7 @@
* v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL)
*
* from: @(#)locore.s 8.5 (Berkeley) 1/4/94
- * $Id: locore.S,v 1.17 1998/03/25 11:42:08 pefo Exp $
+ * $Id: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $
*/
/*
@@ -70,7 +70,7 @@
#include "assym.h"
- .set noreorder
+ .set noreorder # Noreorder is default style!
/*
* Amount to take off of the stack for the benefit of the debugger.
@@ -105,10 +105,14 @@ start:
sw t1, fpu_id # save FPU ID register
jal main # main(regs)
move a0, zero
+ PANIC("Startup failed!")
/*
- * proc[1] == /etc/init now running here.
- * Restore user registers and return.
+ * Setup for and return to user.
*/
+LEAF(proc_trampoline)
+ jal s0
+ move a0,s1 # set up for return to user.
+
.set noat
li v0, SR_EXL
mtc0 v0, COP_0_STATUS_REG # set exeption level bit.
@@ -121,7 +125,7 @@ start:
lw AT, UADDR+U_PCB_REGS+(AST * 4)
lw v0, UADDR+U_PCB_REGS+(V0 * 4)
dmtc0 a0, COP_0_EXC_PC # set return address
- li a0, PSL_USERSET
+ lw a0, UADDR+U_PCB_REGS+(SR * 4)
mtc0 a0, COP_0_STATUS_REG # switch to user mode (when eret...)
lw v1, UADDR+U_PCB_REGS+(V1 * 4)
lw a0, UADDR+U_PCB_REGS+(A0 * 4)
@@ -152,6 +156,7 @@ start:
lw t9, UADDR+U_PCB_REGS+(T9 * 4)
eret
.set at
+END(proc_trampoline)
/*
* Primitives
@@ -1060,16 +1065,10 @@ SlowFault:
SAVE_REG(AT, AST, sp) ;\
SAVE_REG(v0, V0, sp) ;\
SAVE_REG(v1, V1, sp) ;\
- mflo v0 ;\
- mfhi v1 ;\
SAVE_REG(a0, A0, sp) ;\
SAVE_REG(a1, A1, sp) ;\
SAVE_REG(a2, A2, sp) ;\
SAVE_REG(a3, A3, sp) ;\
- mfc0 a0, COP_0_STATUS_REG ;\
- mfc0 a1, COP_0_CAUSE_REG ;\
- mfc0 a2, COP_0_BAD_VADDR ;\
- mfc0 a3, COP_0_EXC_PC ;\
SAVE_REG(t0, T0, sp) ;\
SAVE_REG(t1, T1, sp) ;\
SAVE_REG(t2, T2, sp) ;\
@@ -1080,6 +1079,12 @@ SlowFault:
SAVE_REG(t7, T7, sp) ;\
SAVE_REG(t8, T8, sp) ;\
SAVE_REG(t9, T9, sp) ;\
+ mflo v0 ;\
+ mfhi v1 ;\
+ mfc0 a0, COP_0_STATUS_REG ;\
+ mfc0 a1, COP_0_CAUSE_REG ;\
+ mfc0 a2, COP_0_BAD_VADDR ;\
+ mfc0 a3, COP_0_EXC_PC ;\
SAVE_REG(v0, MULLO, sp) ;\
SAVE_REG(v1, MULHI, sp) ;\
SAVE_REG(a0, SR, sp) ;\
@@ -1089,6 +1094,7 @@ SlowFault:
SAVE_REG(a3, PC, sp) ;\
addu v0, sp, KERN_EXC_FRAME_SIZE ;\
SAVE_REG(v0, SP, sp) ;\
+ addu a0, sp, STAND_ARG_SIZE ;\
mtc0 zero,COP_0_STATUS_REG
#ifdef DDB
@@ -1156,7 +1162,7 @@ NNON_LEAF(MipsKernGenException, KERN_EXC_FRAME_SIZE, ra)
SAVE_CPU
SAVE_CPU_DDB
/*
- * Call the exception handler.
+ * Call the exception handler. a0 points at the saved frame.
*/
jal trap
sw a3, STAND_RA_OFFSET + KERN_REG_SIZE(sp) # for debugging
@@ -1228,13 +1234,16 @@ NNON_LEAF(MipsUserGenException, STAND_FRAME_SIZE, ra)
sw v0, UADDR+U_PCB_REGS+(MULLO * 4)
sw v1, UADDR+U_PCB_REGS+(MULHI * 4)
sw a0, UADDR+U_PCB_REGS+(SR * 4)
- la gp, _gp # switch to kernel GP
+ sw a1, UADDR+U_PCB_REGS+(CAUSE * 4)
+ sw a2, UADDR+U_PCB_REGS+(BADVADDR * 4)
sw a3, UADDR+U_PCB_REGS+(PC * 4)
sw a3, STAND_RA_OFFSET(sp) # for debugging
+ la gp, _gp # switch to kernel GP
.set at
# Turn off fpu and enter kernel mode
and t0, a0, ~(SR_COP_1_BIT | SR_EXL | SR_KSU_MASK | SR_INT_ENAB)
.set noat
+ li a0, UADDR+U_PCB_REGS
/*
* Call the exception handler.
*/
@@ -1388,6 +1397,7 @@ NNON_LEAF(MipsUserIntr, STAND_FRAME_SIZE, ra)
sw v0, UADDR+U_PCB_REGS+(MULLO * 4)
sw v1, UADDR+U_PCB_REGS+(MULHI * 4)
sw a0, UADDR+U_PCB_REGS+(SR * 4)
+ sw a1, UADDR+U_PCB_REGS+(CAUSE * 4)
sw a3, UADDR+U_PCB_REGS+(PC * 4)
la gp, _gp # switch to kernel GP
# Turn off fpu and enter kernel mode
@@ -1395,6 +1405,7 @@ NNON_LEAF(MipsUserIntr, STAND_FRAME_SIZE, ra)
and t0, a0, ~(SR_COP_1_BIT | SR_EXL | SR_INT_ENAB | SR_KSU_MASK)
.set noat
mtc0 t0, COP_0_STATUS_REG
+ li a0, UADDR+U_PCB_REGS
/*
* Call the interrupt handler.
*/
@@ -2921,10 +2932,10 @@ END(R4K_HitFlushDCache)
*
* R4K_InvalidateDCache --
*
- * void R4K_FlushDCache(addr, len)
+ * void R4K_InvalidateDCache(addr, len)
* vm_offset_t addr, len;
*
- * Flush data cache for range of addr to addr + len - 1.
+ * Invalidate data cache for range of addr to addr + len - 1.
* The address can be any valid address as long as no TLB misses occur.
* (Be sure to use cached K0SEG kernel addresses or mapped addresses)
* Results:
@@ -2938,15 +2949,19 @@ END(R4K_HitFlushDCache)
LEAF(R4K_InvalidateDCache)
addu a1, a1, a0 # compute ending address
1:
- cache 0x11, 8194(a0)
- addu a0, a0, 4
+ cache 0x11, 0(a0)
+ cache 0x11, 32(a0)
+ cache 0x11, 64(a0)
+ cache 0x11, 96(a0)
bne a0, a1, 1b
- cache 0x11, -4(a0)
+ addu a0, a0, 128
j ra
nop
END(R4K_InvalidateDCache)
+
+
#if defined(DDB) || defined(DEBUG)
LEAF(kdbpeek)
li v0, DDBERR
diff --git a/sys/arch/arc/arc/machdep.c b/sys/arch/arc/arc/machdep.c
index 0446dd053a1..385f3ee8d57 100644
--- a/sys/arch/arc/arc/machdep.c
+++ b/sys/arch/arc/arc/machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: machdep.c,v 1.32 1998/03/25 11:48:14 pefo Exp $ */
+/* $OpenBSD: machdep.c,v 1.33 1998/09/15 10:58:54 pefo Exp $ */
/*
* Copyright (c) 1988 University of Utah.
* Copyright (c) 1992, 1993
@@ -38,7 +38,7 @@
* SUCH DAMAGE.
*
* from: @(#)machdep.c 8.3 (Berkeley) 1/12/94
- * $Id: machdep.c,v 1.32 1998/03/25 11:48:14 pefo Exp $
+ * $Id: machdep.c,v 1.33 1998/09/15 10:58:54 pefo Exp $
*/
/* from: Utah Hdr: machdep.c 1.63 91/04/24 */
@@ -82,12 +82,13 @@
#include <machine/pte.h>
#include <machine/cpu.h>
-#include <machine/reg.h>
+#include <machine/frame.h>
#include <machine/pio.h>
#include <machine/psl.h>
#include <machine/bus.h>
#include <machine/autoconf.h>
#include <machine/memconf.h>
+#include <machine/regnum.h>
#include <sys/exec_ecoff.h>
@@ -158,7 +159,6 @@ void dumpconf __P((void));
static void tlb_init_pica __P((void));
static void tlb_init_tyne __P((void));
-static int get_simm_size __P((int *, int));
static char *getenv __P((char *env));
static void get_eth_hw_addr __P((char *));
static int atoi __P((char *, int));
@@ -252,23 +252,26 @@ mips_init(argc, argv, envv)
/* Make this more fancy when more comes in here */
environment = envv;
-#if 0
- system_type = ALGOR_P4032;
- strcpy(cpu_model, "Algorithmics P-4032");
- arc_bus_io.bus_sparse1 = 2;
- arc_bus_io.bus_sparse2 = 1;
- arc_bus_io.bus_sparse4 = 0;
- arc_bus_io.bus_sparse8 = 0;
- CONADDR = P4032_COM1;
-#else
- system_type = ALGOR_P5064;
- strcpy(cpu_model, "Algorithmics P-5064");
- arc_bus_io.bus_sparse1 = 0;
- arc_bus_io.bus_sparse2 = 0;
- arc_bus_io.bus_sparse4 = 0;
- arc_bus_io.bus_sparse8 = 0;
- CONADDR = P5064_COM1;
-#endif
+
+ cp = getenv("boardtype");
+ if(cp && strncasecmp("P-4032", cp, 6) == 0) {
+ system_type = ALGOR_P4032;
+ strcpy(cpu_model, "Algorithmics P-4032");
+ arc_bus_io.bus_sparse1 = 2;
+ arc_bus_io.bus_sparse2 = 1;
+ arc_bus_io.bus_sparse4 = 0;
+ arc_bus_io.bus_sparse8 = 0;
+ CONADDR = P4032_COM1;
+ }
+ else { /* Default to P-5064 */
+ system_type = ALGOR_P5064;
+ strcpy(cpu_model, "Algorithmics P-5064");
+ arc_bus_io.bus_sparse1 = 0;
+ arc_bus_io.bus_sparse2 = 0;
+ arc_bus_io.bus_sparse4 = 0;
+ arc_bus_io.bus_sparse8 = 0;
+ CONADDR = P5064_COM1;
+ }
mem_layout[0].mem_start = 0;
mem_layout[0].mem_size = mips_trunc_page(CACHED_TO_PHYS(kernel_text));
@@ -276,22 +279,13 @@ mips_init(argc, argv, envv)
if(getenv("memsize") != 0) {
i = atoi(getenv("memsize"), 10);
i = 1024 * 1024 * i;
- mem_layout[1].mem_size = i - (int)(CACHED_TO_PHYS(sysend));
- physmem = i;
}
else {
- i = get_simm_size((int *)0, 128*1024*1024);
- mem_layout[1].mem_size = i - (int)(CACHED_TO_PHYS(sysend));
- physmem = i;
-/*XXX Ouch!!! */
- mem_layout[2].mem_start = i;
- mem_layout[2].mem_size = get_simm_size((int *)(i), 0);
- physmem += mem_layout[2].mem_size;
- mem_layout[3].mem_start = i+i/2;
- mem_layout[3].mem_size = get_simm_size((int *)(i+i/2), 0);
- physmem += mem_layout[3].mem_size;
+ i = 1024 * 1024 * 16; /* Reasonable default */
}
-/*XXX*/
+ mem_layout[1].mem_size = i - (int)(CACHED_TO_PHYS(sysend));
+ physmem = i;
+
argv[0] = getenv("bootdev");
if(argv[0] == 0)
argv[0] = "unknown";
@@ -398,7 +392,7 @@ mips_init(argc, argv, envv)
sysend = (caddr_t)(((int)sysend + 3) & -4);
start = sysend;
curproc->p_addr = proc0paddr = (struct user *)sysend;
- curproc->p_md.md_regs = proc0paddr->u_pcb.pcb_regs;
+ curproc->p_md.md_regs = (struct trap_frame *)&proc0paddr->u_pcb.pcb_regs;
firstaddr = CACHED_TO_PHYS(sysend);
for (i = 0; i < UPAGES; i+=2) {
tlb.tlb_mask = PG_SIZE_4K;
@@ -420,7 +414,7 @@ mips_init(argc, argv, envv)
* This could be used for an idle process.
*/
nullproc.p_addr = (struct user *)sysend;
- nullproc.p_md.md_regs = nullproc.p_addr->u_pcb.pcb_regs;
+ nullproc.p_md.md_regs = (struct trap_frame *)&nullproc.p_addr->u_pcb.pcb_regs;
bcopy("nullproc", nullproc.p_comm, sizeof("nullproc"));
firstaddr = CACHED_TO_PHYS(sysend);
for (i = 0; i < UPAGES; i+=2) {
@@ -622,86 +616,6 @@ tlb_init_tyne()
}
/*
- * Simple routine to figure out SIMM module size.
- * This code is a real hack and can surely be improved on... :-)
- */
-static int
-get_simm_size(fadr, max)
- int *fadr;
- int max;
-{
- int msave;
- int msize;
- int ssize;
- static int a1 = 0, a2 = 0;
- static int s1 = 0, s2 = 0;
-
- if(!max) {
- if(a1 == (int)fadr)
- return(s1);
- else if(a2 == (int)fadr)
- return(s2);
- else
- return(0);
- }
- fadr = (int *)PHYS_TO_UNCACHED(CACHED_TO_PHYS((int)fadr));
-
- msize = max - 0x400000;
- ssize = msize - 0x400000;
-
- /* Find bank size of last module */
- while(ssize >= 0) {
- msave = fadr[ssize / 4];
- fadr[ssize / 4] = 0xC0DEB00F;
- if(fadr[msize /4 ] == 0xC0DEB00F) {
- fadr[ssize / 4] = msave;
- if(fadr[msize/4] == msave) {
- break; /* Wrap around */
- }
- }
- fadr[ssize / 4] = msave;
- ssize -= 0x400000;
- }
- msize = msize - ssize;
- if(msize == max)
- return(msize); /* well it never wrapped... */
-
- msave = fadr[0];
- fadr[0] = 0xC0DEB00F;
- if(fadr[msize / 4] == 0xC0DEB00F) {
- fadr[0] = msave;
- if(fadr[msize / 4] == msave)
- return(msize); /* First module wrap = size */
- }
-
- /* Ooops! Two not equal modules. Find size of first + second */
- s1 = s2 = msize;
- ssize = 0;
- while(ssize < max) {
- msave = fadr[ssize / 4];
- fadr[ssize / 4] = 0xC0DEB00F;
- if(fadr[msize /4 ] == 0xC0DEB00F) {
- fadr[ssize / 4] = msave;
- if(fadr[msize/4] == msave) {
- break; /* Found end of module 1 */
- }
- }
- fadr[ssize / 4] = msave;
- ssize += s2;
- msize += s2;
- }
-
- /* Is second bank dual sided? */
- fadr[(ssize+ssize/2)/4] = ~fadr[ssize];
- if(fadr[(ssize+ssize/2)/4] != fadr[ssize]) {
- a2 = ssize+ssize/2;
- }
- a1 = ssize;
-
- return(ssize);
-}
-
-/*
* Return a pointer to the given environment variable.
*/
static char *
@@ -904,11 +818,11 @@ setregs(p, pack, stack, retval)
{
extern struct proc *machFPCurProcPtr;
- bzero((caddr_t)p->p_md.md_regs, (FSR + 1) * sizeof(int));
- p->p_md.md_regs[SP] = stack;
- p->p_md.md_regs[PC] = pack->ep_entry & ~3;
- p->p_md.md_regs[T9] = pack->ep_entry & ~3; /* abicall req */
- p->p_md.md_regs[PS] = PSL_USERSET;
+ bzero((caddr_t)p->p_md.md_regs, sizeof(struct trap_frame));
+ p->p_md.md_regs->sp = stack;
+ p->p_md.md_regs->pc = pack->ep_entry & ~3;
+ p->p_md.md_regs->t9 = pack->ep_entry & ~3; /* abicall req */
+ p->p_md.md_regs->sr = PSL_USERSET;
p->p_md.md_flags &= ~MDP_FPUSED;
if (machFPCurProcPtr == p)
machFPCurProcPtr = (struct proc *)0;
@@ -947,10 +861,10 @@ sendsig(catcher, sig, mask, code, type, val)
int type;
union sigval val;
{
- register struct proc *p = curproc;
- register struct sigframe *fp;
- register int *regs;
- register struct sigacts *psp = p->p_sigacts;
+ struct proc *p = curproc;
+ struct sigframe *fp;
+ struct trap_frame *regs;
+ struct sigacts *psp = p->p_sigacts;
int oonstack, fsize;
struct sigcontext ksc;
extern char sigcode[], esigcode[];
@@ -974,7 +888,7 @@ sendsig(catcher, sig, mask, code, type, val)
psp->ps_sigstk.ss_size - fsize);
psp->ps_sigstk.ss_flags |= SA_ONSTACK;
} else
- fp = (struct sigframe *)(regs[SP] - fsize);
+ fp = (struct sigframe *)(regs->sp - fsize);
if ((unsigned)fp <= USRSTACK - ctob(p->p_vmspace->vm_ssize))
(void)grow(p, (unsigned)fp);
#ifdef DEBUG
@@ -988,11 +902,11 @@ sendsig(catcher, sig, mask, code, type, val)
*/
ksc.sc_onstack = oonstack;
ksc.sc_mask = mask;
- ksc.sc_pc = regs[PC];
- ksc.mullo = regs[MULLO];
- ksc.mulhi = regs[MULHI];
- ksc.sc_regs[ZERO] = 0xACEDBADE; /* magic number */
- bcopy((caddr_t)&regs[1], (caddr_t)&ksc.sc_regs[1],
+ ksc.sc_pc = regs->pc;
+ ksc.mullo = regs->mullo;
+ ksc.mulhi = regs->mulhi;
+ ksc.sc_regs[0] = 0xACEDBADE; /* magic number */
+ bcopy((caddr_t)&regs->ast, (caddr_t)&ksc.sc_regs[1],
sizeof(ksc.sc_regs) - sizeof(int));
ksc.sc_fpused = p->p_md.md_flags & MDP_FPUSED;
if (ksc.sc_fpused) {
@@ -1001,7 +915,7 @@ sendsig(catcher, sig, mask, code, type, val)
/* if FPU has current state, save it first */
if (p == machFPCurProcPtr)
MipsSaveCurFPState(p);
- bcopy((caddr_t)&p->p_md.md_regs[F0], (caddr_t)ksc.sc_fpregs,
+ bcopy((caddr_t)&p->p_md.md_regs->f0, (caddr_t)ksc.sc_fpregs,
sizeof(ksc.sc_fpregs));
}
@@ -1030,18 +944,18 @@ bail:
/*
* Build the argument list for the signal handler.
*/
- regs[A0] = sig;
- regs[A1] = (psp->ps_siginfo & sigmask(sig)) ? (int)&fp->sf_si : NULL;
- regs[A2] = (int)&fp->sf_sc;
- regs[A3] = (int)catcher;
-
- regs[PC] = (int)catcher;
- regs[T9] = (int)catcher;
- regs[SP] = (int)fp;
+ regs->a0 = sig;
+ regs->a1 = (psp->ps_siginfo & sigmask(sig)) ? (int)&fp->sf_si : NULL;
+ regs->a2 = (int)&fp->sf_sc;
+ regs->a3 = (int)catcher;
+
+ regs->pc = (int)catcher;
+ regs->t9 = (int)catcher;
+ regs->sp = (int)fp;
/*
* Signal trampoline code is at base of user stack.
*/
- regs[RA] = (int)PS_STRINGS - (esigcode - sigcode);
+ regs->ra = (int)PS_STRINGS - (esigcode - sigcode);
#ifdef DEBUG
if ((sigdebug & SDB_FOLLOW) ||
((sigdebug & SDB_KSTACK) && (p->p_pid == sigpid)))
@@ -1070,8 +984,8 @@ sys_sigreturn(p, v, retval)
struct sys_sigreturn_args /* {
syscallarg(struct sigcontext *) sigcntxp;
} */ *uap = v;
- register struct sigcontext *scp;
- register int *regs;
+ struct sigcontext *scp;
+ struct trap_frame *regs;
struct sigcontext ksc;
int error;
@@ -1091,7 +1005,7 @@ sys_sigreturn(p, v, retval)
if (!(sigdebug & SDB_FOLLOW))
printf("sigreturn: pid %d, scp %x\n", p->p_pid, scp);
printf(" old sp %x ra %x pc %x\n",
- regs[SP], regs[RA], regs[PC]);
+ regs->sp, regs->ra, regs->pc);
printf(" new sp %x ra %x pc %x err %d z %x\n",
ksc.sc_regs[SP], ksc.sc_regs[RA], ksc.sc_regs[PC],
error, ksc.sc_regs[ZERO]);
@@ -1107,13 +1021,13 @@ sys_sigreturn(p, v, retval)
else
p->p_sigacts->ps_sigstk.ss_flags &= ~SA_ONSTACK;
p->p_sigmask = scp->sc_mask &~ sigcantmask;
- regs[PC] = scp->sc_pc;
- regs[MULLO] = scp->mullo;
- regs[MULHI] = scp->mulhi;
- bcopy((caddr_t)&scp->sc_regs[1], (caddr_t)&regs[1],
+ regs->pc = scp->sc_pc;
+ regs->mullo = scp->mullo;
+ regs->mulhi = scp->mulhi;
+ bcopy((caddr_t)&scp->sc_regs[1], (caddr_t)&regs->ast,
sizeof(scp->sc_regs) - sizeof(int));
if (scp->sc_fpused)
- bcopy((caddr_t)scp->sc_fpregs, (caddr_t)&p->p_md.md_regs[F0],
+ bcopy((caddr_t)scp->sc_fpregs, (caddr_t)&p->p_md.md_regs->f0,
sizeof(scp->sc_fpregs));
return (EJUSTRETURN);
}
@@ -1155,6 +1069,10 @@ boot(howto)
(void) splhigh(); /* extreme priority */
if (howto & RB_HALT) {
printf("System halted.\n");
+ if(system_type == ALGOR_P5064 && howto & RB_POWERDOWN) {
+ printf("Shutting off!\n");
+ *(int *)(0xbffa000c) = 1;
+ }
while(1); /* Forever */
}
else {
diff --git a/sys/arch/arc/arc/trap.c b/sys/arch/arc/arc/trap.c
index 2e2c3d5e635..39c9a179f8b 100644
--- a/sys/arch/arc/arc/trap.c
+++ b/sys/arch/arc/arc/trap.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: trap.c,v 1.17 1998/03/25 11:51:36 pefo Exp $ */
+/* $OpenBSD: trap.c,v 1.18 1998/09/15 10:58:54 pefo Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -61,7 +61,6 @@
#include <machine/trap.h>
#include <machine/psl.h>
-#include <machine/reg.h>
#include <machine/cpu.h>
#include <machine/pio.h>
#include <machine/intr.h>
@@ -70,6 +69,7 @@
#include <machine/pmap.h>
#include <machine/mips_opcode.h>
#include <machine/frame.h>
+#include <machine/regnum.h>
#include <vm/vm.h>
#include <vm/vm_kern.h>
@@ -224,8 +224,8 @@ struct trapdebug { /* trap history buffer for debugging */
void trapDump __P((char *));
-void stacktrace __P((int *));
-void logstacktrace __P((int *));
+void stacktrace __P((struct trap_frame *));
+void logstacktrace __P((struct trap_frame *));
int kdbpeek __P((int *));
#if defined(DDB)
int kdb_trap __P((int, db_regs_t *));
@@ -238,17 +238,18 @@ extern void MipsTLBMiss __P((void));
extern const struct callback *callv;
extern u_long intrcnt[];
-extern void MipsSwitchFPState __P((struct proc *, int *));
+extern void MipsSwitchFPState __P((struct proc *, struct trap_frame *));
extern void MipsFPTrap __P((u_int, u_int, u_int));
extern void arpintr __P((void));
extern void ipintr __P((void));
extern void pppintr __P((void));
-u_int trap __P((u_int, u_int, u_int, u_int, struct trap_frame));
-void interrupt __P((u_int, u_int, u_int, u_int, u_int));
-void softintr __P((u_int, u_int));
+u_int trap __P((struct trap_frame *));
+void child_return __P((struct proc *p));
+void interrupt __P((struct trap_frame *));
+void softintr __P((u_int));
int cpu_singlestep __P((struct proc *));
-u_int MipsEmulateBranch __P((int *, int, int, u_int));
+u_int MipsEmulateBranch __P((struct trap_frame *, int, int, u_int));
/*
* Handle an exception.
@@ -258,12 +259,8 @@ u_int MipsEmulateBranch __P((int *, int, int, u_int));
* ((struct pcb *)UADDR)->pcb_onfault is set, otherwise, return old pc.
*/
u_int
-trap(statusReg, causeReg, vadr, pc, f)
- u_int statusReg; /* status register at time of the exception */
- u_int causeReg; /* cause register at time of exception */
- u_int vadr; /* address (if any) the fault occured on */
- u_int pc; /* program counter where to continue */
- struct trap_frame f;
+trap(trapframe)
+ struct trap_frame *trapframe;
{
int type, i;
unsigned ucode = 0;
@@ -275,20 +272,20 @@ trap(statusReg, causeReg, vadr, pc, f)
union sigval sv;
#if defined(DDB) || defined(DEBUG)
- trp->status = statusReg;
- trp->cause = causeReg;
- trp->vadr = vadr;
- trp->pc = pc;
- trp->ra = !USERMODE(statusReg) ? f.reg[PC] :
- p->p_md.md_regs[RA];
- trp->sp = (int)&f;
+ trp->status = trapframe->sr;
+ trp->cause = trapframe->cause;
+ trp->vadr = trapframe->badvaddr;
+ trp->pc = trapframe->pc;
+ trp->ra = !USERMODE(trapframe->sr) ? trapframe->pc :
+ p->p_md.md_regs->ra;
+ trp->sp = (u_int)trapframe;
trp->code = 0;
if (++trp == &trapdebug[TRAPSIZE])
trp = trapdebug;
#endif
- type = (causeReg & CR_EXC_CODE) >> CR_EXC_CODE_SHIFT;
- if (USERMODE(statusReg)) {
+ type = (trapframe->cause & CR_EXC_CODE) >> CR_EXC_CODE_SHIFT;
+ if (USERMODE(trapframe->sr)) {
type |= T_USER;
sticks = p->p_sticks;
}
@@ -297,32 +294,32 @@ trap(statusReg, causeReg, vadr, pc, f)
* Enable hardware interrupts if they were on before.
* We only respond to software interrupts when returning to user mode.
*/
- if (statusReg & SR_INT_ENAB)
- splx((statusReg & HARD_INT_MASK) | SR_INT_ENAB);
+ if (trapframe->sr & SR_INT_ENAB)
+ splx((trapframe->sr & HARD_INT_MASK) | SR_INT_ENAB);
switch (type) {
case T_TLB_MOD:
/* check for kernel address */
- if ((int)vadr < 0) {
+ if ((int)trapframe->badvaddr < 0) {
pt_entry_t *pte;
unsigned int entry;
vm_offset_t pa;
- pte = kvtopte(vadr);
+ pte = kvtopte(trapframe->badvaddr);
entry = pte->pt_entry;
#ifdef DIAGNOSTIC
if (!(entry & PG_V) || (entry & PG_M))
panic("trap: ktlbmod: invalid pte");
#endif
- if (pmap_is_page_ro(pmap_kernel(), mips_trunc_page(vadr), entry)) {
+ if (pmap_is_page_ro(pmap_kernel(), mips_trunc_page(trapframe->badvaddr), entry)) {
/* write to read only page in the kernel */
ftype = VM_PROT_WRITE;
goto kernel_fault;
}
entry |= PG_M;
pte->pt_entry = entry;
- vadr &= ~PGOFSET;
- R4K_TLBUpdate(vadr, entry);
+ trapframe->badvaddr &= ~PGOFSET;
+ R4K_TLBUpdate(trapframe->badvaddr, entry);
pa = pfn_to_vad(entry);
#ifdef ATTR
pmap_attributes[atop(pa)] |= PMAP_ATTR_MOD;
@@ -331,7 +328,7 @@ trap(statusReg, causeReg, vadr, pc, f)
panic("trap: ktlbmod: unmanaged page");
PHYS_TO_VM_PAGE(pa)->flags &= ~PG_CLEAN;
#endif
- return (pc);
+ return (trapframe->pc);
}
/* FALLTHROUGH */
@@ -342,24 +339,24 @@ trap(statusReg, causeReg, vadr, pc, f)
vm_offset_t pa;
pmap_t pmap = &p->p_vmspace->vm_pmap;
- if (!(pte = pmap_segmap(pmap, vadr)))
+ if (!(pte = pmap_segmap(pmap, trapframe->badvaddr)))
panic("trap: utlbmod: invalid segmap");
- pte += (vadr >> PGSHIFT) & (NPTEPG - 1);
+ pte += (trapframe->badvaddr >> PGSHIFT) & (NPTEPG - 1);
entry = pte->pt_entry;
#ifdef DIAGNOSTIC
if (!(entry & PG_V) || (entry & PG_M)) {
panic("trap: utlbmod: invalid pte");
}
#endif
- if (pmap_is_page_ro(pmap, (vm_offset_t)mips_trunc_page(vadr), entry)) {
+ if (pmap_is_page_ro(pmap, (vm_offset_t)mips_trunc_page(trapframe->badvaddr), entry)) {
/* write to read only page */
ftype = VM_PROT_WRITE;
goto dofault;
}
entry |= PG_M;
pte->pt_entry = entry;
- vadr = (vadr & ~PGOFSET) | (pmap->pm_tlbpid << VMTLB_PID_SHIFT);
- R4K_TLBUpdate(vadr, entry);
+ trapframe->badvaddr = (trapframe->badvaddr & ~PGOFSET) | (pmap->pm_tlbpid << VMTLB_PID_SHIFT);
+ R4K_TLBUpdate(trapframe->badvaddr, entry);
pa = pfn_to_vad(entry);
#ifdef ATTR
pmap_attributes[atop(pa)] |= PMAP_ATTR_MOD;
@@ -369,8 +366,8 @@ trap(statusReg, causeReg, vadr, pc, f)
}
PHYS_TO_VM_PAGE(pa)->flags &= ~PG_CLEAN;
#endif
- if (!USERMODE(statusReg))
- return (pc);
+ if (!USERMODE(trapframe->sr))
+ return (trapframe->pc);
goto out;
}
@@ -378,15 +375,15 @@ trap(statusReg, causeReg, vadr, pc, f)
case T_TLB_ST_MISS:
ftype = (type == T_TLB_ST_MISS) ? VM_PROT_WRITE : VM_PROT_READ;
/* check for kernel address */
- if ((int)vadr < 0) {
+ if ((int)trapframe->badvaddr < 0) {
vm_offset_t va;
int rv;
kernel_fault:
- va = trunc_page((vm_offset_t)vadr);
+ va = trunc_page((vm_offset_t)trapframe->badvaddr);
rv = vm_fault(kernel_map, va, ftype, FALSE);
if (rv == KERN_SUCCESS)
- return (pc);
+ return (trapframe->pc);
if ((i = ((struct pcb *)UADDR)->pcb_onfault) != 0) {
((struct pcb *)UADDR)->pcb_onfault = 0;
return (onfault_table[i]);
@@ -419,11 +416,11 @@ trap(statusReg, causeReg, vadr, pc, f)
vm = p->p_vmspace;
map = &vm->vm_map;
- va = trunc_page((vm_offset_t)vadr);
+ va = trunc_page((vm_offset_t)trapframe->badvaddr);
rv = vm_fault(map, va, ftype, FALSE);
#ifdef VMFAULT_TRACE
printf("vm_fault(%x (pmap %x), %x (%x), %x, %d) -> %x at pc %x\n",
- map, &vm->vm_pmap, va, vadr, ftype, FALSE, rv, pc);
+ map, &vm->vm_pmap, va, trapframe->badvaddr, ftype, FALSE, rv, trapframe->pc);
#endif
/*
* If this was a stack access we keep track of the maximum
@@ -443,11 +440,11 @@ trap(statusReg, causeReg, vadr, pc, f)
rv = KERN_INVALID_ADDRESS;
}
if (rv == KERN_SUCCESS) {
- if (!USERMODE(statusReg))
- return (pc);
+ if (!USERMODE(trapframe->sr))
+ return (trapframe->pc);
goto out;
}
- if (!USERMODE(statusReg)) {
+ if (!USERMODE(trapframe->sr)) {
if ((i = ((struct pcb *)UADDR)->pcb_onfault) != 0) {
((struct pcb *)UADDR)->pcb_onfault = 0;
return (onfault_table[i]);
@@ -475,7 +472,7 @@ trap(statusReg, causeReg, vadr, pc, f)
case T_SYSCALL+T_USER:
{
- int *locr0 = p->p_md.md_regs;
+ struct trap_frame *locr0 = p->p_md.md_regs;
struct sysent *callp;
unsigned int code;
int numsys;
@@ -486,37 +483,37 @@ trap(statusReg, causeReg, vadr, pc, f)
cnt.v_syscall++;
/* compute next PC after syscall instruction */
- if ((int)causeReg < 0) { /* Check BD bit */
- locr0[PC] = MipsEmulateBranch(locr0, pc, 0, 0);
+ if ((int)trapframe->cause < 0) { /* Check BD bit */
+ locr0->pc = MipsEmulateBranch(locr0, trapframe->pc, 0, 0);
}
else {
- locr0[PC] += 4;
+ locr0->pc += 4;
}
callp = p->p_emul->e_sysent;
numsys = p->p_emul->e_nsysent;
- code = locr0[V0];
+ code = locr0->v0;
switch (code) {
case SYS_syscall:
/*
* Code is first argument, followed by actual args.
*/
- code = locr0[A0];
+ code = locr0->a0;
if (code >= numsys)
callp += p->p_emul->e_nosys; /* (illegal) */
else
callp += code;
i = callp->sy_argsize / sizeof(int);
- args.i[0] = locr0[A1];
- args.i[1] = locr0[A2];
- args.i[2] = locr0[A3];
+ args.i[0] = locr0->a1;
+ args.i[1] = locr0->a2;
+ args.i[2] = locr0->a3;
if (i > 3) {
- i = copyin((caddr_t)(locr0[SP] +
+ i = copyin((caddr_t)(locr0->sp +
4 * sizeof(int)),
(caddr_t)&args.i[3],
(u_int)(i - 3) * sizeof(int));
if (i) {
- locr0[V0] = i;
- locr0[A3] = 1;
+ locr0->v0 = i;
+ locr0->a3 = 1;
#ifdef SYSCALL_DEBUG
scdebug_call(p, code, args.i);
#endif
@@ -536,22 +533,27 @@ trap(statusReg, causeReg, vadr, pc, f)
* Like syscall, but code is a quad, so as to maintain
* quad alignment for the rest of the arguments.
*/
- code = locr0[A0 + _QUAD_LOWWORD];
+ if(_QUAD_LOWWORD == 0) {
+ code = locr0->a0;
+ }
+ else {
+ code = locr0->a1;
+ }
if (code >= numsys)
callp += p->p_emul->e_nosys; /* (illegal) */
else
callp += code;
i = callp->sy_argsize / sizeof(int);
- args.i[0] = locr0[A2];
- args.i[1] = locr0[A3];
+ args.i[0] = locr0->a2;
+ args.i[1] = locr0->a3;
if (i > 2) {
- i = copyin((caddr_t)(locr0[SP] +
+ i = copyin((caddr_t)(locr0->sp +
4 * sizeof(int)),
(caddr_t)&args.i[2],
(u_int)(i - 2) * sizeof(int));
if (i) {
- locr0[V0] = i;
- locr0[A3] = 1;
+ locr0->v0 = i;
+ locr0->a3 = 1;
#ifdef SYSCALL_DEBUG
scdebug_call(p, code, args.i);
#endif
@@ -572,18 +574,18 @@ trap(statusReg, causeReg, vadr, pc, f)
else
callp += code;
i = callp->sy_narg;
- args.i[0] = locr0[A0];
- args.i[1] = locr0[A1];
- args.i[2] = locr0[A2];
- args.i[3] = locr0[A3];
+ args.i[0] = locr0->a0;
+ args.i[1] = locr0->a1;
+ args.i[2] = locr0->a2;
+ args.i[3] = locr0->a3;
if (i > 4) {
- i = copyin((caddr_t)(locr0[SP] +
+ i = copyin((caddr_t)(locr0->sp +
4 * sizeof(int)),
(caddr_t)&args.i[4],
(u_int)(i - 4) * sizeof(int));
if (i) {
- locr0[V0] = i;
- locr0[A3] = 1;
+ locr0->v0 = i;
+ locr0->a3 = 1;
#ifdef SYSCALL_DEBUG
scdebug_call(p, code, args.i);
#endif
@@ -605,7 +607,7 @@ trap(statusReg, causeReg, vadr, pc, f)
ktrsyscall(p->p_tracep, code, callp->sy_argsize, args.i);
#endif
rval[0] = 0;
- rval[1] = locr0[V1];
+ rval[1] = locr0->v1;
#if defined(DDB) || defined(DEBUG)
if (trp == trapdebug)
trapdebug[TRAPSIZE - 1].code = code;
@@ -622,11 +624,11 @@ trap(statusReg, causeReg, vadr, pc, f)
#if defined(DDB) || defined(DEBUG)
{ int s;
s = splhigh();
- trp->status = statusReg;
- trp->cause = causeReg;
- trp->vadr = locr0[SP];
- trp->pc = locr0[PC];
- trp->ra = locr0[RA];
+ trp->status = trapframe->sr;
+ trp->cause = trapframe->cause;
+ trp->vadr = locr0->sp;
+ trp->pc = locr0->pc;
+ trp->ra = locr0->ra;
trp->code = -code;
if (++trp == &trapdebug[TRAPSIZE])
trp = trapdebug;
@@ -635,21 +637,21 @@ trap(statusReg, causeReg, vadr, pc, f)
#endif
switch (i) {
case 0:
- locr0[V0] = rval[0];
- locr0[V1] = rval[1];
- locr0[A3] = 0;
+ locr0->v0 = rval[0];
+ locr0->v1 = rval[1];
+ locr0->a3 = 0;
break;
case ERESTART:
- locr0[PC] = pc;
+ locr0->pc = trapframe->pc;
break;
case EJUSTRETURN:
break; /* nothing to do */
default:
- locr0[V0] = i;
- locr0[A3] = 1;
+ locr0->v0 = i;
+ locr0->a3 = 1;
}
if(code == SYS_ptrace)
R4K_FlushCache();
@@ -666,8 +668,8 @@ trap(statusReg, causeReg, vadr, pc, f)
#ifdef DDB
case T_BREAK:
- kdb_trap(type, &f);
- return(f.reg[PC]);
+ kdb_trap(type, trapframe);
+ return(trapframe->pc);
#endif
case T_BREAK+T_USER:
@@ -677,15 +679,15 @@ trap(statusReg, causeReg, vadr, pc, f)
struct iovec iov;
/* compute address of break instruction */
- va = pc;
- if ((int)causeReg < 0)
+ va = trapframe->pc;
+ if ((int)trapframe->cause < 0)
va += 4;
/* read break instruction */
instr = fuiword((caddr_t)va);
#if 0
printf("trap: %s (%d) breakpoint %x at %x: (adr %x ins %x)\n",
- p->p_comm, p->p_pid, instr, pc,
+ p->p_comm, p->p_pid, instr, trapframe->pc,
p->p_md.md_ss_addr, p->p_md.md_ss_instr); /* XXX */
#endif
if (p->p_md.md_ss_addr != va || instr != BREAK_SSTEP) {
@@ -725,14 +727,14 @@ trap(statusReg, causeReg, vadr, pc, f)
break;
case T_COP_UNUSABLE+T_USER:
- if ((causeReg & CR_COP_ERR) != 0x10000000) {
+ if ((trapframe->cause & CR_COP_ERR) != 0x10000000) {
i = SIGILL; /* only FPU instructions allowed */
typ = ILL_ILLOPC;
break;
}
MipsSwitchFPState(machFPCurProcPtr, p->p_md.md_regs);
machFPCurProcPtr = p;
- p->p_md.md_regs[PS] |= SR_COP_1_BIT;
+ p->p_md.md_regs->sr |= SR_COP_1_BIT;
p->p_md.md_flags |= MDP_FPUSED;
goto out;
@@ -741,12 +743,12 @@ trap(statusReg, causeReg, vadr, pc, f)
trapDump("fpintr");
#else
printf("FPU Trap: PC %x CR %x SR %x\n",
- pc, causeReg, statusReg);
+ trapframe->pc, trapframe->cause, trapframe->sr);
goto err;
#endif
case T_FPE+T_USER:
- MipsFPTrap(statusReg, causeReg, pc);
+ MipsFPTrap(trapframe->sr, trapframe->cause, trapframe->pc);
goto out;
case T_OVFLOW+T_USER:
@@ -766,15 +768,15 @@ trap(statusReg, causeReg, vadr, pc, f)
default:
err:
#ifdef DEBUG
- stacktrace(!USERMODE(statusReg) ? f.reg : p->p_md.md_regs);
+ stacktrace(!USERMODE(trapframe->sr) ? &f : p->p_md.md_regs);
trapDump("trap");
#endif
panic("trap");
}
- p->p_md.md_regs[PC] = pc;
- p->p_md.md_regs[CAUSE] = causeReg;
- p->p_md.md_regs[BADVADDR] = vadr;
- sv.sival_int = vadr;
+ p->p_md.md_regs->pc = trapframe->pc;
+ p->p_md.md_regs->cause = trapframe->cause;
+ p->p_md.md_regs->badvaddr = trapframe->badvaddr;
+ sv.sival_int = trapframe->badvaddr;
trapsignal(p, i, ucode, typ, sv);
out:
/*
@@ -811,11 +813,64 @@ out:
if (p->p_flag & P_PROFIL) {
extern int psratio;
- addupc_task(p, pc, (int)(p->p_sticks - sticks) * psratio);
+ addupc_task(p, trapframe->pc, (int)(p->p_sticks - sticks) * psratio);
}
curpriority = p->p_priority;
- return (pc);
+ return (trapframe->pc);
+}
+
+void
+child_return(p)
+ struct proc *p;
+{
+ struct trap_frame *trapframe;
+ int i;
+
+ trapframe = p->p_md.md_regs;
+ trapframe->v0 = 0;
+ trapframe->v1 = 1;
+ trapframe->a3 = 0;
+
+ /* take pending signals */
+ while ((i = CURSIG(p)) != 0)
+ postsig(i);
+ p->p_priority = p->p_usrpri;
+ astpending = 0;
+ if (want_resched) {
+ int s;
+
+ /*
+ * Since we are curproc, clock will normally just change
+ * our priority without moving us from one queue to another
+ * (since the running process is not on a queue.)
+ * If that happened after we put ourselves on the run queue
+ * but before we switched, we might not be on the queue
+ * indicated by our priority.
+ */
+ s = splstatclock();
+ setrunqueue(p);
+ p->p_stats->p_ru.ru_nivcsw++;
+ mi_switch();
+ splx(s);
+ while ((i = CURSIG(p)) != 0)
+ postsig(i);
+ }
+
+#if 0 /* Need sticks */
+ if (p->p_flag & P_PROFIL) {
+ extern int psratio;
+
+ addupc_task(p, trapframe->pc, (int)(p->p_sticks - sticks) * psratio);
+ }
+#endif
+
+ curpriority = p->p_priority;
+
+#ifdef KTRACE
+ if (KTRPOINT(p, KTR_SYSRET))
+ ktrsysret(p->p_tracep, SYS_fork, 0, 0);
+#endif
}
/*
@@ -823,50 +878,54 @@ out:
* Called from MipsKernIntr() or MipsUserIntr()
* Note: curproc might be NULL.
*/
+int iofvcount = 0;
+
void
-interrupt(statusReg, causeReg, what, pc, args)
- u_int statusReg; /* status register at time of the exception */
- u_int causeReg; /* cause register at time of exception */
- u_int what;
- u_int pc; /* program counter where to continue */
- u_int args;
+interrupt(trapframe)
+ struct trap_frame *trapframe;
{
unsigned mask;
+ unsigned cause;
int i;
struct clockframe cf;
cnt.v_trap++;
#if defined(DDB) || defined(DEBUG)
- trp->status = statusReg;
- trp->cause = causeReg;
+ trp->status = trapframe->sr;
+ trp->cause = trapframe->cause;
trp->vadr = 0;
- trp->pc = pc;
+ trp->pc = trapframe->pc;
trp->ra = 0;
- trp->sp = (int)&args;
+ trp->sp = (int)trapframe;
trp->code = 0;
if (++trp == &trapdebug[TRAPSIZE])
trp = trapdebug;
#endif
cnt.v_intr++;
- mask = causeReg & statusReg; /* pending interrupts & enable mask */
- cf.pc = pc;
- cf.sr = statusReg;
- cf.cr = causeReg;
-
+ mask = trapframe->cause & trapframe->sr; /* pending interrupts & enable mask */
+ cf.pc = trapframe->pc;
+ cf.sr = trapframe->sr;
+ cf.cr = trapframe->cause;
+
+if(iofvcount++ > 100) {
+trapDump("int overflow");
+Debugger();
+}
/*
* Check off all enabled interrupts. Called interrupt routine
* returns mask of interrupts to reenable.
*/
+ cause = trapframe->cause;
for(i = 0; i < 8; i++) {
if(cpu_int_tab[i].int_mask & mask) {
- causeReg &= (*cpu_int_tab[i].int_hand)(mask, &cf);
+ cause &= (*cpu_int_tab[i].int_hand)(mask, &cf);
}
}
/*
* Reenable all non served hardware levels.
*/
- splx((statusReg & ~causeReg & HARD_INT_MASK) | SR_INT_ENAB);
+ splx((trapframe->sr & ~cause & HARD_INT_MASK) | SR_INT_ENAB);
if (mask & SOFT_INT_MASK_0) {
@@ -878,7 +937,7 @@ interrupt(statusReg, causeReg, what, pc, args)
* Process network interrupt if we trapped or will very soon
*/
if ((mask & SOFT_INT_MASK_1) ||
- (netisr && (statusReg & SOFT_INT_MASK_1))) {
+ (netisr && (trapframe->sr & SOFT_INT_MASK_1))) {
clearsoftnet();
cnt.v_soft++;
intrcnt[1]++;
@@ -972,9 +1031,8 @@ set_intr(mask, int_hand, prio)
* This is very similar to the tail of trap().
*/
void
-softintr(statusReg, pc)
+softintr(statusReg)
unsigned statusReg; /* status register at time of the exception */
- unsigned pc; /* program counter where to continue */
{
struct proc *p = curproc;
int sig;
@@ -1078,8 +1136,8 @@ arc_errintr()
* Return the resulting PC as if the branch was executed.
*/
unsigned
-MipsEmulateBranch(regsPtr, instPC, fpcCSR, instptr)
- int *regsPtr;
+MipsEmulateBranch(framePtr, instPC, fpcCSR, instptr)
+ struct trap_frame *framePtr;
int instPC;
int fpcCSR;
u_int instptr;
@@ -1087,6 +1145,7 @@ MipsEmulateBranch(regsPtr, instPC, fpcCSR, instptr)
InstFmt inst;
unsigned retAddr;
int condition;
+ register_t *regsPtr = (register_t *)framePtr;
#define GetBranchDest(InstPtr, inst) \
((unsigned)InstPtr + 4 + ((short)inst.IType.imm << 2))
@@ -1216,7 +1275,7 @@ cpu_singlestep(p)
struct proc *p;
{
unsigned va;
- int *locr0 = p->p_md.md_regs;
+ struct trap_frame *locr0 = p->p_md.md_regs;
int i;
int bpinstr = BREAK_SSTEP;
int curinstr;
@@ -1230,7 +1289,7 @@ cpu_singlestep(p)
iov.iov_len = sizeof(int);
uio.uio_iov = &iov;
uio.uio_iovcnt = 1;
- uio.uio_offset = (off_t)locr0[PC];
+ uio.uio_offset = (off_t)locr0->pc;
uio.uio_resid = sizeof(int);
uio.uio_segflg = UIO_SYSSPACE;
uio.uio_rw = UIO_READ;
@@ -1239,10 +1298,10 @@ cpu_singlestep(p)
/* compute next address after current location */
if(curinstr != 0) {
- va = MipsEmulateBranch(locr0, locr0[PC], locr0[FSR], curinstr);
+ va = MipsEmulateBranch(locr0, locr0->pc, locr0->fsr, curinstr);
}
else {
- va = locr0[PC] + 4;
+ va = locr0->pc + 4;
}
if (p->p_md.md_ss_addr) {
printf("SS %s (%d): breakpoint already set at %x (va %x)\n",
@@ -1294,28 +1353,28 @@ cpu_singlestep(p)
/* forward */
char *fn_name(unsigned addr);
-void stacktrace_subr __P((int *, int (*)(const char*, ...)));
+void stacktrace_subr __P((struct trap_frame *, int (*)(const char*, ...)));
/*
* Print a stack backtrace.
*/
void
stacktrace(regs)
- int *regs;
+ struct trap_frame *regs;
{
stacktrace_subr(regs, printf);
}
void
logstacktrace(regs)
- int *regs;
+ struct trap_frame *regs;
{
stacktrace_subr(regs, addlog);
}
void
stacktrace_subr(regs, printfn)
- int *regs;
+ struct trap_frame *regs;
int (*printfn) __P((const char*, ...));
{
unsigned pc, sp, fp, ra, va, subr;
@@ -1327,14 +1386,14 @@ stacktrace_subr(regs, printfn)
unsigned int frames = 0;
/* get initial values from the exception frame */
- sp = regs[SP];
- pc = regs[PC];
- fp = regs[S8];
- ra = regs[RA]; /* May be a 'leaf' function */
- a0 = regs[A0];
- a1 = regs[A1];
- a2 = regs[A2];
- a3 = regs[A3];
+ sp = regs->sp;
+ pc = regs->pc;
+ fp = regs->s8;
+ ra = regs->ra; /* May be a 'leaf' function */
+ a0 = regs->a0;
+ a1 = regs->a1;
+ a2 = regs->a2;
+ a3 = regs->a3;
/* Jump here when done with a frame, to start a new one */
loop:
@@ -1361,15 +1420,15 @@ specialframe:
if (pc >= (unsigned)MipsKernIntr && pc < (unsigned)MipsUserIntr) {
(*printfn)("MipsKernIntr+%x: (%x, %x ,%x) -------\n",
pc-(unsigned)MipsKernIntr, a0, a1, a2);
- regs = (int *)(sp + STAND_ARG_SIZE);
- a0 = kdbpeek(&regs[A0]);
- a1 = kdbpeek(&regs[A1]);
- a2 = kdbpeek(&regs[A2]);
- a3 = kdbpeek(&regs[A3]);
-
- pc = kdbpeek(&regs[PC]); /* exc_pc - pc at time of exception */
- ra = kdbpeek(&regs[RA]); /* ra at time of exception */
- sp = kdbpeek(&regs[SP]);
+ regs = (struct trap_frame *)(sp + STAND_ARG_SIZE);
+ a0 = kdbpeek(&regs->a0);
+ a1 = kdbpeek(&regs->a1);
+ a2 = kdbpeek(&regs->a2);
+ a3 = kdbpeek(&regs->a3);
+
+ pc = kdbpeek(&regs->pc); /* exc_pc - pc at time of exception */
+ ra = kdbpeek(&regs->ra); /* ra at time of exception */
+ sp = kdbpeek(&regs->sp);
goto specialframe;
}