switch i386 to use the MI i8253 header file and remove the now obsolete MD

timerreg.h

ok miod@

6 files changed, 27 insertions, 124 deletions

diff --git a/sys/arch/i386/i386/lapic.c b/sys/arch/i386/i386/lapic.c
index 42378c42f57..b4023c3f624 100644
--- a/sys/arch/i386/i386/lapic.c
+++ b/sys/arch/i386/i386/lapic.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lapic.c,v 1.16 2007/05/25 15:55:26 art Exp $	*/
+/*	$OpenBSD: lapic.c,v 1.17 2007/08/01 13:18:18 martin Exp $	*/
 /* $NetBSD: lapic.c,v 1.1.2.8 2000/02/23 06:10:50 sommerfeld Exp $ */
 
 /*-
@@ -63,7 +63,7 @@
 #include <machine/i82489var.h>
 #include <machine/pctr.h>
 
-#include <i386/isa/timerreg.h>	/* XXX for TIMER_FREQ */
+#include <dev/ic/i8253reg.h>
 
 struct evcount clk_count;
 struct evcount ipi_count;
diff --git a/sys/arch/i386/isa/clock.c b/sys/arch/i386/isa/clock.c
index f3b34498b3a..7339672c28c 100644
--- a/sys/arch/i386/isa/clock.c
+++ b/sys/arch/i386/isa/clock.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: clock.c,v 1.39 2007/03/19 09:29:33 art Exp $	*/
+/*	$OpenBSD: clock.c,v 1.40 2007/08/01 13:18:18 martin Exp $	*/
 /*	$NetBSD: clock.c,v 1.39 1996/05/12 23:11:54 mycroft Exp $	*/
 
 /*-
@@ -103,8 +103,8 @@ WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 #include <dev/isa/isareg.h>
 #include <dev/isa/isavar.h>
 #include <dev/ic/mc146818reg.h>
+#include <dev/ic/i8253reg.h>
 #include <i386/isa/nvram.h>
-#include <i386/isa/timerreg.h>
 
 void	spinwait(int);
 int	clockintr(void *);
@@ -205,7 +205,7 @@ initrtclock(void)
 	mtx_enter(&timer_mutex);
 
 	/* initialize 8253 clock */
-	outb(TIMER_MODE, TIMER_SEL0|TIMER_RATEGEN|TIMER_16BIT);
+	outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0|TIMER_RATEGEN|TIMER_16BIT);
 
 	/* Correct rounding will buy us a better precision in timekeeping */
 	outb(IO_TIMER1, TIMER_DIV(hz) % 256);
@@ -266,12 +266,12 @@ gettick(void)
 
 		disable_intr();
 
-		v1 = inb(TIMER_CNTR0);
-		v1 |= inb(TIMER_CNTR0) << 8;
-		v2 = inb(TIMER_CNTR0);
-		v2 |= inb(TIMER_CNTR0) << 8;
-		v3 = inb(TIMER_CNTR0);
-		v3 |= inb(TIMER_CNTR0) << 8;
+		v1 = inb(IO_TIMER1 + TIMER_CNTR0);
+		v1 |= inb(IO_TIMER1 + TIMER_CNTR0) << 8;
+		v2 = inb(IO_TIMER1 + TIMER_CNTR0);
+		v2 |= inb(IO_TIMER1 + TIMER_CNTR0) << 8;
+		v3 = inb(IO_TIMER1 + TIMER_CNTR0);
+		v3 |= inb(IO_TIMER1 + TIMER_CNTR0) << 8;
 
 		enable_intr();
 
@@ -316,9 +316,9 @@ gettick(void)
 		ef = read_eflags();
 		disable_intr();
 		/* Select counter 0 and latch it. */
-		outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
-		lo = inb(TIMER_CNTR0);
-		hi = inb(TIMER_CNTR0);
+		outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
+		lo = inb(IO_TIMER1 + TIMER_CNTR0);
+		hi = inb(IO_TIMER1 + TIMER_CNTR0);
 
 		write_eflags(ef);
 		mtx_leave(&timer_mutex);
@@ -702,7 +702,7 @@ i8254_inittimecounter_simple(void)
 	i8254_timecounter.tc_frequency = TIMER_FREQ;
 
 	mtx_enter(&timer_mutex);
-	outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
+	outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
 	outb(IO_TIMER1, tval & 0xff);
 	outb(IO_TIMER1, tval >> 8);
 
@@ -728,9 +728,9 @@ i8254_get_timecount(struct timecounter *tc)
 	ef = read_eflags();
 	disable_intr();
 
-	outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
-	lo = inb(TIMER_CNTR0);
-	hi = inb(TIMER_CNTR0);
+	outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
+	lo = inb(IO_TIMER1 + TIMER_CNTR0);
+	hi = inb(IO_TIMER1 + TIMER_CNTR0);
 
 	count = rtclock_tval - ((hi << 8) | lo);
 
diff --git a/sys/arch/i386/isa/joy.c b/sys/arch/i386/isa/joy.c
index f3c888bb842..cd1f8b97911 100644
--- a/sys/arch/i386/isa/joy.c
+++ b/sys/arch/i386/isa/joy.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: joy.c,v 1.12 2006/09/19 11:06:34 jsg Exp $	*/
+/*	$OpenBSD: joy.c,v 1.13 2007/08/01 13:18:18 martin Exp $	*/
 /*	$NetBSD: joy.c,v 1.3 1996/05/05 19:46:15 christos Exp $	*/
 
 /*-
@@ -46,7 +46,7 @@
 
 #include <dev/isa/isavar.h>
 #include <dev/isa/isareg.h>
-#include <i386/isa/timerreg.h>
+#include <dev/ic/i8253reg.h>
 #include <i386/isa/joyreg.h>
 
 static int	joy_get_tick(void);
@@ -167,9 +167,9 @@ joy_get_tick(void)
 {
 	int low, high;
 
-	outb(TIMER_MODE, TIMER_SEL0);
-	low = inb(TIMER_CNTR0);
-	high = inb(TIMER_CNTR0);
+	outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0);
+	low = inb(IO_TIMER1 + TIMER_CNTR0);
+	high = inb(IO_TIMER1 + TIMER_CNTR0);
 
 	return (high << 8) | low;
 }
diff --git a/sys/arch/i386/isa/joy_isa.c b/sys/arch/i386/isa/joy_isa.c
index a53753a0657..9b8d8df5fd1 100644
--- a/sys/arch/i386/isa/joy_isa.c
+++ b/sys/arch/i386/isa/joy_isa.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: joy_isa.c,v 1.6 2006/09/19 11:06:34 jsg Exp $	*/
+/*	$OpenBSD: joy_isa.c,v 1.7 2007/08/01 13:18:18 martin Exp $	*/
 /*	$NetBSD: joy.c,v 1.3 1996/05/05 19:46:15 christos Exp $	*/
 
 /*-
@@ -46,7 +46,7 @@
 
 #include <dev/isa/isavar.h>
 #include <dev/isa/isareg.h>
-#include <i386/isa/timerreg.h>
+#include <dev/ic/i8253reg.h>
 #include <i386/isa/joyreg.h>
 
 int		joy_isa_probe(struct device *, void *, void *);
diff --git a/sys/arch/i386/isa/joy_isapnp.c b/sys/arch/i386/isa/joy_isapnp.c
index 92264399349..05882575ee0 100644
--- a/sys/arch/i386/isa/joy_isapnp.c
+++ b/sys/arch/i386/isa/joy_isapnp.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: joy_isapnp.c,v 1.6 2006/09/19 11:06:34 jsg Exp $	*/
+/*	$OpenBSD: joy_isapnp.c,v 1.7 2007/08/01 13:18:18 martin Exp $	*/
 /*	$NetBSD: joy.c,v 1.3 1996/05/05 19:46:15 christos Exp $	*/
 
 /*-
@@ -46,7 +46,7 @@
 
 #include <dev/isa/isavar.h>
 #include <dev/isa/isareg.h>
-#include <i386/isa/timerreg.h>
+#include <dev/ic/i8253reg.h>
 #include <i386/isa/joyreg.h>
 
 int		joy_isapnp_probe(struct device *, void *, void *);
diff --git a/sys/arch/i386/isa/timerreg.h b/sys/arch/i386/isa/timerreg.h
deleted file mode 100644
index 7b69e66884e..00000000000
--- a/sys/arch/i386/isa/timerreg.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/*	$OpenBSD: timerreg.h,v 1.3 2003/06/02 23:27:47 millert Exp $	*/
-/*	$NetBSD: timerreg.h,v 1.4 1994/10/27 04:18:17 cgd Exp $	*/
-
-/*-
- * Copyright (c) 1993 The Regents of the University of California.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-/*
- * Register definitions for the Intel 8253 Programmable Interval Timer.
- *
- * This chip has three independent 16-bit down counters that can be
- * read on the fly.  There are three mode registers and three countdown
- * registers.  The countdown registers are addressed directly, via the
- * first three I/O ports.  The three mode registers are accessed via
- * the fourth I/O port, with two bits in the mode byte indicating the
- * register.  (Why are hardware interfaces always so braindead?).
- *
- * To write a value into the countdown register, the mode register
- * is first programmed with a command indicating the which byte of
- * the two byte register is to be modified.  The three possibilities
- * are load msb (TMR_MR_MSB), load lsb (TMR_MR_LSB), or load lsb then
- * msb (TMR_MR_BOTH).
- *
- * To read the current value ("on the fly") from the countdown register,
- * you write a "latch" command into the mode register, then read the stable
- * value from the corresponding I/O port.  For example, you write
- * TMR_MR_LATCH into the corresponding mode register.  Presumably,
- * after doing this, a write operation to the I/O port would result
- * in undefined behavior (but hopefully not fry the chip).
- * Reading in this manner has no side effects.
- *
- * The outputs of the three timers are connected as follows:
- *
- *	 timer 0 -> irq 0
- *	 timer 1 -> dma chan 0 (for dram refresh)
- * 	 timer 2 -> speaker (via keyboard controller)
- *
- * Timer 0 is used to call hardclock.
- * Timer 2 is used to generate console beeps.
- */
-
-/*
- * Frequency of all three count-down timers; (TIMER_FREQ/freq) is the
- * appropriate count to generate a frequency of freq hz.
- */
-#ifndef TIMER_FREQ
-#define	TIMER_FREQ	1193182
-#endif
-#define TIMER_DIV(x) ((TIMER_FREQ+(x)/2)/(x))
-
-/*
- * Macros for specifying values to be written into a mode register.
- */
-#define	TIMER_CNTR0	(IO_TIMER1 + 0)	/* timer 0 counter port */
-#define	TIMER_CNTR1	(IO_TIMER1 + 1)	/* timer 1 counter port */
-#define	TIMER_CNTR2	(IO_TIMER1 + 2)	/* timer 2 counter port */
-#define	TIMER_MODE	(IO_TIMER1 + 3)	/* timer mode port */
-#define		TIMER_SEL0	0x00	/* select counter 0 */
-#define		TIMER_SEL1	0x40	/* select counter 1 */
-#define		TIMER_SEL2	0x80	/* select counter 2 */
-#define		TIMER_INTTC	0x00	/* mode 0, intr on terminal cnt */
-#define		TIMER_ONESHOT	0x02	/* mode 1, one shot */
-#define		TIMER_RATEGEN	0x04	/* mode 2, rate generator */
-#define		TIMER_SQWAVE	0x06	/* mode 3, square wave */
-#define		TIMER_SWSTROBE	0x08	/* mode 4, s/w triggered strobe */
-#define		TIMER_HWSTROBE	0x0a	/* mode 5, h/w triggered strobe */
-#define		TIMER_LATCH	0x00	/* latch counter for reading */
-#define		TIMER_LSB	0x10	/* r/w counter LSB */
-#define		TIMER_MSB	0x20	/* r/w counter MSB */
-#define		TIMER_16BIT	0x30	/* r/w counter 16 bits, LSB first */
-#define		TIMER_BCD	0x01	/* count in BCD */
-