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authorPatrick Wildt <patrick@cvs.openbsd.org>2018-03-30 20:10:01 +0000
committerPatrick Wildt <patrick@cvs.openbsd.org>2018-03-30 20:10:01 +0000
commit74fb7f42b1c7cf0258572e7141ef22fb34ea77fa (patch)
tree171a57841d98fb173362a5366e1417e5390196e8
parent600b81f6ea05dbfc440e0856ac26b2f03119eac0 (diff)
Remove unused PCIe code from imxiomuxc(4). I'm sure we can do this
better now with the FDT framework when we actually tackle PCIe.
-rw-r--r--sys/arch/armv7/imx/imxiomuxc.c70
-rw-r--r--sys/arch/armv7/imx/imxiomuxcvar.h5
2 files changed, 2 insertions, 73 deletions
diff --git a/sys/arch/armv7/imx/imxiomuxc.c b/sys/arch/armv7/imx/imxiomuxc.c
index 03adb6e3a47..0842f16418e 100644
--- a/sys/arch/armv7/imx/imxiomuxc.c
+++ b/sys/arch/armv7/imx/imxiomuxc.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: imxiomuxc.c,v 1.8 2016/09/18 18:16:00 kettenis Exp $ */
+/* $OpenBSD: imxiomuxc.c,v 1.9 2018/03/30 20:10:00 patrick Exp $ */
/*
* Copyright (c) 2013 Patrick Wildt <patrick@blueri.se>
* Copyright (c) 2016 Mark Kettenis <kettenis@openbsd.org>
@@ -36,30 +36,9 @@
#include <dev/ofw/fdt.h>
/* registers */
-#define IOMUXC_GPR1 0x004
-#define IOMUXC_GPR8 0x020
-#define IOMUXC_GPR12 0x030
#define IOMUXC_GPR13 0x034
/* bits and bytes */
-#define IOMUXC_GPR1_REF_SSP_EN (1 << 16)
-#define IOMUXC_GPR1_TEST_POWERDOWN (1 << 18)
-
-#define IOMUXC_GPR8_PCS_TX_DEEMPH_GEN1 (0 << 0)
-#define IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_3P5DB (0 << 6)
-#define IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_6DB (20 << 12)
-#define IOMUXC_GPR8_PCS_TX_SWING_FULL (127 << 18)
-#define IOMUXC_GPR8_PCS_TX_SWING_LOW (127 << 25)
-
-#define IOMUXC_GPR12_LOS_LEVEL_MASK (0x1f << 4)
-#define IOMUXC_GPR12_LOS_LEVEL_9 (9 << 4)
-#define IOMUXC_GPR12_APPS_PM_XMT_PME (1 << 9)
-#define IOMUXC_GPR12_APPS_LTSSM_ENABLE (1 << 10)
-#define IOMUXC_GPR12_APPS_INIT_RST (1 << 11)
-#define IOMUXC_GPR12_DEVICE_TYPE_RC (2 << 12)
-#define IOMUXC_GPR12_DEVICE_TYPE_MASK (3 << 12)
-#define IOMUXC_GPR12_APPS_PM_XMT_TURNOFF (1 << 16)
-
#define IOMUXC_GPR13_SATA_PHY_1_FAST_EDGE_RATE (0x00 << 0)
#define IOMUXC_GPR13_SATA_PHY_1_SLOW_EDGE_RATE (0x02 << 0)
#define IOMUXC_GPR13_SATA_PHY_1_EDGE_RATE_MASK 0x3
@@ -248,50 +227,3 @@ imxiomuxc_enable_sata(void)
(bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR13) & ~IOMUXC_GPR13_SATA_PHY_1_SLOW_EDGE_RATE) |
IOMUXC_GPR13_SATA_PHY_1_SLOW_EDGE_RATE);
}
-
-void
-imxiomuxc_enable_pcie(void)
-{
- struct imxiomuxc_softc *sc = imxiomuxc_sc;
-
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR12,
- bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR12) & ~IOMUXC_GPR12_APPS_LTSSM_ENABLE);
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR12,
- (bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR12) & ~IOMUXC_GPR12_DEVICE_TYPE_MASK) |
- IOMUXC_GPR12_DEVICE_TYPE_RC);
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR12,
- (bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR12) & ~IOMUXC_GPR12_LOS_LEVEL_MASK) |
- IOMUXC_GPR12_LOS_LEVEL_9);
-
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR8,
- bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR8) |
- IOMUXC_GPR8_PCS_TX_DEEMPH_GEN1 | IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_3P5DB |
- IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_6DB | IOMUXC_GPR8_PCS_TX_SWING_FULL |
- IOMUXC_GPR8_PCS_TX_SWING_LOW);
-}
-
-void
-imxiomuxc_pcie_refclk(int enable)
-{
- struct imxiomuxc_softc *sc = imxiomuxc_sc;
-
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR1,
- bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR1) & ~IOMUXC_GPR1_REF_SSP_EN);
-
- if (enable)
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR1,
- bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR1) | IOMUXC_GPR1_REF_SSP_EN);
-}
-
-void
-imxiomuxc_pcie_test_powerdown(int enable)
-{
- struct imxiomuxc_softc *sc = imxiomuxc_sc;
-
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR1,
- bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR1) & ~IOMUXC_GPR1_TEST_POWERDOWN);
-
- if (enable)
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR1,
- bus_space_read_4(sc->sc_iot, sc->sc_ioh, IOMUXC_GPR1) | IOMUXC_GPR1_TEST_POWERDOWN);
-}
diff --git a/sys/arch/armv7/imx/imxiomuxcvar.h b/sys/arch/armv7/imx/imxiomuxcvar.h
index 321dd8eff90..6c6bcbeda0e 100644
--- a/sys/arch/armv7/imx/imxiomuxcvar.h
+++ b/sys/arch/armv7/imx/imxiomuxcvar.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: imxiomuxcvar.h,v 1.3 2016/08/06 17:18:38 kettenis Exp $ */
+/* $OpenBSD: imxiomuxcvar.h,v 1.4 2018/03/30 20:10:00 patrick Exp $ */
/*
* Copyright (c) 2013 Patrick Wildt <patrick@blueri.se>
*
@@ -19,8 +19,5 @@
#define IMXIOMUXCVAR_H
void imxiomuxc_enable_sata(void);
-void imxiomuxc_enable_pcie(void);
-void imxiomuxc_pcie_refclk(int);
-void imxiomuxc_pcie_test_powerdown(int);
#endif /* IMXIOMUXCVAR_H */