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authorGordon Willem Klok <gwk@cvs.openbsd.org>2006-10-08 03:51:51 +0000
committerGordon Willem Klok <gwk@cvs.openbsd.org>2006-10-08 03:51:51 +0000
commit7bfd7b85bad8ad421eaf572aeeb74522b0ff03ae (patch)
treea8e8af1a1d89f4083d2972ef492e53b30e6ee38b
parente42fa795ce115f5acc5b860332beeaa118b33b9a (diff)
Execute the Enforce in-order Execution of I/O (eieio) instruction in
mc_dmaintr, its a little bit of voodoo, I dont understand why its necessary for mace versus the near identical dma isr in if_bm.c, but the system no longer panics under network load.
-rw-r--r--sys/arch/macppc/dev/if_mc.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/sys/arch/macppc/dev/if_mc.c b/sys/arch/macppc/dev/if_mc.c
index 3eb5ae81f82..a82060e4aad 100644
--- a/sys/arch/macppc/dev/if_mc.c
+++ b/sys/arch/macppc/dev/if_mc.c
@@ -1047,8 +1047,10 @@ mc_dmaintr(void *arg)
/* continue; */
goto next;
}
- DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0);
-
+ DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0);
+ /* XXX: Why? */
+ __asm volatile("eieio");
+
offset = i * MACE_BUFLEN;
statoff = offset + datalen;
sc->sc_rxframe.rx_rcvcnt = sc->sc_rxbuf[statoff + 0];
@@ -1062,6 +1064,9 @@ mc_dmaintr(void *arg)
next:
DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS,
DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
+ /* XXX: Why? */
+ __asm volatile("eieio");
+
cmd->d_status = 0;
cmd->d_resid = 0;
sc->sc_tail = i + 1;