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authorMark Kettenis <kettenis@cvs.openbsd.org>2016-05-06 20:24:36 +0000
committerMark Kettenis <kettenis@cvs.openbsd.org>2016-05-06 20:24:36 +0000
commit7e0b61f65cf01c596230b1bb3374a41352008ef7 (patch)
tree4597aa9b9234be41091e8d57f981eb944c223140
parent583eff0d81572772b900e407c162ad0248ed25b2 (diff)
Reset the bus width back to 1-bit when resetting the host. Makes imxesdhc(4)
work on the cubox-i, whereu-boot leaves the controller in 4-bit mode.
-rw-r--r--sys/arch/armv7/imx/imxesdhc.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/sys/arch/armv7/imx/imxesdhc.c b/sys/arch/armv7/imx/imxesdhc.c
index 43119ef05e0..605946a6776 100644
--- a/sys/arch/armv7/imx/imxesdhc.c
+++ b/sys/arch/armv7/imx/imxesdhc.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: imxesdhc.c,v 1.15 2016/05/05 11:01:08 kettenis Exp $ */
+/* $OpenBSD: imxesdhc.c,v 1.16 2016/05/06 20:24:35 kettenis Exp $ */
/*
* Copyright (c) 2009 Dale Rahn <drahn@openbsd.org>
* Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
@@ -124,6 +124,9 @@
#define SDHC_MIX_CTRL_AC12EN (1 << 2)
#define SDHC_MIX_CTRL_DTDSEL (1 << 4)
#define SDHC_MIX_CTRL_MSBSEL (1 << 5)
+#define SDHC_PROT_CTRL_DTW_MASK (0x3 << 1)
+#define SDHC_PROT_CTRL_DTW_4BIT (1 << 1)
+#define SDHC_PROT_CTRL_DTW_8BIT (1 << 2)
#define SDHC_PROT_CTRL_DMASEL_SDMA_MASK (0x3 << 8)
#define SDHC_HOST_CTRL_CAP_MBL_SHIFT 16
#define SDHC_HOST_CTRL_CAP_MBL_MASK 0x7
@@ -410,6 +413,9 @@ imxesdhc_host_reset(sdmmc_chipset_handle_t sch)
HWRITE4(sc, SDHC_PROT_CTRL,
HREAD4(sc, SDHC_PROT_CTRL) & ~SDHC_PROT_CTRL_DMASEL_SDMA_MASK);
+ /* Switch back to 1-bit bus. */
+ HCLR4(sc, SDHC_PROT_CTRL, SDHC_PROT_CTRL_DTW_MASK);
+
splx(s);
return 0;
}