summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorScott Soule Cheloha <cheloha@cvs.openbsd.org>2022-11-01 01:01:15 +0000
committerScott Soule Cheloha <cheloha@cvs.openbsd.org>2022-11-01 01:01:15 +0000
commit7ec3cd65d57cf3c8b6790f969fa57343c70d1956 (patch)
treef8cf878a7ba76c719d9a07580f1167cafab4ba9f
parent336fbb3f5193fd9399a6ec38dea8fbc4d7865624 (diff)
vmm(4): vcpu_reset_regs_svm: allow reads of MSR_HWCR, MSR_PSTATEDEF(0)
Guests may need these MSRs to determine the TSC frequency on AMD families 17h and 19h. GP fault reported by weerd@, observed on "AMD EPYC 3201 8-Core Processor" (17-01-02). Same issue observed by Jesper Wallin on "AMD Ryzen PRO 3700U". Tested by Jesper Wallin. Link: https://marc.info/?l=openbsd-bugs&m=166721628323483&w=2 ok mlarkin@
-rw-r--r--sys/arch/amd64/amd64/vmm.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/sys/arch/amd64/amd64/vmm.c b/sys/arch/amd64/amd64/vmm.c
index 51378f4a798..ee06cb01451 100644
--- a/sys/arch/amd64/amd64/vmm.c
+++ b/sys/arch/amd64/amd64/vmm.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: vmm.c,v 1.323 2022/09/07 18:44:09 dv Exp $ */
+/* $OpenBSD: vmm.c,v 1.324 2022/11/01 01:01:14 cheloha Exp $ */
/*
* Copyright (c) 2014 Mike Larkin <mlarkin@openbsd.org>
*
@@ -2705,6 +2705,10 @@ vcpu_reset_regs_svm(struct vcpu *vcpu, struct vcpu_reg_state *vrs)
/* allow reading TSC */
svm_setmsrbr(vcpu, MSR_TSC);
+ /* allow reading HWCR and PSTATEDEF to determine TSC frequency */
+ svm_setmsrbr(vcpu, MSR_HWCR);
+ svm_setmsrbr(vcpu, MSR_PSTATEDEF(0));
+
/* Guest VCPU ASID */
if (vmm_alloc_vpid(&asid)) {
DPRINTF("%s: could not allocate asid\n", __func__);