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authorReyk Floeter <reyk@cvs.openbsd.org>2005-05-28 23:45:11 +0000
committerReyk Floeter <reyk@cvs.openbsd.org>2005-05-28 23:45:11 +0000
commit81b4a198df5976735878ceb688db5269ca94415e (patch)
tree1c57aa2fc3fb06d6968508c4606b21b2aaf50edd
parent53811f7d4cdf7d2ae3a235f72f7e5ecb2515a91a (diff)
fix hostap mode
-rw-r--r--sys/dev/ic/ar5211.c12
-rw-r--r--sys/dev/ic/ar5212.c28
-rw-r--r--sys/dev/ic/ar5xxx.c4
-rw-r--r--sys/dev/ic/ath.c12
-rw-r--r--sys/dev/ic/athvar.h8
5 files changed, 34 insertions, 30 deletions
diff --git a/sys/dev/ic/ar5211.c b/sys/dev/ic/ar5211.c
index 18e098dcd00..649c60487bb 100644
--- a/sys/dev/ic/ar5211.c
+++ b/sys/dev/ic/ar5211.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ar5211.c,v 1.16 2005/05/27 11:42:52 reyk Exp $ */
+/* $OpenBSD: ar5211.c,v 1.17 2005/05/28 23:45:09 reyk Exp $ */
/*
* Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -1081,8 +1081,6 @@ ar5k_ar5211_stop_tx_dma(hal, queue)
struct ath_hal *hal;
u_int queue;
{
- HAL_BOOL ret;
-
AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
/*
@@ -1090,7 +1088,7 @@ ar5k_ar5211_stop_tx_dma(hal, queue)
*/
AR5K_REG_WRITE_Q(AR5K_AR5211_QCU_TXD, queue);
- ret = ar5k_register_timeout(hal, AR5K_AR5211_QCU_STS(queue),
+ ar5k_register_timeout(hal, AR5K_AR5211_QCU_STS(queue),
AR5K_AR5211_QCU_STS_FRMPENDCNT, 0, AH_FALSE);
if (AR5K_REG_READ_Q(AR5K_AR5211_QCU_TXE, queue))
@@ -2457,12 +2455,6 @@ ar5k_ar5211_set_intr(hal, new_mask)
AR5K_AR5211_SIMR2_DPERR);
}
- if (hal->ah_op_mode & HAL_M_HOSTAP) {
- int_mask |= AR5K_AR5211_PIMR_MIB;
- } else {
- int_mask &= ~AR5K_AR5211_PIMR_MIB;
- }
-
AR5K_REG_WRITE(AR5K_AR5211_PIMR, int_mask);
/* Store new interrupt mask */
diff --git a/sys/dev/ic/ar5212.c b/sys/dev/ic/ar5212.c
index dcf781b110e..611a363f3d5 100644
--- a/sys/dev/ic/ar5212.c
+++ b/sys/dev/ic/ar5212.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ar5212.c,v 1.20 2005/05/27 11:42:52 reyk Exp $ */
+/* $OpenBSD: ar5212.c,v 1.21 2005/05/28 23:45:09 reyk Exp $ */
/*
* Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -1223,8 +1223,6 @@ ar5k_ar5212_stop_tx_dma(hal, queue)
struct ath_hal *hal;
u_int queue;
{
- HAL_BOOL ret;
-
AR5K_ASSERT_ENTRY(queue, hal->ah_capabilities.cap_queues.q_tx_num);
/*
@@ -1232,10 +1230,8 @@ ar5k_ar5212_stop_tx_dma(hal, queue)
*/
AR5K_REG_WRITE_Q(AR5K_AR5212_QCU_TXD, queue);
- if (queue <= HAL_TX_QUEUE_ID_DATA_MAX)
- ret = ar5k_register_timeout(hal,
- AR5K_AR5212_QCU_STS(queue), AR5K_AR5212_QCU_STS_FRMPENDCNT,
- 0, AH_FALSE);
+ ar5k_register_timeout(hal, AR5K_AR5212_QCU_STS(queue),
+ AR5K_AR5212_QCU_STS_FRMPENDCNT, 0, AH_FALSE);
/* Clear register */
AR5K_REG_WRITE(AR5K_AR5212_QCU_TXD, 0);
@@ -1243,7 +1239,7 @@ ar5k_ar5212_stop_tx_dma(hal, queue)
if (AR5K_REG_READ_Q(AR5K_AR5212_QCU_TXE, queue))
return (AH_FALSE);
- return (ret);
+ return (AH_TRUE);
}
HAL_BOOL
@@ -2146,11 +2142,18 @@ ar5k_ar5212_update_mib_counters(hal, statistics)
struct ath_hal *hal;
HAL_MIB_STATS *statistics;
{
+ /* Read-And-Clear */
statistics->ackrcv_bad += AR5K_REG_READ(AR5K_AR5212_ACK_FAIL);
statistics->rts_bad += AR5K_REG_READ(AR5K_AR5212_RTS_FAIL);
statistics->rts_good += AR5K_REG_READ(AR5K_AR5212_RTS_OK);
statistics->fcs_bad += AR5K_REG_READ(AR5K_AR5212_FCS_FAIL);
statistics->beacons += AR5K_REG_READ(AR5K_AR5212_BEACON_CNT);
+
+ /* Reset profile count registers */
+ AR5K_REG_WRITE(AR5K_AR5212_PROFCNT_TX, 0);
+ AR5K_REG_WRITE(AR5K_AR5212_PROFCNT_RX, 0);
+ AR5K_REG_WRITE(AR5K_AR5212_PROFCNT_RXCLR, 0);
+ AR5K_REG_WRITE(AR5K_AR5212_PROFCNT_CYCLE, 0);
}
HAL_RFGAIN
@@ -2742,6 +2745,9 @@ ar5k_ar5212_get_isr(hal, interrupt_mask)
hal->ah_radar.r_enabled == AH_TRUE)
ar5k_radar_alert(hal);
+ if (*interrupt_mask == 0)
+ AR5K_PRINTF("0x%08x\n", data);
+
return (AH_TRUE);
}
@@ -2796,12 +2802,6 @@ ar5k_ar5212_set_intr(hal, new_mask)
AR5K_AR5212_SIMR2_DPERR);
}
- if (hal->ah_op_mode & HAL_M_HOSTAP) {
- int_mask |= AR5K_AR5212_PIMR_MIB;
- } else {
- int_mask &= ~AR5K_AR5212_PIMR_MIB;
- }
-
AR5K_REG_WRITE(AR5K_AR5212_PIMR, int_mask);
/* Store new interrupt mask */
diff --git a/sys/dev/ic/ar5xxx.c b/sys/dev/ic/ar5xxx.c
index a19ff07a548..0266e9261b8 100644
--- a/sys/dev/ic/ar5xxx.c
+++ b/sys/dev/ic/ar5xxx.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ar5xxx.c,v 1.24 2005/05/27 04:10:06 reyk Exp $ */
+/* $OpenBSD: ar5xxx.c,v 1.25 2005/05/28 23:45:10 reyk Exp $ */
/*
* Copyright (c) 2004, 2005 Reyk Floeter <reyk@vantronix.net>
@@ -608,7 +608,7 @@ ar5k_get_regdomain(hal)
ieee80211_regdomain_t ieee_regdomain;
if (ar5k_eeprom_regulation_domain(hal,
- AH_FALSE, &ieee_regdomain) == AH_TRUE) {
+ AH_FALSE, &ieee_regdomain) == AH_TRUE) {
if ((regdomain = ar5k_regdomain_from_ieee(ieee_regdomain)))
return (regdomain);
}
diff --git a/sys/dev/ic/ath.c b/sys/dev/ic/ath.c
index ffa7676bc3c..7f8a59b2500 100644
--- a/sys/dev/ic/ath.c
+++ b/sys/dev/ic/ath.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ath.c,v 1.28 2005/05/27 09:53:55 reyk Exp $ */
+/* $OpenBSD: ath.c,v 1.29 2005/05/28 23:45:10 reyk Exp $ */
/* $NetBSD: ath.c,v 1.37 2004/08/18 21:59:39 dyoung Exp $ */
/*-
@@ -137,7 +137,6 @@ void ath_rate_ctl_reset(struct ath_softc *, enum ieee80211_state);
void ath_rate_ctl(void *, struct ieee80211_node *);
void ath_recv_mgmt(struct ieee80211com *, struct mbuf *,
struct ieee80211_node *, int, int, u_int32_t);
-int ath_enable(struct ath_softc *);
void ath_disable(struct ath_softc *);
void ath_power(int, void *);
@@ -149,7 +148,7 @@ void ath_gpio_pin_ctl(void *, int, int);
#ifdef AR_DEBUG
void ath_printrxbuf(struct ath_buf *, int);
void ath_printtxbuf(struct ath_buf *, int);
-int ath_debug = ATH_DEBUG_ANY;
+int ath_debug = 0;
#endif
int ath_dwelltime = 200; /* 5 channels/second */
@@ -563,6 +562,11 @@ ath_intr1(struct ath_softc *sc)
sc->sc_stats.ast_rxorn++;
ath_hal_set_intr(ah, 0); /* disable intr's until reset */
ATH_TASK_RUN_OR_ENQUEUE(&sc->sc_rxorntask);
+ } else if (status & HAL_INT_MIB) {
+ DPRINTF(ATH_DEBUG_INTR,
+ ("%s: resetting MIB counters\n", __func__));
+ sc->sc_stats.ast_mib++;
+ ath_hal_update_mib_counters(ah, &sc->sc_mib_stats);
} else {
if (status & HAL_INT_RXEOL) {
/*
@@ -727,6 +731,8 @@ ath_init1(struct ath_softc *sc)
sc->sc_imask = HAL_INT_RX | HAL_INT_TX
| HAL_INT_RXEOL | HAL_INT_RXORN
| HAL_INT_FATAL | HAL_INT_GLOBAL;
+ if (ic->ic_opmode == IEEE80211_M_HOSTAP)
+ sc->sc_imask |= HAL_INT_MIB;
ath_hal_set_intr(ah, sc->sc_imask);
ifp->if_flags |= IFF_RUNNING;
diff --git a/sys/dev/ic/athvar.h b/sys/dev/ic/athvar.h
index 84ba54860ea..7f86cc6bef6 100644
--- a/sys/dev/ic/athvar.h
+++ b/sys/dev/ic/athvar.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: athvar.h,v 1.11 2005/05/28 00:46:46 robert Exp $ */
+/* $OpenBSD: athvar.h,v 1.12 2005/05/28 23:45:10 reyk Exp $ */
/* $NetBSD: athvar.h,v 1.10 2004/08/10 01:03:53 dyoung Exp $ */
/*-
@@ -74,6 +74,7 @@ struct ath_stats {
u_int32_t ast_watchdog; /* device reset by watchdog */
u_int32_t ast_hardware; /* fatal hardware error interrupts */
u_int32_t ast_bmiss; /* beacon miss interrupts */
+ u_int32_t ast_mib; /* MIB counter interrupts */
u_int32_t ast_rxorn; /* rx overrun interrupts */
u_int32_t ast_rxeol; /* rx eol interrupts */
u_int32_t ast_txurn; /* tx underrun interrupts */
@@ -301,6 +302,7 @@ struct ath_softc {
struct callout sc_scan_ch; /* callout handle for scan */
#endif
struct ath_stats sc_stats; /* interface statistics */
+ HAL_MIB_STATS sc_mib_stats; /* MIB counter statistics */
#ifndef __FreeBSD__
void *sc_sdhook; /* shutdown hook */
@@ -323,6 +325,7 @@ struct ath_softc {
((((u_int8_t *)(p))[0] ) | (((u_int8_t *)(p))[1] << 8) | \
(((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)))
+#define AR_DEBUG
#ifdef AR_DEBUG
enum {
ATH_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
@@ -412,6 +415,7 @@ void ath_power(int, void *);
#endif
void ath_shutdown(void *);
int ath_intr(void *);
+int ath_enable(struct ath_softc *);
/*
* HAL definitions to comply with local coding convention.
@@ -525,6 +529,8 @@ int ath_intr(void *);
((*(_ah)->ah_release_tx_queue)((_ah), (_q)))
#define ath_hal_has_veol(_ah) \
((*(_ah)->ah_has_veol)((_ah)))
+#define ath_hal_update_mib_counters(_ah, _stats) \
+ ((*(_ah)->ah_update_mib_counters)((_ah), (_stats)))
#define ath_hal_get_rf_gain(_ah) \
((*(_ah)->ah_get_rf_gain)((_ah)))
#define ath_hal_set_rx_signal(_ah) \