diff options
author | Jonathan Gray <jsg@cvs.openbsd.org> | 2013-11-11 02:59:02 +0000 |
---|---|---|
committer | Jonathan Gray <jsg@cvs.openbsd.org> | 2013-11-11 02:59:02 +0000 |
commit | a5f053934b0d26517ccacf9e54c921d65c5297ef (patch) | |
tree | f23fd3abd7a01061929b9d25bf6e1615a922761f | |
parent | 0b007895b644baacb08de716b5d29716f1e94b70 (diff) |
drm/i915/hsw: Disable L3 caching of atomic memory operations.
Otherwise using any atomic memory operation will lock up the GPU due
to a Haswell hardware bug.
v2: Use the _MASKED_BIT_ENABLE macro. Drop drm parameter definition.
From Francisco Jerez
018e31d2bd17a8bc95e1d1ca519650f2418b6010 in ubuntu 3.8
f3fc4884ebe6ae649d3723be14b219230d3b7fd2 in mainline linux
-rw-r--r-- | sys/dev/pci/drm/i915/i915_reg.h | 8 | ||||
-rw-r--r-- | sys/dev/pci/drm/i915/intel_pm.c | 7 |
2 files changed, 13 insertions, 2 deletions
diff --git a/sys/dev/pci/drm/i915/i915_reg.h b/sys/dev/pci/drm/i915/i915_reg.h index f0e83f5b912..112f411d534 100644 --- a/sys/dev/pci/drm/i915/i915_reg.h +++ b/sys/dev/pci/drm/i915/i915_reg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: i915_reg.h,v 1.3 2013/11/11 02:43:20 jsg Exp $ */ +/* $OpenBSD: i915_reg.h,v 1.4 2013/11/11 02:59:01 jsg Exp $ */ /* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * @@ -3489,6 +3489,9 @@ #define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030 #define GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB (1<<11) +#define HSW_SCRATCH1 0xb038 +#define HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE (1<<27) + #define HSW_FUSE_STRAP 0x42014 #define HSW_CDCLK_LIMIT (1 << 24) @@ -4325,6 +4328,9 @@ #define GEN7_ROW_CHICKEN2_GT2 0xf4f4 #define DOP_CLOCK_GATING_DISABLE (1<<0) +#define HSW_ROW_CHICKEN3 0xe49c +#define HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE (1 << 6) + #define G4X_AUD_VID_DID 0x62020 #define INTEL_AUDIO_DEVCL 0x808629FB #define INTEL_AUDIO_DEVBLC 0x80862801 diff --git a/sys/dev/pci/drm/i915/intel_pm.c b/sys/dev/pci/drm/i915/intel_pm.c index 3628b9decb8..abff71d3694 100644 --- a/sys/dev/pci/drm/i915/intel_pm.c +++ b/sys/dev/pci/drm/i915/intel_pm.c @@ -1,4 +1,4 @@ -/* $OpenBSD: intel_pm.c,v 1.12 2013/10/30 02:11:33 dlg Exp $ */ +/* $OpenBSD: intel_pm.c,v 1.13 2013/11/11 02:59:01 jsg Exp $ */ /* * Copyright © 2012 Intel Corporation * @@ -3772,6 +3772,11 @@ static void haswell_init_clock_gating(struct drm_device *dev) I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE); + /* L3 caching of data atomics doesn't work -- disable it. */ + I915_WRITE(HSW_SCRATCH1, HSW_SCRATCH1_L3_DATA_ATOMICS_DISABLE); + I915_WRITE(HSW_ROW_CHICKEN3, + _MASKED_BIT_ENABLE(HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE)); + /* This is required by WaCatErrorRejectionIssue */ I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG, I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) | |