diff options
| author | Miod Vallat <miod@cvs.openbsd.org> | 2004-11-02 21:03:14 +0000 |
|---|---|---|
| committer | Miod Vallat <miod@cvs.openbsd.org> | 2004-11-02 21:03:14 +0000 |
| commit | ab6bdfad700aa594b487bf61a4da21e8ca41eebf (patch) | |
| tree | e7a09e0993199f3e747d7543b858aed2e0b3cdcb | |
| parent | 64a6fbab559789bbf1c102f72de96f2e6221a37b (diff) | |
Prevent gcc from generating bogus constructs such as
fdtox %f8, %f7
which are incorrect, and caused wrong code to be generated by gas 2.14; now
gas 2.15 will reject such code.
Obtained from gcc PR #10904.
| -rw-r--r-- | gnu/usr.bin/gcc/gcc/config/sparc/sparc.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/gnu/usr.bin/gcc/gcc/config/sparc/sparc.h b/gnu/usr.bin/gcc/gcc/config/sparc/sparc.h index 7c6a7fd1d72..01c0466607b 100644 --- a/gnu/usr.bin/gcc/gcc/config/sparc/sparc.h +++ b/gnu/usr.bin/gcc/gcc/config/sparc/sparc.h @@ -1233,6 +1233,20 @@ enum reg_class { NO_REGS, FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS, {-1, -1, -1, 0x20}, /* GENERAL_OR_EXTRA_FP_REGS */ \ {-1, -1, -1, 0x3f}} /* ALL_REGS */ +/* Defines invalid mode changes. Borrowed from pa64-regs.h. + + SImode loads to floating-point registers are not zero-extended. + The definition for LOAD_EXTEND_OP specifies that integer loads + narrower than BITS_PER_WORD will be zero-extended. As a result, + we inhibit changes from SImode unless they are to a mode that is + identical in size. */ + +#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ + (TARGET_ARCH64 \ + && (FROM) == SImode \ + && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \ + ? reg_classes_intersect_p (CLASS, FP_REGS) : 0) + /* The same information, inverted: Return the class number of the smallest class containing reg number REGNO. This could be a conditional expression |