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authorMiod Vallat <miod@cvs.openbsd.org>2003-11-07 10:36:11 +0000
committerMiod Vallat <miod@cvs.openbsd.org>2003-11-07 10:36:11 +0000
commitad9f9d0831264ac280d49d0e615d7b0329e8d46d (patch)
treecb482b188a84ad92ac75686c7021264443848217
parentcd9cc6115b6f14201f584ad4ce1b832f7ad8aaa8 (diff)
"the the" -> "the"; rohee@
-rw-r--r--sys/arch/m68k/060sp/fplsp.s6
-rw-r--r--sys/arch/m68k/060sp/fpsp.s4
-rw-r--r--sys/arch/m68k/060sp/isp.s4
-rw-r--r--sys/arch/m68k/060sp/pfpsp.s4
-rw-r--r--sys/arch/m68k/fpsp/res_func.sa4
-rw-r--r--sys/arch/m68k/fpsp/slogn.sa4
-rw-r--r--sys/arch/m68k/fpsp/ssin.sa4
-rw-r--r--sys/arch/m68k/fpsp/stan.sa4
-rw-r--r--sys/arch/m68k/fpsp/sto_res.sa4
9 files changed, 19 insertions, 19 deletions
diff --git a/sys/arch/m68k/060sp/fplsp.s b/sys/arch/m68k/060sp/fplsp.s
index fde02611838..5365cf33bd2 100644
--- a/sys/arch/m68k/060sp/fplsp.s
+++ b/sys/arch/m68k/060sp/fplsp.s
@@ -1,5 +1,5 @@
#
-# $OpenBSD: fplsp.s,v 1.2 1996/05/30 22:14:11 niklas Exp $
+# $OpenBSD: fplsp.s,v 1.3 2003/11/07 10:36:08 miod Exp $
# $NetBSD: fplsp.s,v 1.2 1996/05/15 19:47:41 is Exp $
#
@@ -9973,7 +9973,7 @@ mns_tiny:
# ALGORITHM *********************************************************** #
# An underflow should occur as the result of transcendental #
# emulation in the 060FPLSP. Create an underflow by using "fmul" #
-# and two very small numbers of appropriate sign so the the operating #
+# and two very small numbers of appropriate sign so the operating #
# system can log the event. #
# #
#########################################################################
@@ -10030,7 +10030,7 @@ unf_pos:
# ALGORITHM *********************************************************** #
# An overflow should occur as the result of transcendental #
# emulation in the 060FPLSP. Create an overflow by using "fmul" #
-# and two very lareg numbers of appropriate sign so the the operating #
+# and two very lareg numbers of appropriate sign so the operating #
# system can log the event. #
# For t_ovfl_sc() we take special care not to lose the INEX2 bit. #
# #
diff --git a/sys/arch/m68k/060sp/fpsp.s b/sys/arch/m68k/060sp/fpsp.s
index 922efbdd0f5..e45bda7ea0c 100644
--- a/sys/arch/m68k/060sp/fpsp.s
+++ b/sys/arch/m68k/060sp/fpsp.s
@@ -1,5 +1,5 @@
#
-# $OpenBSD: fpsp.s,v 1.4 2002/10/05 21:19:34 fgsch Exp $
+# $OpenBSD: fpsp.s,v 1.5 2003/11/07 10:36:08 miod Exp $
# $NetBSD: fpsp.s,v 1.2 1996/05/15 19:48:03 is Exp $
#
@@ -2954,7 +2954,7 @@ iea_fmovm_trace:
# The FPU is disabled and so we should really have taken the "Line
# F Emulator" exception. So, here we create an 8-word stack frame
# from our 4-word stack frame. This means we must calculate the length
-# the the faulting instruction to get the "next PC". This is trivial for
+# the faulting instruction to get the "next PC". This is trivial for
# immediate operands but requires some extra work for fmovm dynamic
# which can use most addressing modes.
iea_disabled:
diff --git a/sys/arch/m68k/060sp/isp.s b/sys/arch/m68k/060sp/isp.s
index fcd5947b7ee..d4f755da977 100644
--- a/sys/arch/m68k/060sp/isp.s
+++ b/sys/arch/m68k/060sp/isp.s
@@ -1,5 +1,5 @@
#
-# $OpenBSD: isp.s,v 1.3 2002/01/23 19:16:09 fgsch Exp $
+# $OpenBSD: isp.s,v 1.4 2003/11/07 10:36:08 miod Exp $
# $NetBSD: isp.s,v 1.2 1996/05/15 19:48:48 is Exp $
#
@@ -2527,7 +2527,7 @@ _mul64:
cmpi.b %d0, &0x7 # is src mode Dn or other?
bgt.w mul64_memop # src is in memory
-# multiplier operand in the the data register file.
+# multiplier operand in the data register file.
# must extract the register number and fetch the operand from the stack.
mul64_regop:
andi.w &0x7, %d0 # extract Dn
diff --git a/sys/arch/m68k/060sp/pfpsp.s b/sys/arch/m68k/060sp/pfpsp.s
index 4765a42a885..4b4e522b263 100644
--- a/sys/arch/m68k/060sp/pfpsp.s
+++ b/sys/arch/m68k/060sp/pfpsp.s
@@ -1,5 +1,5 @@
#
-# $OpenBSD: pfpsp.s,v 1.3 2001/09/20 17:02:30 mpech Exp $
+# $OpenBSD: pfpsp.s,v 1.4 2003/11/07 10:36:08 miod Exp $
# $NetBSD: pfpsp.s,v 1.2 1996/05/15 19:49:12 is Exp $
#
@@ -2954,7 +2954,7 @@ iea_fmovm_trace:
# The FPU is disabled and so we should really have taken the "Line
# F Emulator" exception. So, here we create an 8-word stack frame
# from our 4-word stack frame. This means we must calculate the length
-# the the faulting instruction to get the "next PC". This is trivial for
+# the faulting instruction to get the "next PC". This is trivial for
# immediate operands but requires some extra work for fmovm dynamic
# which can use most addressing modes.
iea_disabled:
diff --git a/sys/arch/m68k/fpsp/res_func.sa b/sys/arch/m68k/fpsp/res_func.sa
index 59def49ba9e..05d1c4be029 100644
--- a/sys/arch/m68k/fpsp/res_func.sa
+++ b/sys/arch/m68k/fpsp/res_func.sa
@@ -1,4 +1,4 @@
-* $OpenBSD: res_func.sa,v 1.3 2001/09/20 17:02:30 mpech Exp $
+* $OpenBSD: res_func.sa,v 1.4 2003/11/07 10:36:10 miod Exp $
* $NetBSD: res_func.sa,v 1.3 1994/10/26 07:49:22 cgd Exp $
* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
@@ -1915,7 +1915,7 @@ dp_over:
*
* Input: a0 points to a normalized number in internal extended format
* d0 is the round precision (=1 for sgl; =2 for dbl)
-* d1 is the the single precision or double precision
+* d1 is the single precision or double precision
* denorm threshold
*
* Output: (In the format for dest_sgl or dest_dbl)
diff --git a/sys/arch/m68k/fpsp/slogn.sa b/sys/arch/m68k/fpsp/slogn.sa
index c9441ff76db..10f41a9d86b 100644
--- a/sys/arch/m68k/fpsp/slogn.sa
+++ b/sys/arch/m68k/fpsp/slogn.sa
@@ -1,4 +1,4 @@
-* $OpenBSD: slogn.sa,v 1.2 1996/05/29 21:05:40 niklas Exp $
+* $OpenBSD: slogn.sa,v 1.3 2003/11/07 10:36:10 miod Exp $
* $NetBSD: slogn.sa,v 1.3 1994/10/26 07:49:54 cgd Exp $
* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
@@ -50,7 +50,7 @@
* result is provably monotonic in double precision.
*
* Speed: The program slogn takes approximately 190 cycles for input
-* argument X such that |X-1| >= 1/16, which is the the usual
+* argument X such that |X-1| >= 1/16, which is the usual
* situation. For those arguments, slognp1 takes approximately
* 210 cycles. For the less common arguments, the program will
* run no worse than 10% slower.
diff --git a/sys/arch/m68k/fpsp/ssin.sa b/sys/arch/m68k/fpsp/ssin.sa
index a9a2df985a7..582b159fb57 100644
--- a/sys/arch/m68k/fpsp/ssin.sa
+++ b/sys/arch/m68k/fpsp/ssin.sa
@@ -1,4 +1,4 @@
-* $OpenBSD: ssin.sa,v 1.2 1996/05/29 21:05:42 niklas Exp $
+* $OpenBSD: ssin.sa,v 1.3 2003/11/07 10:36:10 miod Exp $
* $NetBSD: ssin.sa,v 1.3 1994/10/26 07:50:01 cgd Exp $
* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
@@ -54,7 +54,7 @@
* result is provably monotonic in double precision.
*
* Speed: The programs sSIN and sCOS take approximately 150 cycles for
-* input argument X such that |X| < 15Pi, which is the the usual
+* input argument X such that |X| < 15Pi, which is the usual
* situation. The speed for sSINCOS is approximately 190 cycles.
*
* Algorithm:
diff --git a/sys/arch/m68k/fpsp/stan.sa b/sys/arch/m68k/fpsp/stan.sa
index 446eb9ed345..9b8707e09e3 100644
--- a/sys/arch/m68k/fpsp/stan.sa
+++ b/sys/arch/m68k/fpsp/stan.sa
@@ -1,4 +1,4 @@
-* $OpenBSD: stan.sa,v 1.2 1996/05/29 21:05:43 niklas Exp $
+* $OpenBSD: stan.sa,v 1.3 2003/11/07 10:36:10 miod Exp $
* $NetBSD: stan.sa,v 1.3 1994/10/26 07:50:10 cgd Exp $
* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
@@ -49,7 +49,7 @@
* result is provably monotonic in double precision.
*
* Speed: The program sTAN takes approximately 170 cycles for
-* input argument X such that |X| < 15Pi, which is the the usual
+* input argument X such that |X| < 15Pi, which is the usual
* situation.
*
* Algorithm:
diff --git a/sys/arch/m68k/fpsp/sto_res.sa b/sys/arch/m68k/fpsp/sto_res.sa
index b0d2ebfa75b..f2c1d52bbf9 100644
--- a/sys/arch/m68k/fpsp/sto_res.sa
+++ b/sys/arch/m68k/fpsp/sto_res.sa
@@ -1,4 +1,4 @@
-* $OpenBSD: sto_res.sa,v 1.2 1996/05/29 21:05:44 niklas Exp $
+* $OpenBSD: sto_res.sa,v 1.3 2003/11/07 10:36:10 miod Exp $
* $NetBSD: sto_res.sa,v 1.3 1994/10/26 07:50:14 cgd Exp $
* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
@@ -36,7 +36,7 @@
*
* Takes the result and puts it in where the user expects it.
* Library functions return result in fp0. If fp0 is not the
-* users destination register then fp0 is moved to the the
+* users destination register then fp0 is moved to the
* correct floating-point destination register. fp0 and fp1
* are then restored to the original contents.
*