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authorVisa Hankala <visa@cvs.openbsd.org>2017-06-11 03:35:31 +0000
committerVisa Hankala <visa@cvs.openbsd.org>2017-06-11 03:35:31 +0000
commitae2cbf62933872440eeb08686c943e0ff899b776 (patch)
tree396546e101c2b6fffe2c89b7f5733bd78f81a8fc
parentd24bd24e29b87f1e7789d18ea7e03a781c4aa605 (diff)
Fix TLB size computation on OCTEON II and III. The CPUs have utilized
the whole TLB space even before this. However, TLB initialization on boot and TLB flush on ASID wraparound have been incomplete. These have caused crashes of processes.
-rw-r--r--sys/arch/mips64/include/cpu.h3
-rw-r--r--sys/arch/mips64/include/mips_cpu.h17
-rw-r--r--sys/arch/mips64/mips64/mips64r2.S7
-rw-r--r--sys/arch/octeon/octeon/machdep.c12
4 files changed, 35 insertions, 4 deletions
diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h
index 260e8585361..35548958f16 100644
--- a/sys/arch/mips64/include/cpu.h
+++ b/sys/arch/mips64/include/cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cpu.h,v 1.117 2017/05/24 13:33:00 visa Exp $ */
+/* $OpenBSD: cpu.h,v 1.118 2017/06/11 03:35:30 visa Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -490,6 +490,7 @@ register_t cp0_get_config(void);
uint32_t cp0_get_config_1(void);
uint32_t cp0_get_config_2(void);
uint32_t cp0_get_config_3(void);
+uint32_t cp0_get_config_4(void);
uint32_t cp0_get_pagegrain(void);
register_t cp0_get_prid(void);
void cp0_reset_cause(register_t);
diff --git a/sys/arch/mips64/include/mips_cpu.h b/sys/arch/mips64/include/mips_cpu.h
index 9fc30c272e0..94cb0c6234a 100644
--- a/sys/arch/mips64/include/mips_cpu.h
+++ b/sys/arch/mips64/include/mips_cpu.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: mips_cpu.h,v 1.5 2017/04/20 15:42:26 visa Exp $ */
+/* $OpenBSD: mips_cpu.h,v 1.6 2017/06/11 03:35:30 visa Exp $ */
/*-
* Copyright (c) 1992, 1993
@@ -319,6 +319,21 @@
#define CONFIG3_TL 0x00000001
/*
+ * Config4 register
+ */
+#define CONFIG4_M 0x80000000u
+#define CONFIG4_IE 0x60000000u
+#define CONFIG4_AE 0x10000000u
+#define CONFIG4_VTLBSizeExt 0x0f000000u /* when MMUExtDef=3 */
+#define CONFIG4_KScrExist 0x00ff0000u
+#define CONFIG4_MMUExtDef 0x0000c000u
+#define CONFIG4_MMUExtDef_SHIFT 14
+#define CONFIG4_FTLBPageSize 0x00001f00u /* when MMUExtDef=2 or 3 */
+#define CONFIG4_FTLBWays 0x000000f0u /* when MMUExtDef=2 or 3 */
+#define CONFIG4_FTLBSets 0x0000000fu /* when MMUExtDef=2 or 3 */
+#define CONFIG4_MMUSizeExt 0x000000ffu /* when MMUExtDef=1 */
+
+/*
* PageGrain register
*/
#define PGRAIN_RIE 0x80000000
diff --git a/sys/arch/mips64/mips64/mips64r2.S b/sys/arch/mips64/mips64/mips64r2.S
index 1b0284f6cc3..cfec68f9fe0 100644
--- a/sys/arch/mips64/mips64/mips64r2.S
+++ b/sys/arch/mips64/mips64/mips64r2.S
@@ -1,4 +1,4 @@
-/* $OpenBSD: mips64r2.S,v 1.3 2016/08/14 08:23:52 visa Exp $ */
+/* $OpenBSD: mips64r2.S,v 1.4 2017/06/11 03:35:30 visa Exp $ */
/*
* Copyright (c) 2011 Miodrag Vallat.
@@ -41,6 +41,11 @@ LEAF(cp0_get_config_3, 0)
mfc0 v0, COP_0_CONFIG, 3
END(cp0_get_config_3)
+LEAF(cp0_get_config_4, 0)
+ j ra
+ mfc0 v0, COP_0_CONFIG, 4
+END(cp0_get_config_4)
+
LEAF(cp0_get_pagegrain, 0)
j ra
mfc0 v0, COP_0_TLB_PG_GRAIN
diff --git a/sys/arch/octeon/octeon/machdep.c b/sys/arch/octeon/octeon/machdep.c
index cddcd12c159..32098dd6411 100644
--- a/sys/arch/octeon/octeon/machdep.c
+++ b/sys/arch/octeon/octeon/machdep.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: machdep.c,v 1.89 2017/06/11 03:03:05 visa Exp $ */
+/* $OpenBSD: machdep.c,v 1.90 2017/06/11 03:35:30 visa Exp $ */
/*
* Copyright (c) 2009, 2010 Miodrag Vallat.
@@ -231,6 +231,7 @@ mips_init(__register_t a0, __register_t a1, __register_t a2 __unused,
int i;
struct boot_desc *boot_desc;
struct boot_info *boot_info;
+ uint32_t config4;
extern char start[], edata[], end[];
extern char exception[], e_exception[];
@@ -351,7 +352,16 @@ mips_init(__register_t a0, __register_t a1, __register_t a2 __unused,
bootcpu_hwinfo.c0prid = prid;
bootcpu_hwinfo.type = (prid >> 8) & 0xff;
bootcpu_hwinfo.c1prid = 0; /* No FPU */
+
bootcpu_hwinfo.tlbsize = 1 + ((cp0_get_config_1() >> 25) & 0x3f);
+ if (cp0_get_config_3() & CONFIG3_M) {
+ config4 = cp0_get_config_4();
+ if (((config4 & CONFIG4_MMUExtDef) >>
+ CONFIG4_MMUExtDef_SHIFT) == 1)
+ bootcpu_hwinfo.tlbsize +=
+ (config4 & CONFIG4_MMUSizeExt) << 6;
+ }
+
bcopy(&bootcpu_hwinfo, &curcpu()->ci_hw, sizeof(struct cpu_hwinfo));
/*