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authorPatrick Wildt <patrick@cvs.openbsd.org>2018-04-27 06:41:13 +0000
committerPatrick Wildt <patrick@cvs.openbsd.org>2018-04-27 06:41:13 +0000
commitaf00735ae3ee6b6c17461958b8f96d5e6010c508 (patch)
tree289dcad900b930d41d8141845ba4622a4aedb304
parentafc9f5f7c709f32c21a16e9f8448c436e8dcf9c5 (diff)
Newer fec(4), like implemented on i.MX8M, have multiple interrupt lines
to the ethernet controller for different types of events. On the i.MX8M interrupts only seem to happen on the last interrupt, while the i.MX6 that we support very well only has a single interrupt line. Simply establish all three lines (if available) in a non-MPSAFE fashion to make ethernet work on the i.MX8M SoC. ok kettenis@
-rw-r--r--sys/dev/fdt/if_fec.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/sys/dev/fdt/if_fec.c b/sys/dev/fdt/if_fec.c
index 576e2c608f9..99edc77dcee 100644
--- a/sys/dev/fdt/if_fec.c
+++ b/sys/dev/fdt/if_fec.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: if_fec.c,v 1.2 2018/04/02 17:52:36 patrick Exp $ */
+/* $OpenBSD: if_fec.c,v 1.3 2018/04/27 06:41:12 patrick Exp $ */
/*
* Copyright (c) 2012-2013 Patrick Wildt <patrick@blueri.se>
*
@@ -216,7 +216,7 @@ struct fec_softc {
int sc_node;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
- void *sc_ih; /* Interrupt handler */
+ void *sc_ih[3]; /* Interrupt handler */
bus_dma_tag_t sc_dma_tag;
struct fec_dma_alloc txdma; /* bus_dma glue for tx desc */
struct fec_buf_desc *tx_desc_base;
@@ -344,7 +344,11 @@ fec_attach(struct device *parent, struct device *self, void *aux)
HWRITE4(sc, ENET_EIMR, 0);
HWRITE4(sc, ENET_EIR, 0xffffffff);
- sc->sc_ih = arm_intr_establish_fdt(faa->fa_node, IPL_NET,
+ sc->sc_ih[0] = arm_intr_establish_fdt_idx(faa->fa_node, 0, IPL_NET,
+ fec_intr, sc, sc->sc_dev.dv_xname);
+ sc->sc_ih[1] = arm_intr_establish_fdt_idx(faa->fa_node, 1, IPL_NET,
+ fec_intr, sc, sc->sc_dev.dv_xname);
+ sc->sc_ih[2] = arm_intr_establish_fdt_idx(faa->fa_node, 2, IPL_NET,
fec_intr, sc, sc->sc_dev.dv_xname);
tsize = ENET_MAX_TXD * sizeof(struct fec_buf_desc);