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authorJason Wright <jason@cvs.openbsd.org>2002-07-08 19:41:30 +0000
committerJason Wright <jason@cvs.openbsd.org>2002-07-08 19:41:30 +0000
commitb69cf33523a7df1ce2442c43bc49bb1da38443fc (patch)
treee81031f6344ec59d18b8be3464ab2e3982879798
parent3cff17a919cce3de2bd55032665acd6875b22020 (diff)
5821 has two additional bits that must be ack'd (note they don't have
corresponding enable bits... they are always on... dain bramage).
-rw-r--r--sys/dev/pci/ubsec.c13
-rw-r--r--sys/dev/pci/ubsecreg.h4
2 files changed, 13 insertions, 4 deletions
diff --git a/sys/dev/pci/ubsec.c b/sys/dev/pci/ubsec.c
index e094fff0802..53fcf5c6eba 100644
--- a/sys/dev/pci/ubsec.c
+++ b/sys/dev/pci/ubsec.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ubsec.c,v 1.107 2002/07/05 21:21:17 jason Exp $ */
+/* $OpenBSD: ubsec.c,v 1.108 2002/07/08 19:41:29 jason Exp $ */
/*
* Copyright (c) 2000 Jason L. Wright (jason@thought.net)
@@ -182,10 +182,17 @@ ubsec_attach(parent, self, aux)
sc->sc_flags |= UBS_FLAGS_KEY | UBS_FLAGS_RNG;
if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_BROADCOM &&
- (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_5820 ||
- PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_5821))
+ (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_5820))
+ sc->sc_flags |= UBS_FLAGS_KEY | UBS_FLAGS_RNG |
+ UBS_FLAGS_LONGCTX | UBS_FLAGS_HWNORM | UBS_FLAGS_BIGKEY;
+
+ if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_BROADCOM &&
+ (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_5821)) {
+ sc->sc_statmask |= BS_STAT_MCR1_ALLEMPTY |
+ BS_STAT_MCR2_ALLEMPTY;
sc->sc_flags |= UBS_FLAGS_KEY | UBS_FLAGS_RNG |
UBS_FLAGS_LONGCTX | UBS_FLAGS_HWNORM | UBS_FLAGS_BIGKEY;
+ }
cmd = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
cmd |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
diff --git a/sys/dev/pci/ubsecreg.h b/sys/dev/pci/ubsecreg.h
index 5d0986d2fdd..f5638f518f9 100644
--- a/sys/dev/pci/ubsecreg.h
+++ b/sys/dev/pci/ubsecreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: ubsecreg.h,v 1.23 2002/05/08 23:05:28 jason Exp $ */
+/* $OpenBSD: ubsecreg.h,v 1.24 2002/07/08 19:41:29 jason Exp $ */
/*
* Copyright (c) 2000 Theo de Raadt
@@ -84,6 +84,8 @@
#define BS_STAT_DMAERR 0x10000000 /* DMA error */
#define BS_STAT_MCR2_FULL 0x08000000 /* MCR2 is full */
#define BS_STAT_MCR2_DONE 0x04000000 /* MCR2 is done */
+#define BS_STAT_MCR1_ALLEMPTY 0x02000000 /* MCR1 is completely empty */
+#define BS_STAT_MCR2_ALLEMPTY 0x01000000 /* MCR2 is completely empty */
/* BS_ERR - DMA Error Address */
#define BS_ERR_ADDR 0xfffffffc /* error address mask */